Abstract: In one embodiment, a PLL circuit is provided with a plurality of pull-in operation modes for pulling a voltage across a filter capacitor (C1, C2) in a lock-up voltage, and with a register (CRG) for designating one of the plurality of pull-in operation modes. The pull-in operation is performed in accordance with a setting value in the register.

Abstract: Methodology for processing of RF signals for receiving and transmission, which varies the frequencies of local oscillators, in order to enable the receivers and transmitters to operate with higher performance in wider or multi-bands. bands. Their integrations into ICs are also made easier.

Abstract: A differential and quadrature harmonic voltage controlled oscillator (VCO), and a method for generating a differential and quadrature harmonic signal. The VCO may include a first oscillation unit for generating a first and a third signal, a first combining unit for combining the first and the third signal, a second oscillation unit for generating a second and a fourth signal, and a second combining unit for combining the second and the fourth signal. The phase of the second signal is determined through a phase-invert and delay using the first signal, the phase of the third signal is determined through a phase-invert and delay using the second signal, the phase of the fourth signal is determined through a phase-invert and delay using the third signal, and the phase of the first signal is determined through a phase-invert and delay using the fourth signal.

Abstract: The present invention is related to a method and apparatus for automatic frequency correction of a local oscillator. The apparatus receives a carrier signal. The carrier signal includes a code sequence known to the apparatus. The apparatus downconverts the carrier signal to a baseband signal using the local oscillator. The apparatus performs a block correlation of the samples of the baseband signal with the known code sequence to generate a frequency error signal. The frequency error signal is fed back to the local oscillator to correct the frequency error.

Abstract: An apparatus and method to use a single voltage controlled oscillator (VCO) to generate frequencies to cover multiple frequency bands. The single VCO generates local oscillator signals for more than one frequency band of a communication standard or protocol, such as the IEEE 802.11 standard.

Abstract: A signal reception apparatus and method for communication systems. The signal reception apparatus for communication systems according to the present invention is applicable to communication environments in which a plurality of sub-bands having different frequency bands are sequentially used for communications. An embodiment of the invention has a multi-band index generation unit, a multi-band frequency generation unit, a multiplication unit, a correlation signal reception unit, and a buffer unit. The multi-band index generation unit generates a multi-band index corresponding to a sub-band to which a received signal is transmitted in correspondence with the multi-band index. The multiplication unit outputs a signal obtained by multiplying the received signal by the multi-band frequency. The correlation signal reception unit integrates and outputs the signal of the multiplication unit based on an integral time set in correspondence with the multi-band index.

Abstract: Techniques for generating reference signals for multiple communication systems are described. An apparatus comprises a reference oscillator, a frequency control unit, and a plurality of frequency synthesizers. The reference oscillator generates a main reference signal and may be a crystal oscillator or some other type of oscillator. The frequency control unit estimates the frequency error of the main reference signal and provides a frequency error estimate. The plurality of frequency synthesizers receive the main reference signal and generate a plurality of system reference signals for a plurality of systems. At least one (e.g., each) frequency synthesizer corrects the frequency error of the main reference signal based on the frequency error estimate from the frequency control unit. Each frequency synthesizer may include a sigma-delta modulator used to generate a divider control for a phase locked loop (PLL). The divider control corrects for the frequency error of the main reference signal.

Abstract: A frequency synthesizer circuit generates an output clock signal having a desired frequency relationship with an input reference signal, and offers essentially arbitrary relational values and adjustment resolution within any applicable circuit limits. The frequency synthesizer includes a ring oscillator circuit that provides multiple phases of its output clock signal, a phase selection circuit to select a phase of the output clock signal for feedback to an oscillator control circuit at each cycle of the reference signal according to a phase selection sequence. The oscillator control circuit generates a control signal responsive to comparing the selected phases of the output clock signal with the reference signal, and the phase selection circuit may include a modulator to generate phase selection sequences having desired time-average values that enable arbitrary frequency adjustability.

Abstract: A method according to one embodiment identifying the frequency range of at least one active channel of at least one wireless communication RF band; identifying the frequency range of at least one clock harmonic; identifying an overlap, in whole or in part, between the frequency range of the at least one active channel and the frequency range of the at least one clock harmonic; and shifting a fundamental frequency of the at least one clock to shift the frequency range of the at least one clock harmonic out of, at least in part, the frequency range of the at least one active channel. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.

Abstract: In a structure having a fractional-N synthesizer driven by a voltage controlled oscillator, frequency accuracy is maintained by first using the fractional-N synthesizer to correct large frequency errors and then slowly transferring correction from the fractional-N synthesizer to the voltage controlled oscillator a little at a time.

Abstract: An apparatus method to provide a frequency synthesizer using a phase locked loop in a communication device to provide a particular frequency allocation to generate an output from the PLL. The synthesizer includes a phase locked loop (PLL) circuit that has a feedback loop. The feedback loop has a feedback divider circuit that provides an N integer division of an output signal from the PLL in the feedback loop to close loop with the reference signal at a front end of the PLL. A value for feedback factor N to be used in the N integer division is based on a particular channel frequency selected and in which the feedback factor N is selected to provide a highest reference frequency available from the plurality of reference frequencies to generate the reference signal.

Abstract: A broadband modulation PLL includes a PLL portion containing a voltage controlled oscillator (101), a frequency divider (105), a phase comparator (104) and a loop filter (103). A frequency-dividing ratio of the frequency divider (105) is controlled to apply modulation, and also an input voltage of the voltage controlled oscillator (101) is controlled to apply modulation. One of phase modulation data for controlling the frequency dividing ratio and phase modulation data for input voltage of the voltage controlled oscillator (101) is inverted in phase by using an inverter (113), and the delay control circuit (110) detects a timing error on the basis of a signal (133) achieved by adding the output signals (131) and (132) of the filter (106) and the loop filter (103), and the timing is controlled by the delay circuits (111) and (112) to correct, the timing error.

Abstract: According to an example embodiment, an apparatus is provided in a wireless transceiver. The apparatus may include a circuit configured to generate a first frequency signal (e.g., a VCO signal). A local oscillator (LO) generator may be provided that includes a frequency divider to divide the first frequency signal, and an image rejection mixer configured to mix the first frequency signal with an output of the frequency divider to generate an LO signal. In this manner, the LO generator may generate a desired LO signal while substantially rejecting or suppressing an unwanted sideband or image signal, according to an example embodiment.

Abstract: A method and apparatus for generating a self-correcting local oscillation includes processing that begins by generating a frequency correction signal that represents undesired tones introduced by the self-correcting local oscillation. The processing continues by generating an auxiliary frequency based on the frequency correction signal. The processing continues by compensating a synthesized frequency based the auxiliary frequency to produce a local oscillation.

Abstract: A device and method for generating an adjustable chaotic signal are provided. The chaotic signal generation device includes a plurality of triangle pulse train generators which generate a plurality of triangle waves having different frequency cycles, an adder which adds the triangle waves output from the triangle pulse train generators and outputs a noise signal, and a frequency modulator which converts the noise signal to a certain frequency band to output a chaotic signal. Accordingly, the power consumption and cost are reduced and the manufacture of the chaotic signal generation device is simplified due to the components integrated on an IC. Also, a plurality of users can use wireless communications in a particular wireless communications area.

Abstract: A numerical control oscillator (NCO) for reducing a circuit size and power consumption while maintaining a desired frequency deviation, and suppressing generation of a spurious as much as possible. The NCO comprises a phase accumulator for accumulating input phase difference data to generate phase data, and a read only memory (ROM) for storing a phase/amplitude conversion table to output amplitude data corresponding to the phase data generated by the phase accumulator. The phase accumulator includes a phase register and a phase calculator. If a sampling frequency of an output signal from the NCO is Fs, the upper limit of a desired frequency setting interval of the output signal is FD and K and L are arbitrary integers, the phase calculator adds or subtracts the input phase difference data and phase data from the phase register to or from each other by a modulo operation taking the nearest integer of M as a modulus, where M=Fs/FD×K/L.

Abstract: A reference local oscillation signal transmission station 1 radiates a reference local oscillation signal to a service zone. A portion of the signal received by each radio slave station terminal 2 is branched and fed to an injection locked oscillator 6. As a result, a local oscillation signal which is synchronized with the reference local oscillation signal is obtained. In the slave station terminal 2, the thus-obtained local oscillation signal is fed to a transmission frequency converter (mixer) 7 and a reception frequency converter (mixer) 8. An IF band transmission modulated signal is fed to the mixer 7 for frequency conversion to a radio frequency band, and the thus-obtained radio-frequency modulated signal is transmitted. Meanwhile, a received radio-frequency modulated signal is fed to the mixer 8 for down conversion, and the thus-obtained signal is fed to an IF band demodulator 10 so as to restore an information signal.

Abstract: A wideband signal generator according to one embodiment of the invention includes a variable frequency source and a direct digital synthesizer. Local oscillators, signal analyzers, modulators, demodulators, and other equipment including one or more such generators are also disclosed.

Abstract: A carrier detecting circuit which generates a carrier detection level by integral action based on a reception signal and detects using the carrier detection level whether a carrier exists is disclosed and includes an integration capacitor that is charged and discharged using a difference current between a current charged from a charging circuit and a current discharged to a discharging circuit, where the charging circuit and the discharging circuit are provided in an integrator which performs the integral action.

Abstract: The present invention is related to a method and apparatus for automatic frequency correction of a local oscillator. The apparatus receives a carrier signal. The carrier signal includes a code sequence known to the apparatus. The apparatus downconverts the carrier signal to a baseband signal using the local oscillator. The apparatus performs a block correlation of the samples of the baseband signal with the known code sequence to generate a frequency error signal. The frequency error signal is fed back to the local oscillator to correct the frequency error.

Abstract: A WLAN (Wireless Local Area Network) communication device comprising a WLAN frequency synthesizer for generating a synthesizer signal suitable for modulating a transmission signal and/or demodulating a reception signal and corresponding methods and integrated circuit chips are provided. The WLAN frequency synthesizer comprises a reference oscillator for generating a first reference clock signal, a fractional-N PLL (Phase-Locked Loop) unit for receiving a second reference clock signal and converting the second reference clock signal into the synthesizer signal, and a frequency multiplier for receiving the first reference clock signal and converting the first reference clock signal into the second reference clock signal to be forwarded to the fractional-N PLL unit by multiplying the frequency of the first reference clock signal by a multiplication factor. Embodiments may provide shorter settling times and/or enhanced spurious suppression of the fractional-N PLL unit.

Abstract: A system and a method for self calibrating a voltage-controlled oscillator (VCO). In the system, a mode controller generates a control signal for each of an automatic band selection mode, an automatic gain tuning mode, and a phase-locking mode, from a frequency comparison result between a reference clock signal and a divided clock signal which is generated by dividing a frequency of an oscillation signal, and thereby controls the VCO, so that the VCO may generate the oscillation signal which is automatically phase-locked in a target frequency with an optimal state.

Abstract: An oscillation controlling apparatus for controlling an oscillation frequency of an oscillation circuit to be a target frequency comprises a variable range dividing unit configured to dividing a variable range of a control signal into a plurality of portions, the control signal increasing or decreasing the oscillation frequency of the oscillation circuit as a value thereof is increased or decreased; and a determining unit configured to determining the portion including the control signal setting the oscillation frequency to the target frequency, by outputting the control signal at a boundary of each portion divided by the variable range dividing unit and by acquiring the oscillation frequency of the oscillation circuit, wherein the variable range dividing unit is configured to divide repeatedly the variable range until the oscillation frequency of the oscillation circuit is set to the target frequency with using the portion determined by the determining unit as the variable range.

Abstract: An electronic tuning system includes an electronic tuner for adjusting the predetermined control voltage of a voltage controlled oscillator (VCO) to tune the local frequency signal to radio waves on an arbitrary channel in accordance with channel selection information. A booster circuit boosts a source voltage to generate a boosted voltage in order to ensure the predetermined control voltage. A non-volatile memory stores the channel selection information in response to a predetermined write voltage. The boosted voltage of the booster circuit is utilized as the predetermined write voltage.

Abstract: Disclosed are a low-cost circuit, a communication apparatus and a method for correcting a clock and for application to a specific radio system with low electric power consumption. The communication apparatus comprises: a frequency data storage circuit for storing frequency set values corresponding to respective channels to output a frequency set value corresponding to a channel specified by a channel selection signal; a frequency correction circuit for calculating a frequency control value by performing a calculation using both the frequency control value and a frequency correction value determined in accordance with an ambient temperature; a voltage controlled oscillator for generating a first frequency based on a clock signal; and a PLL circuit for generating a desired second frequency by performing a calculation using the first frequency and the frequency control value.

Abstract: An apparatus and method for synchronizing sampling frequencies of a receiver and a transmitter of a multi-carrier communication system is provided. The receiver includes an estimator for estimating a frequency offset by employing an additional angle rotation of a received signal in frequency domain. The apparatus includes a compensation loop filter for generating a first output in response to a frequency offset compensation, an adder for adding the estimated frequency offset and the first output to generate a second output, and a loop filter for generating frequency offset compensation according to the second output. The method repeatedly applies the apparatus to generate frequency offset compensation, and then feeds it back to an oscillator to compensate the sampling frequency of the receiver. The apparatus and method can also be applied to a communication system with a carrier frequency offset.

Abstract: A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.

Abstract: A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.

Abstract: A method and device are provided for producing mobile radio signals, which utilize a direct conversion receiver, at least one first and one second local oscillator and one regenerative divider for processing signals according to different mobile radio standards. For generating the intermediate frequency for transmission according to at least one of the mobile radio standards, a division by four in addition to a division by three of the oscillator frequency is also possible.

Abstract: Systems and techniques are disclosed relating to wireless communications. These systems and techniques involve wireless communications wherein a device may be configured to recover an information signal from a carrier using a reference signal, detect a frequency error in the information signal; and periodically tune the reference signal to reduce the frequency error.

Abstract: A method of frequency tracking based on recovered data, for use in an automatic frequency control subsystem at the receiver of a mobile station, is disclosed. The frequency tracking mechanism derives frequency error information from the recovered data to determine the adjustment needed at the mobile station's local voltage controlled oscillator in order to track the frequency of the base station.

Abstract: The invention relates to a signal source (S) which comprises a local oscillator (5) for generating a reference frequency signal fo. The signal source comprises: a frequency divider by N (6) connected to the local oscillator (5) and delivering two quadratic square-wave signals (Id, Qd) at a frequency fo/N,N being equal to 2 or 4×n, and n being an integer number, and a multiphase filter (7) which supplies two sinusoidal quadratic signals (Is, Qs) at a frequency equal to m·fo/N on the basis of the quadratic signals (Id, Qd) issued by the frequency divider, m being an odd number. The invention finds its application in direct frequency conversion circuits and transmission circuits used in the field of telecommunication.

Abstract: A method and apparatus for compensating an oscillator in a location-enabled wireless device is described. In an example, a mobile device includes a wireless receiver for receiving wireless signals and a GPS receiver for receiving GPS signals. The mobile device also includes an oscillator having an associated temperature model. A frequency error is derived from a wireless signal. The temperature model is adjusted in response to the frequency error and a temperature proximate the oscillator. Frequency error of the oscillator is compensated using the adjusted temperature model. In another example, a frequency error is derived using a second oscillator within the wireless receiver.

Abstract: A reference signal enhancement device for phase lock loop oscillator. In the reference signal enhancement device, a band pass filtering unit is coupled to a reference signal to filter high frequency noise, low frequency noise, and harmonic components of the reference signal or components with frequency exceeding a predetermined frequency in the reference signal. A signal amplification device including three amplifiers connected in series is coupled to the band pass filter to convert the filtered reference signal.

Abstract: A voltage controlled oscillator includes a resonator configured to resonate with an initial oscillation frequency during starting period of oscillation and a steady oscillation frequency during a steady state oscillation. The resonator includes a film bulk acoustic resonator having a series resonance frequency higher than the steady oscillation frequency. A negative resistance circuit configured to drive the resonator, has a positive increment for reactance in the steady state oscillation compared with reactance in the starting period.

Abstract: The present invention provides for a system for operating a communication device (20) for reception of scheduled intermittent information messages (22) with a dual mode timer (70) that extends battery life. A controller (50) schedules the timer (70) to power down all idle components of the device (20) between message receptions in a power saving sleep mode to conserve battery power. During active mode when the device is fully active in reception of messages, the timer (70) uses a reference oscillator (90) with a relatively high frequency to support digital processing by the receiver (26). During sleep mode when only the timer is powered on, a much lower frequency sleep oscillator (96) is used to maintain the lowest possible level of power consumption within the timer itself. The timer (70) has provision for automatic temperature calibration to compensate for timing inaccuracies inherent to the low-power low-frequency crystal oscillator (96) used for the sleep mode.

Abstract: In one embodiment of the present invention, an apparatus includes a plurality of gain stages each having a gain greater than one, and which are coupled to create a positive feedback at an oscillation frequency. The gain stages may be formed of transconductance gain stages which may be coupled together as a ring oscillator or a latch type circuit. Such circuits may be used as calibration circuits in which small signal parameters of the gain stages are directly calibrated, and are used in turn to directly calibrate small signal parameters of a target circuit.

Abstract: An improved low-cost super-regenerative receiver includes sampling phase-locked loop. Phase sampling is controlled by the quench signal (264). In the preferred embodiment, logic state HIGH to logic state LOW transition of the quench signal (264) defines the timing for the event of sampling. While the quench signal (264) is in logic state HIGH, a quenched oscillator is being turned ON and the oscillation amplitude builds-up until a steady-state level is reached. When the oscillator is turned OFF, effective quality factor of an electronically tunable resonator (206) is reduced, by increasing losses in the circuit, thus to ensure aperiodic (non-oscillatory) decay. The resonator's charge—an energy stored on internal reactive components of the resonator (206), which existed at the instant of turning the oscillations OFF, is transferred during precisely defined period of time to the charge holding capacitor (404) of a charge transfer circuit (216).

Abstract: A receiver in which the sneaking noise from a crystal oscillator is reduced. A high-frequency amplifier circuit 11, a mixing circuit 12, a local oscillator 13, intermediate-frequency filters 14 and 16, an intermediate-frequency amplifier circuit 15, a limit circuit 17, an FM detection circuit 18, and a stereo demodulation circuit 19, an oscillator 20, and a PLL circuit 21 all constituting an FM receiver are provided as a one-chip component 10. A crystal oscillator 31 as an external component is connected to the oscillator 20. The natural-oscillation frequency of the crystal oscillator 31 is so set that the fundamental component and its harmonics are out of the reception band.

Abstract: An oscillator that provides a quadrature output and has a cross-coupled configuration is disclosed. The oscillator generates an output signal having a frequency. Two phase shift circuits, or stages, are activated by a control signal to provide phase shifts within the oscillator. Each phase shift circuit includes poles to provide the phase shift. A pole includes a varactor to tune, adjust or vary the phase shift accordingly.

Abstract: A method and apparatus for compensating for frequency drift in an LNB by storing the frequency offset of each LNB with respect to each channel. When a channel is selected, a particular LNB is activated and the table of offset values is consulted. The offset value for the LNB and channel is used to tune the LNB to a frequency that is appropriate for receiving the selected channel.

Abstract: A direct conversion receiver includes a local oscillator for generating a sinusoid, a mixer for receiving an incoming signal and for mixing the incoming signal with the sinusoid, an analog-to-digital converter for converting the mixed analog signal into a digital signal, and a digital signal processor for outputting the digital signal so that an I-channel signal and a Q-channel signal are output separately and for transmitting to the local oscillator a phase control signal that determines the phase of a sinusoid to be generated by the local oscillator. The direct conversion receiver may further include a low noise amplifier for amplifying the incoming while preventing noise included in the input signal from being amplified, a baseband amplifier for amplifying the mixed analog signal in a baseband, and a baseband low pass filter for removing low frequency noise from a signal amplified by the baseband amplifier.

Abstract: A loop-back self-test circuit (10) that has particular application for a cellular telephone base station, where the components of the self-test circuit (10) are integrated on a common integrated circuit chip (20). The transmit signal and an LO signal are applied to a mixer (28) to convert the frequency of the transmit signal to the frequency of a receive signal. A VCO (56) generates the LO signal and a PLL (26) synchronizes the phase of the VCO signal to the phase of a reference signal. A divided reference signal and a divided VCO signal are applied to a phase comparator (52) that generates an error signal indicative of the phase difference between the reference signal and the VCO signal. The error signal is applied to a charge pump (60) that generates a current signal to tune a tank circuit (66). A voltage signal from a loop filter (62) is applied to the VCO (56) to tune it to the LO frequency.

Abstract: An automatic frequency control (AFC) system in an electronic device is operated by using an AFC-algorithm component to determine a frequency error corresponding to a difference between a frequency of a signal output from a signal generator and a received signal frequency. The frequency error determined by the AFC-algorithm component is multiplied by a scaling factor, which is set to zero after an adjustment has been made to change a frequency of the signal output from the signal generator. The scaling factor is increased from zero to one over time. The scaled frequency error is used to determine whether to adjust the frequency of the signal output from the signal generator.

Abstract: An automatic frequency tuning (AFT) system which can effect immediate and accurate automatic frequency tuning of the local oscillator (LO) of a receiver, in order to achieve a stable intermediate frequency (IF) signal while reducing the power consumption and the cost of the system. In the automatic frequency tuning (AFT) system, an analog-to-digital converter (ADC) converts the intermediate frequency (IF) to a digital value which is sent to a microcontroller. A signal sent from the microcontroller accurately and automatically tunes the local oscillator (LO).

Abstract: Techniques are described that facilitate the generation of different waveforms at different frequencies required for transmission and reception of wireless voice signals and wireless data signals. For example, a technique may include generating a first waveform in a wireless communication device using a frequency synthesizer, wherein the first waveform has a frequency associated with a voice communication standard, and generating a second waveform in the wireless communication device using the same frequency synthesizer, wherein the second waveform has a frequency associated with a wireless networking standard. In this manner, a wireless communication device can be improved and possibly simplified.

Abstract: An impulse waveform generating apparatus comprises an oscillator for generating a reference signal having a center frequency in a frequency band of an impulse to generate, a timing matching circuit for shifting a phase of the reference signal by 90 degrees, a frequency demuultiplier for dividing a frequency of the phase shift signal and obtaining a timing signal having a frequency component having a frequency width of an impulse to generate, a memory storing a waveform shape table, a waveform forming section for forming a waveform in synchronism with the timing signal, according to information of a shape table having a predetermined waveform, a low-pass filter for obtaining an envelope signal from an output signal of the waveform forming section, and a waveform generating section for changing an amplitude of the reference signal according to a value of the envelope signal.

Abstract: A transceiver includes a Downstream Signal Processor (DSP), an Upstream Signal Processor (USP), a Local Oscillator (LO), a differencer, a reference signal generator, and an estimator. The DSP receives an initial downstream signal, a downstream LO signal from the LO, and from the estimator a frequency-offset estimate indicative of a free-running frequency offset included in the initial downstream signal. The DSP uses the LO signal and the estimate to frequency down-convert the initial downstream signal, and also to remove the frequency offset from the initial downstream signal, thereby producing a corrected downstream signal. The USP uses both an upstream LO signal from the LO and the estimate to frequency convert an initial upstream signal so as to produce a frequency pre-corrected upstream signal.

Abstract: A communication semiconductor integrated circuit device includes an RFVCO and a TXVCO and is formed over one semiconductor substrate, and has a first operation mode (idle mode) which does not perform transmission and reception, a second operation mode (warmup mode) which performs a preparation prior to the start of transmission or reception, and a third operation mode (transmission or reception mode) which performs transmission or reception. In the first operation mode, two oscillators are deactivated, and the operation of selecting a frequency band to be used in at least the TXVCO which generates a transmit signal, is performed in the second operation mode.

Abstract: Dispersing directions of oscillation frequency variable ranges of all voltage controlled oscillators provided in an integrated circuit are uniformed, and not only a range covering a frequency regardless of whether a dispersion occurs or not, but also a range covering the frequency only in a case where the dispersion occurs is used as the frequency variable range of the voltage controlled oscillator, and the frequency variable ranges of the voltage controlled oscillators are set so as to be successive with respect to each other, so that a small number of voltage controlled oscillators can cover a wide frequency variable range. Thus, the integrated circuit having voltage controlled oscillators therein is miniaturized.