Abstract: The invention relates to a receiver 1 of signals and proposes to remedy a non-linearity problem in an amplifier 70 of an integrated tuner 7.A linearity compensation circuit 8 is inserted upline from the tuner 7.The compensation circuit 8 presents a characteristic that is the inverse of the characteristic of the low-noise amplifier 708 in order to compensate for the linearity defect.

Abstract: Disclosed are systems and methods which utilize an image reject mixer in an out-of-band mixer application such as in a forward data channel frequency converter. For example, according to a preferred embodiment, an image reject mixer is utilized to provide a relatively high degree of image rejection with respect to an out-of-band signal, thereby relaxing the requirement for filtering in the signal path leading to the mixer circuitry. Preferred embodiments of the invention are substantially or fully implemented utilizing integrated circuit technology.

Abstract: The invention discloses an analog front end device comprising a band-gap voltage reference circuit and at least one conversion circuit, wherein the conversion circuit includes a clamper, an input buffer, a low-pass filter, a high frequency gain unit and an analog to digital converter. The analog front end device utilize a high frequency gain unit to increase high frequency gain of the image analog signal for increasing the usable number of sampling phase of the image analog signal.

Abstract: Methods and systems for reducing interference in a signal are disclosed herein. Aspects of the method may comprise generating a first local oscillator signal. The generated first local oscillator signal may be phase-shifted to generate a second local oscillator signal and the second local oscillator signal may be phase-shifted to generate a third local oscillator signal. The first, second, and third local oscillator signals may be combined to generate a combined local oscillator signal, where a third harmonic and/or a fifth harmonic may be eliminated from the combined local oscillator signal. The generated second local oscillator signal may be multiplied by a factor of square root of two (?{square root over (2)}). The first and third local oscillator signals may be added to the multiplied second local oscillator signal. An input signal may be mixed with the generated combined local oscillator signal to generate a mixed output signal.

Abstract: A receiving circuit is provided with an amplifier circuit for amplifying the electric signal received by an antenna circuit, a frequency converter/detector circuit for converting a frequency of the electric signal amplified by the amplifier circuit to acquire an intermediate frequency signal, and for detecting the intermediate frequency signal to acquire a demodulated signal, and a filter circuit for removing an intermediate frequency component from the demodulated signal acquired by the frequency converter/detector circuit.

Abstract: A wireless transmission device capable of transmitting media from different channels concurrently. The transmitter of the device places the inputted TV signals and an audio/video signal on different segments of a frequency spectrum, combines the signals of all segments into one combined signal, and transmits the combined signal as a radio frequency signal so as to transmit signals from different channels at the same time. Meanwhile, a controller in the receiver of the device selects a needed channel signal from the received radio frequency signal according to a selection signal. Therefore with one A/V transmitter and multiple A/V receivers, multiple-channel media transmission and multiple-channel media reception is achieved.

Abstract: A frequency converter according to one embodiment includes a quadrature pair of passive mixers whose input terminals are coupled to a differential radio-frequency input via the channel regions of transistors that are arranged to operate in the saturation region.

Abstract: An apparatus for improving dynamic range includes a frequency down-conversion module that receives an input signal and a bias circuit. The bias circuit includes a first resistor and a second resistor. The first resister has a first terminal coupled to a bias point and a second terminal coupled to a first voltage reference. The second resistor has a first terminal coupled to the bias point and a second terminal coupled to a second voltage reference. The bias point is coupled to the input signal. The frequency down-conversion module outputs a down-converted output signal. The bias circuit thereby adjusts a voltage of the input signal.

Abstract: A frequency synthesizer with a single PLL and multiple SSB mixers is presented. The frequency synthesizer includes a single PLL outputting a reference signal that is fed to a plurality of dividers coupled in sequence. The outputs from the dividers are mixed by the SSB mixers to produce signals with different frequencies. These signals with different frequencies can be selected through use of multiple selectors.

Abstract: Methods, systems, and apparatuses, and combinations and sub-combinations thereof, for down-converting and up-converting an electromagnetic (EM) signal are described herein. Briefly stated, in embodiments the invention operates by receiving an EM signal and recursively operating on approximate half cycles (½, 1½, 2½, etc.) of the carrier signal. The recursive operations can be performed at a sub-harmonic rate of the carrier signal. The invention accumulates the results of the recursive operations and uses the accumulated results to form a down-converted signal. In an embodiment, the EM signal is down-converted to an intermediate frequency (IF) signal. In another embodiment, the EM signal is down-converted to a baseband information signal. In another embodiment, the EM signal is a frequency modulated (FM) signal, which is down-converted to a non-FM signal, such as a phase modulated (PM) signal or an amplitude modulated (AM) signal.

Abstract: A mixer arrangement includes a first mixer having at least one signal input for receiving a first signal the frequency of which is to be changed. The mixer arrangement also includes at least one frequency input for receiving an input frequency and at least one output. The first mixer is configured to mix a first signal with an input frequency to provide an output which is output by the at least one output. A second mixer has at least one frequency input for receiving an input frequency and at least one output. At least one output of the first mixer and at least one output of the second mixer are combined to cancel unwanted components from the input frequency in the outputs of the mixers.

Abstract: A single chip superhetrodyne AM receiver is disclosed herein. To compensate for process variations in the implementation of the IC, bias currents setting the operating conditions for various amplifiers and other components in the system are adjusted based on frequency control signals in a PLL circuit in the local oscillator. Since the magnitude of the control signal reflects the process variations, the bias currents are adjusted based on the control signal to offset these variations in other portions of the receiver. To further improve the signal to noise ratio of the receiver, the IF filter is tuned within a range so as not to include any integer multiple or integer divisor of the timing reference frequency. Various techniques are described for enabling a complete superhetrodyne AM receiver to be implemented on a single chip which receives an antenna input signal and outputs a digital data signal.

Abstract: Methods and apparatuses for frequency selectivity and frequency translation, and applications for such methods and apparatuses, are described herein. The method includes steps of filtering an input signal, and down-converting the filtered input signal. The filtering and the down-conversion operations are performed in an integrated, unified manner. The apparatus described herein can be implemented as an integrated circuit (IC). The apparatus may include a module or modules for gain control.

Abstract: Frequency translation and applications of same are described herein, including cable modem applications. Such applications include, but are not limited to, frequency down-conversion, frequency up-conversion, enhanced signal reception, unified down-conversion and filtering, and combinations and applications of same. Furthermore, QAM, QPSK, and other modulation techniques are also described.

Abstract: An IDT produces a SAW when excited by a single electrical pulse and can be fabricated to embody a code, which code provides for a passive autocorrelation of a SAW input to the IDT and thereby lends itself to further application as a signal generator in a communication device. However, internal dimensions of IDTs are inversely proportional to operating frequency, such that high frequency IDTs present significant manufacturing difficulties. Fabrication of IDTs for high frequency applications is simplified by exploiting a harmonic frequency SAW generated by IDTs. An IDT may therefore be designed according to fundamental frequency internal dimension criteria but can operate at a multiple of the fundamental frequency, thereby providing much higher frequency operation than conventional SAW systems. Operation of a second harmonic SAW system at 2.4 GHz based on a fundamental frequency of 1.2 GHz is contemplated.

Abstract: A mixer, which is a single balanced mixer, includes an LO port for inputting an LO signal, an RF port for inputting an RF signal, an IF port for outputting an IF signal, a balun for converting an unbalanced signal into a balanced signal, and a pair of mixer diodes connected in series. The mixer further includes a high-pass filter for blocking LO and IF signals and passing an RF signal and a low-pass filter for blocking LO and RF signals and passing an IF signal.

Abstract: A base station for controlling transmission power during the establishment of a communication channel utilizes the reception of a short code during initial power ramp-up. The short code is a sequence for detection by the base station which has a much shorter period than a conventional access code. The ramp-up starts from a power level that is lower than the required power level for detection by the base station. The power of the short code is quickly increased until the signal is detected by the base station. Once the base station detects the short code, it transmits an indication that the short code has been detected.

Abstract: A phase alternating mixer is implemented by common-base differential transistor pairs, with two cross-coupled pairs providing a switching mixer function with harmonic gating suppression of harmonic responses to the switching mixing by control of local oscillator signals controlling switching of the differential transistor pairs. Rather than a resistive load, a switched capacitance load and integrating capacitors are connected to the output of the differential transistor pairs to provide first order low pass filtering of the double sideband output from the differential pairs, with a controlled bandwidth. Channel select switches demultiplex the double sideband signal into a baseband signal.

Abstract: A radio reception apparatus includes a reception portion receiving a radio signal, a local oscillation circuit outputting a first local oscillation signal, a local oscillation circuit outputting a second local oscillation signal, a mixer frequency-converting the received radio signal by multiplying the received radio signal by the first local oscillation signal and outputting the frequency-converted signal, a distribution circuit distributing the output signal of the mixer, and a mixer frequency-converting the output signal of the RF mixer by multiplying any one of the signals distributed by the distribution circuit by the second local oscillation signal and outputting the frequency-converted signal.

Abstract: A wireless receiver includes a local oscillator, a mixer, a band pass filter, a DC offset determination module, a DC offset correction module, a subtraction module, and a down converter. The local oscillator produces a local oscillation that a mixer uses to down convert the RF information signal to produce a Very Low Intermediate Frequency (VLIF) information signal at a VLIF and having a DC offset. The band pass filter band pass filters the VLIF information signal. The DC offset determination module produces a DC offset indication for the VLIF information signal. The DC offset correction module generates a DC offset correction based upon the DC offset indication. The subtraction module subtracts the DC offset correction from the VLIF information signal to substantially remove a DC offset of the post-filtered VLIF information signal. The down converter down converts the VLIF information signal to a baseband information signal.

Abstract: The invention relates to a frequency divider (1), in particular for radio frequency (RF) applications, wherein the division ratio can be expressed by a—preferably odd numbered integer—divisor. The frequency divider (1) comprises an input circuit (10), which receives an input signal (5) as well as a first output signal (25). The input circuit (10) generates an intermediate signal (15), which has at least one main spectral component whose frequency corresponds to the sum or the difference of frequencies of said main spectral components of said input (5) and first output signal (25). Further, the frequency divider (1) of the invention has an output circuit (20), which receives said intermediate signal (15) and generates said first output signal (25). The main spectral component of said first output signal (25) has a frequency corresponding to the frequency of the main spectral component of said intermediate signal (15) divided by a—preferably even numbered integer.

Abstract: The present invention provides a passive RFID chip with on-chip charge pumps for generating electrical power for the chip from radio frequencies. The passive RFID chip comprises an analog portion and a digital portion. The analog portion primarily comprises a voltage sensor and an AM data detector. The digital portion comprises a state machine digital logic controller. Incoming RF signals enter the chip via external antennas. The RF signals are converted into regulated DC signals by RF-DC converters with the voltage sensor. The RF-DC converters provide power for all the on-chip components and hence the chip does not require external power supply. The incoming RF signals are demodulated by demodulators and enter the AM data detector where the envelope transitions are detected. A voltage alarm is provided to ensure the voltage level does not drop below an operational level of the chip.

Abstract: A receiver apparatus including a main input for receiving the input signal and a first standard mixer having a first mixer input, a first local oscillator input, and a first mixer output. The first mixer input is connected to the main input and the first local oscillator input is connected to a source that provides a first local oscillator signal having a frequency close to or equal to the carrier frequency. The apparatus further including a second mixer with a second mixer input, a second local oscillator input, and a second mixer output. The second mixer input is connected to the main input and the second local oscillator input is connected to a source that provides a second local oscillator signal with an undesired sideband frequency. There are circuit for super-positioning the first output signal and the second output signal. The first local oscillator signal and the second local oscillator signal are square-wave signals.

Abstract: A frequency generation apparatus and a method are provided. The frequency generation apparatus for generating a plurality of center frequencies for use in multi-band hopping communication, includes: an oscillator generating an oscillation frequency; a reference frequency generator multiplying the oscillation frequency by a first multiplication rate to generate a reference frequency; a compensation frequency generator multiplying the oscillation frequency by a second multiplication rate to generate a compensation frequency for compensating for the influence of a frequency offset of the oscillation frequency; and a center frequency generator generating the plurality of center frequencies using the reference frequency and the compensation frequency. Therefore, by compensating for the influence of a frequency offset of an oscillation frequency on the generation of center frequencies, it is possible to generate stable center frequencies.

Abstract: The present invention relates generally to communications, and more specifically to a method and apparatus for minimizing DC offset and second-order modulation products (IM2 noise) while demodulating RF signals. The principle of the invention can be applied to differential, down-conversion circuits (50) consisting of two differential mixers (54, 56) in series, a follows: a pair of current sources Ia and Ib are used to provide current to positive and negative channels of the first differential mixer (54). Providing current to the amplifying transistors of the first mixer (54) reduces the current drawn through the active mixer switches, reducing the noise generated. The current sources 1a and 1b are trimmed in a complementary manner where 1a=I+Delta1, and 1b=Delta1. The value of ?1 can be determined in a number of manners; for example, it could be established by testing after the circuit has been fabricated, and the value stored on-chip, for future use.

Abstract: A frequency conversion unit includes a local oscillator, a phase compensator, and a mixer. The local oscillator generates differential original oscillating signals. The phase compensator generates differential compensated oscillating signals mixed with differential received signals by the mixer to generate differential baseband signals. The respective duty cycles of the compensated oscillating signals are adjusted for minimizing intermodulation distortion in the baseband signals.

Abstract: The current-folded mixer of this invention comprises an input stage and a switching stage. The input stage receives a radio frequency input RF and generates a modulated bias current to the switching stage. The switching stage has a switching pair, connected to a common node, to receive an input signal and said modulated bias current to generate an output signal in accordance with the input signal and the modulated bias current. The current-folded mixer uses a capacitor to separate the bias current of the input stage and the switching stage and an inductor in the switching stage to supply bias current.

Abstract: This invention provides a paging method for Multimedia Broadcast/Multicast Service in mobile communication system. The paging process and radio resource setup process are merged in this method to try to reduce uplink responses. This invention extends existing PCH IubFP frame structure by adding MBMS Indication bit(MI) to PCH IubFP frame. The PCH IubFP frame includes Paging Indication (PI) and Paging Message. Paging message carries MBMS service information. MBMS Service Identity or MBMS Paging Indicator is added to the reserved 12 bits in Paging Indicator Channel (PICH) frame structure. Radio Network Controller (RNC) transfers Paging Indicator Message and paging message to Base Station (Node B) so as to send over the air-interface.

Abstract: The present invention relates to a balanced circuit arrangement and methods for linearizing and calibrating such a circuit arrangement, wherein linearization is obtained by introducing a load imbalance between the output branches of the balanced circuit arrangement. Thus, a controllable extraneous imbalance is created between the output loads of the balanced circuit arrangement to thereby obtain a linearization by means of even-order non-linearity.

Abstract: A local oscillator (LO) generator for driving a bank of mixers that provides precise phase relationship between multi-phase LO outputs comprises a shift register using slave-master-slave flip-flop elements. The LO generator can be used over a wide operating frequency range. The LO generator is suitable for driving a multi-phase LO clock input to a harmonic suppression mixer. A pattern generator produces a pattern signal and a reclocking signal that determines the frequency of the LO signals and the phase delay between the LO output phases.

Abstract: A receiver including a frequency converter which converts a frequency of a received signal according to a control signal to obtain a frequency-converted received signal, and an AFC (automatic frequency controller) which converts the frequency-converted received signal into a data converted signal, which compares respective phases of the data converted signal and a previous data converted signal to generate a first phase difference value, which compares respective phases of the data converted signal and the previous data converted signal to generate a second phase difference value, which generates a loop gain value according to the first and second phase difference values, and which generates the control signal according to the first phase difference value and the loop gain value.

Abstract: System and method for elimination of close-in interferers through feedback. A preferred embodiment comprises an interferer predictor (for example, interferer predictor 840) coupled to a digital output of a direct RF radio receiver (for example, radio receiver 800). The interferer predictor predicts the presence of interferers and feeds the information back to a sampling unit (for example, sampling unit 805) through a feedback circuit (for example, feedback unit 845) through the use of charge sharing. The interferers are then eliminated in the sampling unit. Additionally, the number and placement of zeroes in a filter in the sampling unit is increased and changed through the implementation of arbitrary-coefficient finite impulse response filters.

Abstract: An amplitude-locked loop (ALL) includes: a comparator circuit having a first input, a second input and an output, said first input receiving an electric reference signal; a loop filter having an input connected to said output of said comparator circuit and having an output generating an electric control signal (Vtune); a circuit generating an electric signal to be controlled, transmitted to said second input of said comparator circuit. The circuit comprises an acoustic resonator having a BAW-type resonator having a first and second resonant frequencies and associated with a first inductive partner element for removing said second resonant frequency and with a second capacitive partner element for tuning said first resonant frequency, said at least first resonator component being adjustable via said electric control signal (Vtune).

Abstract: A received low-frequency standard radio wave, which is an amplitude modulation signal, is converted to an intermediate frequency signal Sa, and is output to a detection circuit and an AGC circuit. The detection circuit and AGC circuit generates an RF control signal Sf1 and IF control signal Sf2 from the input intermediate frequency signal Sa, and controls an RF control circuit and IF control circuit by outputting the generated RF control signal Sf1 and IF control signal Sf2 to the RF control circuit and IF control circuit. By this a radio wave reception device can speed up AGC operation.

Abstract: An apparatus for transmitting and receiving a signal in Code Division Multiple Access/Orthogonal Frequency Division Multiplexing (CDMA/OFDM) system is provided. The apparatus discriminates user signals with a unique spreading code and the orthogonal codes, increases data transmission rate with the non-binary value without increasing of entire bandwidth used by the users, solves signal interference with interleaver and diversity effect of interleaving and OFDM, and maximizes transmission efficiency by varying modulation schemes depending on channel states.

Abstract: A start signal output circuit having an RF/DC conversion circuit to which radio frequency power (RF) of specified frequency is inputted and from which a direct current potential (DC) is outputted, comprises a detection/amplification circuit 210 which includes a voltage doubler wave-detector circuit 10 configured including a sensing diode Q1 (Tr34) for sensing the RF power, a differential amplifier including differential pair transistors Tr31 and Tr32, and a current mirror circuit. A base current of one Tr31 of the differential pair transistors is brought into substantial agreement with a DC component of a current flowing through the sensing diode Q1 (Tr34). A total of currents flowing through the differential pair transistors Tr31 and Tr32 is regulated to a substantially constant value by the current mirror circuit. Thus, the start signal output circuit which is small in size, high in sensitivity and low in power consumption can be realized.

Abstract: By using ICs with combined inputs for the VHF-high bandpass circuit and the UHF bandpass circuit, undesirable resonances occur which are caused by one of the tuned circuits. The problem is solved by providing a switching means for decoupling the UHF bandpass circuit from the combined inputs when a VHF-high band signal is received by the VHF-high bandpass circuit. The switching means comprises a switch coupled between the UHF bandpass circuit and the common inputs.

Abstract: An apparatus for frequency up conversion and down conversion using frequency multiplier circuits. The frequency multiplier circuits receive a lower frequency signal and are operated in a forward direction to provide a higher frequency output. The same frequency multiplier circuits are operated in a reverse direction by receiving a higher frequency signal and producing a lower frequency output. The frequency multiplier circuits preferably use heterojunction barrier varactor diodes to eliminate the need for DC bias or idler circuitry.

Abstract: The present invention relate to a wideband frequency generating apparatus using a frequency dividing method of dividing a frequency signal of a voltage control oscillator to expand a frequency generating range.

Abstract: A method is disclosed for operating a RF receiver of a communications equipment, as is circuitry for implementing the method. The method includes, while operating under the control of a data processor of the communications equipment, generating a calibration signal; injecting the calibration signal into a low noise amplifier (LNA) of the RF receiver; measuring a downconverted response of the receiver at a plurality of different frequencies of the calibration signal, or measuring the downconverted response of the receiver at a plurality of different LNA tuning combinations using a fixed calibration frequency, and at least one of tuning a resonance frequency of at least one LNA resonator based on the measured downconverted response so as to compensate at least for variations in component values that comprise the at least one resonator, or adjusting the linearity of the receiver.

Abstract: A local oscillation generator includes a clock circuit, a first divide module, a first mixing module, a second divide module, and a second mixing module. The clock circuit is operably coupled to generate a first clock signal. The first divide module is operably coupled to divide rate of the first clock signal by a first factor to produce a second clock signal. The first mixing module is operably coupled to mix the first clock signal and the second clock signal to produce a first local oscillation. The second divide module is operably coupled to divide rate of the second clock signal by a second factor to produce a third clock signal. The second mixing module is operably coupled to mix the first clock signal and the third clock signal to produce a second local oscillation.

Abstract: Methods, systems, and apparatuses for down-converting an electromagnetic (EM) signal by aliasing the EM signal are described herein. Briefly stated, such methods, systems, and apparatuses operate by receiving an EM signal and an aliasing signal having an aliasing rate. The EM signal is aliased according to the aliasing signal to down-convert the EM signal. The term aliasing, as used herein, refers to both down-converting an EM signal by under-sampling the EM signal at an aliasing rate, and down-converting an EM signal by transferring energy from the EM signal at the aliasing rate. In an embodiment, the EM signal is down-converted to an intermediate frequency (IF) signal. In another embodiment, the EM signal is down-converted to a demodulated baseband information signal. In another embodiment, the EM signal is a frequency modulated (FM) signal, which is down-converted to a non-FM signal, such as a phase modulated (PM) signal or an amplitude modulated (AM) signal.

Abstract: A circuit for frequency translating a radio frequency signal comprises a plurality of mixer stages, each stage associated with a particular range of frequencies of a radio frequency signal. The circuit further comprises a switching circuit that communicates the radio frequency signal to a selected one of the plurality of mixer stages in response to a control signal. The selected mixer stage comprises a phase generation circuit that generates a plurality of phase signals, and at least one mixer that combines the radio frequency signal with one of the plurality of phase signals to generate at least a portion of an intermediate frequency signal.

Abstract: Frequency translation, such as frequency up conversion of a video baseband or intermediate frequency to a desired frequency division broadcast channel, is provided utilizing a single sideband or image reject mixer and filtering having relaxed selectivity requirements. According to a preferred embodiment, a first single sideband mixer accepts an input signal at an intermediate frequency and up converts this signal to a high intermediate frequency. The image rejection provided by the single sideband mixer in combination with simple filtering provide sufficient signal quality to achieve desired levels of desired signal isolation, such as on the order of 40 dB. Preferably, a second single sideband mixer accepts the high intermediate frequency signal and down converts this signal to a desired transmission or broadcast frequency.

Abstract: Because there are different voltages at two current output terminals of a current divider, the voltages at the current input terminals of two current switch circuits are not affected mutually even with a large amplitude of local signals. Accordingly, the performance of a quadrature mixer can be enhanced by increasing the amplitude of the local signals. Bias currents are supplied to the two current switch circuits through the current divider from a common DC current source which essentially supplies a bias current to a V/I converter and, therefore, power consumption is reduced.

Abstract: Precision in adjustment of filtering characteristics of a high frequency device is improved by providing a high frequency device comprising a first filter, a frequency converter, and a second filter. The high frequency device comprises a high frequency filter for extracting signal components in a predetermined frequency band from an input signal; a frequency converter for converting frequency of the signal components extracted by the high frequency filter; and an intermediate frequency filter for extracting signal components in a predetermined frequency band from the signal components, the frequency of which is converted by the frequency converter. The high frequency device further comprises a bypass circuit provided in parallel to the intermediate frequency filter downstream of the high frequency filter; and a switching mechanism including a switching circuit for switching connection of a signal path downstream of the high frequency filter to either the intermediate frequency filter or the bypass circuit.

Abstract: A system, method, and computer program product for automatically exchanging objects in a wireless mobile environment. The invention operates by transmitting a request for objects to a source, receiving at least some of the requested objects from the source, and processing the received objects. The invention uses a frequency down-conversion module that comprises a switch, a capacitor coupled to the switch, and a pulse generator coupled to the switch. The pulse generator outputs pulses to the switch, where the pulses have apertures and cause the switch to close and sub-sample a carrier signal over the apertures. Energy is transferred from the carrier signal and stored using the capacitor during the apertures of the pulses, and a lower frequency signal is generated from the transferred energy.

Abstract: A multimode wireless communication includes a digital baseband processing module, an analog to digital converter module, a digital to analog converter module, a first radio section, and a second radio section. The digital baseband processing module is operably coupled to convert outbound data into outbound digital baseband signals and to convert inbound digital baseband signals into inbound data. The analog to digital converter module is operably coupled to convert inbound analog baseband signals into the inbound digital baseband signals. The digital to analog converter module is operably coupled to convert the outbound digital baseband signals into outbound analog baseband signals. The first radio section is operably coupled to convert the outbound analog baseband signals into first outbound radio frequency (RF) signals and to convert first inbound RF signals into the inbound analog baseband signals when the wireless communication device is in a first mode of operation.

Abstract: A method for I/Q mismatch calibration of a receiver having an I/Q correction module with correction parameters, comprising the steps of generating a test signal containing a single tone waveform with frequency of a carrier frequency plus a predetermined frequency, applying I/Q demodulation to reduce the central frequency of the test signal and outputting a demodulated signal, converting the demodulated signal to a digital signal, obtaining measures of the digital signal respectively indicative of the frequency response of the digital signal at the plus and minus predetermined frequencies, and calculating the set of the correction parameters for the I/Q correction module based on the measures.

Abstract: Calibration of a phase locked loop and applications thereof within a radio frequency integrated circuit begins by determining an intersection of an up current and down current produced by a charge pump within the phase locked loop. The RFIC then determines a reference voltage corresponding to the intersection, which varies from an ideal voltage of VDD/2 based on process variations. The RFIC then offsets a control voltage to the voltage control oscillator (VCO) of the phase locked loop based on the reference voltage. Accordingly, by determining the offset of the actual intersection from the ideal intersection, the control voltage to the VCO may be adjusted thereby calibrating the phase locked loop for more linear performance.