Including Program Initialization (e.g., Program Loading) Or Code Selection (e.g., Program Creation) Patents (Class 702/119)
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Patent number: 10289529Abstract: A computer-implemented method includes executing one or more test programs on a computing device, where the computing device includes a Guarded Storage (GS) facility managing use of GS. Each test program of the one or more test programs comprises a respective GS event, and each respective GS event prompts execution of a respective garbage reclaim function associated with the GS. A memory storage is analyzed, by a computer processor, to verify expected operation of each of the one or more test programs. Test results of the one or more test programs are determined based on the analyzing the memory storage. A remedial action is performed in response to the test results of the one or more test programs.Type: GrantFiled: January 26, 2017Date of Patent: May 14, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Ali Y. Duale, Shailesh R. Gami, Mohammed Shammas, Dennis W. Wittig
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Patent number: 10267834Abstract: There is a need for high-order frequency measurement without greatly increasing consumption currents and chip die sizes. A semiconductor device includes: an electric power measuring portion that performs electric power measurement; a high-order frequency measuring portion that performs high-order frequency measurement; and a clock controller that supplies an electric power measuring portion with a first clock signal at a first sampling frequency and supplies a high-order frequency measuring portion with a second clock signal at a second sampling frequency. The second sampling frequency is higher than the first sampling frequency.Type: GrantFiled: October 30, 2017Date of Patent: April 23, 2019Assignee: Renesas Electronics CorporationInventors: Makoto Shuto, Kazuyoshi Kawai, Mitsuya Fukazawa, Robert Nolf, Robert Dalby
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Patent number: 10242060Abstract: A method of aggregating and using medical device data from a plurality of remote institutions. The system and method electronically receives at a central computer system a plurality of established medical device data, each of the plurality of established medical device data being received from a respective medication delivery system, each of the respective medication delivery systems having a respective plurality of medical devices within the respective remote institution, such as medication delivery pumps, associated therewith and utilized therein. The system and method electronically combines and stores the plurality of established medical device data from each of the plurality of remote institutions within a memory, and electronically provides a remote client computer access to at least one of a central reporting application adapted for providing summary information to the remote client computer about the medical device data, and/or other applications.Type: GrantFiled: October 30, 2014Date of Patent: March 26, 2019Assignee: ICU MEDICAL, INC.Inventors: Steven I. Butler, Todd M. Dunsirn, Douglas E. Frede, Nancy G. Hedlund, Thomas F. Polonus, Steven J. Pregulman, Torrance J. Ramaker, James E. Tillery, Mary Kaye Van Huis
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Patent number: 10156426Abstract: Test systems coupled to a device under test (DUT) with different segments or stages and related methods are provided. Exemplary test systems include logic that executes concurrent determinations or tests for multiple DUT segments or stages. Exemplary test systems can include logic that concurrently executes various tests associated with different DUT segments including determinations or testing for a specified DUT test environment, determinations or tests of when data will be made available to various DUT segments, and various determinations or tests that may be completed before data is made available to specified DUT segments. At least one embodiment of a first stage concurrent determination test system determines first stage tests do not require a specified target and high pressure gas conditions for DUT testing and at least one embodiment of a second stage concurrent test system does require a specified target and high pressure gas conditions for DUT testing.Type: GrantFiled: June 21, 2016Date of Patent: December 18, 2018Assignee: The United States of America, as represented by the Secretary of the NavyInventor: Mark Halter
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Patent number: 10115446Abstract: A nonvolatile error buffer is added to STT-MRAM memory design to reduce the error correction coding ECC required to achieve reliable operation with a non-zero Write Error Rate (“WER”). The error buffer is fully associative, storing both the address and the data of memory words which have failed to write correctly within an assigned ECC error budget. The write cycle includes a verify to determine if the word has been written correctly. The read cycle includes a search of the error buffer to determine if the address is present in the buffer.Type: GrantFiled: April 19, 2016Date of Patent: October 30, 2018Assignee: SPIN TRANSFER TECHNOLOGIES, INC.Inventors: Benjamin Stanley Louie, Neal Berger
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Patent number: 10074290Abstract: An apparatus with a memory that has a learning database and a user database. The learning database has a set of details to be learned and the user database has a user profile. The user profile has a weighing vector of weighing parameters corresponding to the set of details. The apparatus further has a processor configured to test a user for particular details in an order that is at least partly based on the weighing parameters. The processor is further configured to adjust the weighing parameter corresponding to a given detail depending on whether the user has passed the test. Also corresponding methods and computer programs are disclosed.Type: GrantFiled: October 20, 2009Date of Patent: September 11, 2018Assignee: WordDive Ltd.Inventor: Timo-Pekka Leinonen
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Patent number: 10009940Abstract: A method for Internet Protocol communication from a communications server to a mobile terminal includes receiving data for communication to the mobile terminal, the data received at the communications server, identifying the unavailability of an Internet Protocol connection with the mobile terminal, and initiating the delivery of a message for establishing an Internet Protocol connection with the mobile network to the mobile terminal in response to the determination that an Internet Protocol connection is unavailable.Type: GrantFiled: March 30, 2015Date of Patent: June 26, 2018Assignee: Seven Networks, LLCInventor: Ari Backholm
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Patent number: 9977449Abstract: This HEMS (200) is provided with a control unit (230) that, if an operation directive does not go through a server (600) provided externally to a customer's home (10), identifies said operation directive as having come from within the customer's home, and if the operation directive does go through the server (600) provided externally to the customer's home (10), identifies the operation directive as having come from outside the customer's home.Type: GrantFiled: April 8, 2014Date of Patent: May 22, 2018Assignee: KYOCERA CorporationInventors: Kazutaka Nakamura, Takashi Inoue, Daisuke Hoshi
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Patent number: 9892022Abstract: An article of manufacture comprises a computer readable medium having stored therein a computer program for a method for debugging of a production application, the computer program comprising a first code segment which, when executed on a computer, accesses a context object associated with an application method of the production application, such that the application method is mapped to an application name and execution of the application method can be replaced by a first pre-defined replacement method; a second code segment which, when executed on the computer, accesses a test module containing one or more overrides and a reference to the application method, where the override is associated with the first pre-defined replacement method and is associated with the application name associated with the context object; a third code segment which, when executed on the computer, accesses a debugging user interface for implementing one or user interactions, each interaction associated with a method mapping on the coType: GrantFiled: March 25, 2016Date of Patent: February 13, 2018Assignee: VMware, Inc.Inventor: Dave Shanley
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Patent number: 9843437Abstract: A method and a corresponding device for providing a delay value of a communication electronic unit. A digital input signal is delayed by a delay element. The input and the output signals of the delay element are sampled and the sampled signals are compared. A mismatch counter is incremented when the amplitudes of the sampled signals are not equal and a signal transition counter N is incremented when the input signal transitions. The provided delay value is proportional to the mismatch counting value, proportional to the length of the sampling intervals and inversely proportional to the signal transition counting value.Type: GrantFiled: June 2, 2015Date of Patent: December 12, 2017Assignee: Lantiq Beteiligungs-GmbH & Co. KGInventors: Juraj Povazanec, Biju Sukumaran, Mario Traeber
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Patent number: 9836297Abstract: Embodiments herein describe computer implemented methods and systems for automatically deploying and versioning scripts in a computing environment. One embodiment includes validating a plurality of scripts associated with an application stored in a repository server by executing the plurality of scripts in a first database, creating at least one patch file comprising at least one of the plurality of scripts upon successful validation of the plurality of scripts associated with the application, and automatically storing the at least one patch file in the repository server, where the at least one of the plurality of scripts are automatically versioned in the repository server. Further embodiments herein enable the plurality of users to track patch files by automatically storing the plurality of scripts with updated comments from the plurality of users. Further, a notification mechanism for alerting the plurality of authorized users about the change to the plurality of scripts is provided.Type: GrantFiled: August 21, 2015Date of Patent: December 5, 2017Assignee: Tata Consultancy Services LimitedInventor: Tejas Kotian
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Patent number: 9792201Abstract: A test support device which can test all configurations of a system including a specific system component, comprehensively and quickly, is provided. A test support device (100) includes a storage unit (102) and an extraction processing unit (101). A configuration of a system is defined with a plurality of functionalities to be maintained by the system and a set of programs implementing the functionalities respectively. The storage unit (102) stores component-relation information (201) which indicates an identifier of each of one or more systems, an identifier of each of a plurality of functionalities to be maintained by each of the systems, and an identifier of each of one or more programs being capable of implementing each of the functionalities.Type: GrantFiled: December 6, 2013Date of Patent: October 17, 2017Assignee: NEC CORPORATIONInventor: Takayuki Kuroda
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Patent number: 9788219Abstract: A system, method, and computer program product are provided for remotely driving mobile web application testing on mobile devices. In use, a secure connection is established between a test manager residing on a test management system and a mobile web application residing on a mobile device associated with a user, the secure connection being established to remotely drive one or more automated tests of the mobile web application residing on the mobile device by the test manager residing on the test management system. Additionally, a test scenario is sent from the test manager residing on the test management system to a test driver runtime component of the mobile web application residing on the mobile device, the test scenario including one or more steps for automatically testing the mobile web application residing on the mobile device.Type: GrantFiled: August 17, 2016Date of Patent: October 10, 2017Assignee: Amdocs Development LimitedInventors: Christophe Regis Jean-Jacques Michel, Pierre-Erwann Gouesbet, Jean-François Pierre Marie Greffier
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Patent number: 9756451Abstract: There provides an information processing method and a terminal apparatus, and the information processing method is applied in the terminal apparatus, and the terminal apparatus is able to be connected with a remote server. The information processing method includes obtaining a first operation for a first operating environment of a specific user of the terminal apparatus in the first operating environment; responding to the first operation by the first operating environment; transmitting first parameter information of the first operation and second parameter information of the first operating environment in response to the first operation to the remote server; receiving customized configuration information or customized prompt information related to the specific user from the remote server; configuring the first operating environment to provide optimized customized configuration or customized prompt to the specific user based on the customized configuration information or the customized prompt information.Type: GrantFiled: August 14, 2014Date of Patent: September 5, 2017Assignee: LENOVO (BEIJING) CO., LTD.Inventors: Zhiqiang He, Chentao Yu, Dong Li
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Patent number: 9747144Abstract: There are provided a function processing apparatus and function processing method dynamically process network function using commands. A function processing apparatus includes a communication unit for performing communication with at least one user interface and at least one software component, and a controller for, if first command related information is received from the at least one software component, forming a command tree on the basis of the first command related information and transmitting the first command related information to the at least one user interface, and, if second command related information is received from at least one user interface, transmitting the second command related information to a software component corresponding to the second command related information.Type: GrantFiled: June 23, 2016Date of Patent: August 29, 2017Assignee: Electronics and Telecommunications Research InstituteInventors: Pyung Koo Park, Hyub Woo Jeon, Ho Yong Ryu
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Patent number: 9704171Abstract: A computer-implemented method and system for quantifying and tracking software application quality based on aggregated user reviews.Type: GrantFiled: June 5, 2013Date of Patent: July 11, 2017Assignee: Applause App Quality, Inc.Inventors: Jason Arbon, Jeffrey Carollo, Roy Solomon, Sebastián Schiavone-Ruthensteiner, Heidi A. Young, Jason M. Stredwick
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Patent number: 9704383Abstract: A method of and apparatus for calibration of instrumentation and provision of calibration certificates comprises a portable field operable communication device and a remote information management device in wireless communication with one another, a data store comprising information related to each instrument to be calibrated, the portable device being operable to receive calibration requests from the management device and to facilitate input of data from an instrument the subject of calibration, and the management device being operable to facilitate generation of a calibration certificate or error report subsequent to receipt of input data from the portable device.Type: GrantFiled: October 29, 2015Date of Patent: July 11, 2017Assignee: Invensys Systems, Inc.Inventors: Paramjit Chana, David Mitchell, Karl Haigh
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Patent number: 9679232Abstract: An electronic apparatus includes the following elements. A circuit forming device forms a circuit configured in accordance with configuration information. A first storage unit stores first configuration information externally obtained via a first communication line. The first configuration information is used for forming a first circuit implementing a function including a first communication function in the circuit forming device. A second storage unit stores second configuration information different from the first configuration information. The second configuration information is used for forming a second circuit implementing a function including the first communication function in the circuit forming device.Type: GrantFiled: March 8, 2016Date of Patent: June 13, 2017Assignee: FUJI XEROX CO., LTD.Inventors: Tatsuji Shimizu, Yoshinori Awata, Masahiro Ishiwata, Tsutomu Nagaoka, Keiichi Ito
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Patent number: 9632134Abstract: A wafer is probed using a probe card including a plurality of probing sites following a first probing map in which touchdowns of the probe card involve the plurality of probing sites to identify faulty locations. Whether at least one faulty site exists is determined based on the faulty locations. When the at least one faulty site exists, a second probing map in which each touchdown is free of at least one disabled probing site including the at least one faulty site is obtained. The second probing map is selected when a first criterion formed using a first touchdown count (TDC) in the first probing map, a second TDC in the second probing map, a third TDC based on re-probing the faulty locations and a fourth TDC based on re-probing a portion of the faulty locations not induced by the at least one faulty site is met.Type: GrantFiled: May 15, 2015Date of Patent: April 25, 2017Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Jing-Cheng Wu, Kai-Sheng Chang, Ming-Shan Shih, Yu-Chih Lee, Feng-Cheng Chiang
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Patent number: 9600267Abstract: Software that dynamically updates virtual machine templates at deterministic intervals in order to reduce patching time, by performing the following operations: (i) identifying a virtual machine (VM) provisioned according to a first VM template; (ii) initiating a patching process that applies a set of patch(es) to the VM, thereby creating a patched VM; (iii) determining that an amount of time taken to complete the patching process is greater than a predetermined threshold; and (iv) responsive to determining that the amount of time taken to complete the patching process is greater than the predetermined threshold, generating a second VM template based, at least in part, on the patched VM.Type: GrantFiled: June 15, 2015Date of Patent: March 21, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Thomas E. Chefalas, David M. Egle, Daniel L. Hiebert, Dennis D. Jurgensen, Arthur J. Meyer, III, David M. Schultz, Peter A. Singh
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Patent number: 9483386Abstract: The present invention proposes an information interaction testing device and method based on the associated testing case automatic generation. The associated testing case generation module in said device may automatically generate the associated testing case files corresponding to all associated information interactions which can be triggered by said reference information interaction based on the reference information interaction and the predefined rules determined by the application type provided by the system under test. The information interaction testing device and method based on the associated testing case automatic generation disclosed in the present invention have the higher testing speed and the higher testing usability as well as are low-cost.Type: GrantFiled: December 31, 2012Date of Patent: November 1, 2016Assignee: CHINA UNIONPAY CO., LTD.Inventors: Zhijun Lu, Lijun Zu, Xingjian Wang, Shuo He, Hua Cai
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Patent number: 9477585Abstract: System and method for testing a device under test (DUT) that includes a multiprocessor array (MPA) executing application software at operational speed. The application software may be configured for deployment on first hardware resources of the MPA and may be analyzed. Testing code for configuring hardware resources on the MPA to duplicate data generated in the application software for testing purposes may be created. The application software may be deployed on the first hardware resources. Input data may be provided to stimulate the DUT. The testing code may be executed to provide at least a subset of first data to a pin at an edge of the MPA for analyzing the DUT using a hardware resource of the MPA not used in executing the application software. The first data may be generated in response to a send statement executed by the application software based on the input data.Type: GrantFiled: November 8, 2013Date of Patent: October 25, 2016Assignee: COHERENT LOGIX, INCORPORATEDInventors: Geoffrey N. Ellis, John Mark Beardslee, Michael B. Doerr, Ivan Aguayo, Brian A. Dalio
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Patent number: 9473564Abstract: An information processing system includes a packet receiving unit, a registration unit, and a software specification unit. The packet receiving unit receives a packet flowing in a communication network. The registration unit registers one or more devices connected to the communication network. The software specification unit specifies a software application installed in a registered device among the one or more registered devices, on the basis of information regarding a file contained in the packet, the packet being transmitted or received by the registered device.Type: GrantFiled: March 20, 2014Date of Patent: October 18, 2016Assignee: FUJI XEROX CO., LTD.Inventor: Takashi Hoshino
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Patent number: 9465722Abstract: Embodiments of the invention are directed to a system, method, and computer program product for assessing error notifications associated with one or more application functions. An exemplary embodiment includes receiving an indication of an error associated with at least one function in an application; extracting information associated with the application from one or more sources; and initiating a presentation of a second user-interface to enable a user to resolve the error, wherein the second user-interface comprises at least one of an aggregation of the information extracted from the one or more sources.Type: GrantFiled: July 21, 2014Date of Patent: October 11, 2016Assignee: BANK OF AMERICA CORPORATIONInventors: Muthusamy Periyasamy, Manoj Kumar Singh, Solomon Anand Raj Ambrose
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Patent number: 9430230Abstract: The present application relates to a method and a processing system for automated managing of the usage of alternative code. Code sections including original code and alternative code are retrieved from a code basis and the retrieved code is analyzed to detect an alternative code section. A condition definition associated with the identified alternative code section is further retrieved and the condition of the retrieved condition definition is evaluated. The identified alternative code section is activated in accordance with the evaluation result.Type: GrantFiled: August 14, 2014Date of Patent: August 30, 2016Assignee: Freescale Semiconductor, Inc.Inventors: Tobias Thiel, Markus Regner, Michael Rohleder
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Patent number: 9391447Abstract: An interposer is described to regulate the current in wafer test tooling. In one example, the interposer includes a first connection pad to couple to automated test equipment and a second connection pad to couple to a device under test. The interposer further includes an overcurrent limit circuit to connect the first and second connection pads and to disconnect the first and second connection pads when the current between the first and second connection pads is over a predetermined amount.Type: GrantFiled: March 6, 2012Date of Patent: July 12, 2016Assignee: Intel CorporationInventors: Evan M. Fledell, Paul B. Fischer, Roy E. Swart, Timothy J. Maloney, Jack D. Pippin
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Patent number: 9354275Abstract: Testing an integrated circuit in a test environment that includes a virtual test engine and a test system with an integrated circuit tester. The integrated circuit is connected to the virtual test engine via the integrated circuit tester, and the integrated circuit tester is connected to the integrated circuit via an interface. The virtual test engine communicates with the integrated circuit tester via a command interface to perform functional test during functional test mode and to perform non-functional test during non-functional test mode.Type: GrantFiled: May 20, 2014Date of Patent: May 31, 2016Assignee: GLOBALFOUNDRIES INC.Inventors: Birol Akdemir, Thomas Gentner, Oliver Marquardt
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Patent number: 9311211Abstract: Systems and methods related to performance measurement and reporting are described. In one method, a first application is profiled in a first profiling session to generate a first parameter dataset related to performance of segments of the first application. A session report is created based on the first parameter dataset. Further, based in part on the session report, comments for one or more of the segments of the application are received. A consolidated report is then generated based on the first parameter dataset and the comments.Type: GrantFiled: February 28, 2012Date of Patent: April 12, 2016Assignee: Tata Consultancy Services LimitedInventors: Swarup Chatterjee, Kallol Saha Chowdhury, Somnath Sengupta
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Patent number: 9294584Abstract: In one embodiment, a router establishes a serial-over-TCP/IP (Transmission Control Protocol/Internet Protocol) communication session between terminal units using raw-TCP encapsulation. For the session, the router maps serial characters to TCP out-of-band (OOB) communication fields, maps serial flow control signals to TCP/IP receiver-window advertisements, and dynamically adjusts a TCP/IP priority based on serial payload priority. Accordingly, the router may thus communicate data over the serial-over-TCP/IP session based on the mappings and priority.Type: GrantFiled: June 19, 2013Date of Patent: March 22, 2016Assignee: Cisco Technology, Inc.Inventors: Atul B. Mahamuni, Carol Barrett
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Patent number: 9281080Abstract: A system for testing a device under test (DUT) includes a test controller unit that includes a first memory operable to store a data pattern; a bridge circuit that includes a second memory that is smaller than the first memory, and a functional unit that includes a third memory that is smaller than the second memory. Portions of the data pattern are selectively transferred from the first memory to the second memory during and for DUT testing operations. The functional circuit interfaces with the DUT for testing. Portions of the data pattern are selectively transferred from the second memory to the third memory for application to the DUT.Type: GrantFiled: March 11, 2014Date of Patent: March 8, 2016Assignee: ADVANTEST CORPORATIONInventors: Michael Jones, Edmundo Delapuente, Alan S. Krech, Jr.
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Patent number: 9262465Abstract: Techniques described herein provide for a method, system, and apparatus for determining whether a mismatch is present between content and a description associated with a literary work. In various embodiments, a matching score may be calculated based on a number of stems identified from the description that match stems identified from the content. The matching score may be adjusted based on a number of name entities identified from the description that match one or more words in the content. The computed matching score may then indicate whether the description and the content correspond to a same literary work. According to one embodiment, the description and the content correspond to the same literary work even where the computed matching score indicates a mismatch if a title is determined to match in the content. Other embodiments may be described and claimed.Type: GrantFiled: December 18, 2013Date of Patent: February 16, 2016Assignee: Amazon Technologies, Inc.Inventors: Hong Chen, Rudy Darmawan
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Patent number: 9233764Abstract: A system and method are provided for testing a vehicle entertainment (IFE) system, comprising: functionally replicating each of a plurality of IFE components selected from the group consisting of an aircraft interface unit, a content server unit, a network distribution unit, and a seat unit with a corresponding simulator unit model that simulates functions of the respective IFE component; providing each simulator unit model on a simulator server having a processor, the simulator server connecting to an IFE network that also connects at least one of actual or simulated seat units to at least one of actual or simulated content servers; providing a test controller that controls each simulator unit model; transmitting scenario information containing operation instructions to the simulator unit model; and executing the scenario information by the simulator unit model to perform operations corresponding to the operation instructions that cause the simulator unit model to communicate over the IFE network.Type: GrantFiled: June 2, 2011Date of Patent: January 12, 2016Assignee: Thales Avionics, Inc.Inventor: Edouard Oliveira
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Patent number: 9215471Abstract: Disclosed herein are representative embodiments of methods, apparatus, and systems for manipulating bitstreams of digital media data compressed according to a compression standard. Also disclosed are representative embodiments of methods, apparatus, and systems for evaluating compliance of an encoded bitstream of digital media data with a compression standard. In one exemplary embodiment, a conforming bitstream of compressed digital media data is input. One or more of the parameters in the bitstream are selectively altered into parameters that do not conform to the video compression standard. The selective alteration can be performed such that parameters that would make the bitstream non-decodable if altered are bypassed and left unaltered. A non-conforming bitstream that includes the one or more selectively altered parameters is output.Type: GrantFiled: November 12, 2010Date of Patent: December 15, 2015Assignee: Microsoft Technology Licensing, LLCInventors: Jarred Bonaparte, Firoz Dalal, Yongjun Wu
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Patent number: 9215602Abstract: A method for simulating a mobile telephone network with shared-access channels. The simulation method includes the steps of simulating at least a first and a second configuration of the mobile telephone network that are statistically independent one from the other. Each one of the steps of simulating includes at least the steps of: determining a number of mobile terminals generating a packet data traffic; assigning to a list of mobile terminals included in the number of mobile terminals generating a packet data traffic, at least one shared-access channel of the mobile telephone network to be simulated; and performing a scheduling management algorithm of the list of mobile terminals on the shared-access channel.Type: GrantFiled: November 12, 2004Date of Patent: December 15, 2015Assignee: Telecom Italia S.p.A.Inventors: Marco Ferrato, Daniele Franceschini, Paolo Goria, Claudio Guerrini, Alessandro Trogolo, Enrico Zucca, Angela Micocci
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Patent number: 9152533Abstract: Various embodiments are disclosed herein including systems and methods for managing the asynchronous and parallel execution of computer programs. Embodiments implement asynchronous execution in a distributed environment. Single-threaded execution of multiple routines can proceed without thread blocking. Asynchronous variable and routine classes are provided to facilitate development of asynchronous systems using substantially the same development techniques as used for synchronous systems. In some embodiments, the systems and methods for managing asynchronous execution of programs are applied to workflow processing systems.Type: GrantFiled: December 6, 2011Date of Patent: October 6, 2015Assignee: Amazon Technologies, Inc.Inventor: Maxim E. Fateev
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Patent number: 9043180Abstract: Aspects of the invention provide for reducing power consumption during manufacturing testing of an IC. In one embodiment, aspects of the invention include a method for reducing power consumption during a manufacturing test of an integrated circuit (IC), the method including: providing a plurality of domains, each domain associated with a clock phase; grouping, based on each domain, a first plurality of scan chains into a first test group; grouping, based on each domain, a second plurality of scan chains into a second test group, wherein the grouping of the first test group and of the second test group includes determining which domains can be tested simultaneously; and performing the manufacturing test of the IC.Type: GrantFiled: February 9, 2012Date of Patent: May 26, 2015Assignee: International Business Machines CorporationInventors: Vikram Iyengar, Animesh Khare, Kenneth Pichamuthu
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Patent number: 9026394Abstract: The present disclosure generally relates to the automated testing of a system that includes software or hardware components. In some embodiments, a testing framework generates a set of test cases for a system under test using a grammar. Each test case may perform an action, such as provide an input to the system under test, and result in an output from the system under test. The inputs and outputs are then compared to the expected results to determine whether the system under test is performing correctly. The data can then be interpreted in the grammar system or used as input to a fault isolation engine to determine anomalies in the system under test. Based on identified faults, one or more mitigation techniques may be implemented in an automated fashion.Type: GrantFiled: August 4, 2011Date of Patent: May 5, 2015Assignee: Wurldtech Security TechnologiesInventors: Nathan John Walter Kube, Daniel Malcolm Hoffman, Frank Marcus
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Patent number: 9015622Abstract: Some embodiments of a system and a method to tune a computing system based on a profile have been presented. A profile as used herein broadly refers to a file containing various parameters of a computing system, such as kernel parameters (e.g., buffer size, network setup, etc.), usable to configure the computing system. For instance, a set of profiles are stored in a computer-readable storage device in a computing system, such as a server, a personal computer, a laptop computer, etc. A processing device miming on the computing system may receive a user selection of one of the set of profiles. In response to the user selection, the processing device may load the selected profile onto the computing system in order to tune the computing system according to the selected profile.Type: GrantFiled: January 20, 2010Date of Patent: April 21, 2015Assignee: Red Hat, Inc.Inventors: Thomas K. Wörner, Christopher Haughey Snook
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Patent number: 9000788Abstract: A method of electrical testing electronic devices DUT, comprising: connecting at least an electronic device DUT to an automatic testing apparatus suitable for performing the testing of digital circuits or memories or of digital circuits and memories; sending electrical testing command signals to the electronic device DUT by means of the ATE apparatus; performing electrical testing of the electronic device DUT by means of at least one advanced supervised self testing system “Advanced Low Pin Count BIST” ALB which is built in the electronic device DUT, the ALB system being digitally interfaced with the ATE through a dedicated digital communication channel; and sending reply messages, if any, which comprise measures, failure information and reply data to the command signals from the electronic device DUT toward the ATE apparatus by means of the digital communication channel.Type: GrantFiled: November 24, 2009Date of Patent: April 7, 2015Assignee: STMicroelectronics S.r.l.Inventor: Alberto Pagani
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Publication number: 20150066415Abstract: A system and process can be adapted to determine if a device under test (DUT) is within predetermined acceptability or unacceptability pattern parameters based on configuration data and detectable emission or detectable signal profile data associated with a known good device under test (KGDUT). The system can include a sensor array which includes different electromagnetic or optical sensors that can include electrical and/or thermal sensors, a control section operable to position elements of the sensor array in proximity to different areas of interest of the KGDUT and DUT, a KGDUT/DUT control system operable to input a pattern of testing control signals adapted to generate the detectable emissions or detectable signal profile data from the KGDUT/DUT's areas of interest during KGDUT/DUT testing, an analysis system operable to compare the detectable emissions or detectable signal profile data from the KGDUT/DUT, and an input/output system operable to display results.Type: ApplicationFiled: May 12, 2014Publication date: March 5, 2015Inventor: Brett Hamilton
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Patent number: 8959000Abstract: An exemplary method includes parsing data representative of an automated test case into at least one transaction defined in accordance with a global test language, translating the transaction into at least one command specific to an automated test tool, and providing the command to the automated test tool for execution. In certain examples, the method further includes parsing the data representative of the automated test case into at least one other transaction defined in accordance with the global test language, translating the other transaction into at least one other command specific to another automated test tool, and providing other command to the other automated test tool for execution.Type: GrantFiled: September 16, 2008Date of Patent: February 17, 2015Assignee: Verizon Patent and Licensing Inc.Inventors: Balaji Kumar, Anne L. Miller
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Publication number: 20150025829Abstract: The performance, thermal and power management system is configured to perform DVFS calibration, temperature compensation adjustment, aging calibration, and DC offset calibration in an IC. The initial voltage supplied to the IC maybe set to an initial value which takes chip-to-chip process variations into account and then dynamically adjusted according to temperature variations, DC offset and/or aging effects. Therefore, the performance, thermal and power management system may achieve optimized thermal and power performance of the IC.Type: ApplicationFiled: October 7, 2014Publication date: January 22, 2015Inventors: Uming Ko, Gordon Gammie, Alice Wang
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Publication number: 20150012237Abstract: Methods and systems for semiconductor testing are disclosed. In one embodiment, devices which are testing too slowly are prevented from completing testing, thereby allowing untested devices to begin testing sooner.Type: ApplicationFiled: September 22, 2014Publication date: January 8, 2015Inventors: Gil Balog, Reed Linde, Avi Golan
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Patent number: 8892381Abstract: A test apparatus that tests a plurality of devices under test formed on a wafer under test includes a test substrate that faces the wafer under test and is electrically connected to the devices under test, a programmable device that is provided on the test substrate and changes a logic relationship of output logic data with respect to input logic data, according to program data supplied thereto, a plurality of input/output circuits that are provided on the test substrate to correspond to the devices under test and that each supply the corresponding device under test with a test signal corresponding to the output logic data of the programmable device, and a judging section that judges pass/fail of each device under test, based on operation results of each device under test according to the test signal.Type: GrantFiled: March 9, 2011Date of Patent: November 18, 2014Assignee: Advantest CorporationInventors: Daisuke Watanabe, Toshiyuki Okayasu
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Patent number: 8880375Abstract: Provided is a test apparatus that tests a device under test having a plurality of output terminals. The test apparatus comprises an executing section that executes a test command sequence for testing the device under test; a storage section that stores a plurality of pieces of setting data designating one or more output terminals among the plurality of output terminals; a detecting section that detects whether a value of an output signal from an output terminal designated by one of the pieces of setting data matches an expected value; and a selecting section that selects different pieces of setting data in the storage section when at least two detection commands, which change execution sequencing of the test command sequence according to the detection results of the detecting section, are executed, and supplies the selected pieces of setting data to the detecting section.Type: GrantFiled: February 11, 2011Date of Patent: November 4, 2014Assignee: Advantest CorporationInventors: Kuniyuki Kaneko, Naoyoshi Watanabe
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Patent number: 8868370Abstract: The present invention is a sample analyzing system, including a sample analyzer and a management apparatus connected to the sample analyzer via a communication network. The management apparatus includes: a first memory that stores a computer program for the sample analyzer and manual data which corresponds to a version of the computer program; a first communication device; and a first controller configured to transmit, via the first communication device to the sample analyzer, the computer program and the manual data corresponding to the version of the computer program stored in the first memory. The sample analyzer includes: a second communication device; a second memory that stores the computer program and the manual data received by the second communication device; and a second controller configured to execute the computer program stored in the second memory.Type: GrantFiled: September 22, 2011Date of Patent: October 21, 2014Assignee: Sysmex CorporationInventors: Naoki Shindo, Yusuke Suga, Aya Konishi, Daigo Fukuma, Keisuke Kuwano
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Patent number: 8855961Abstract: A computer implemented system for testing electronic equipment where files are provided to aid in the conversion of device generic messages into device specific messages and conversion of device specific messages into device generic messages.Type: GrantFiled: May 31, 2011Date of Patent: October 7, 2014Assignee: United States of America as represented by the Secretary of the NavyInventor: David T. Hill
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Patent number: 8841952Abstract: An integrated circuit (IC) includes a flip-flop that stores data when the IC is in built-in self-test (BIST) mode. The flip-flop includes a master latch connected to a slave latch, which in turn is connected to a data retention latch. A control circuit is connected to the flip-flop. During normal operation, the master latch receives a data input signal, which is transmitted through the slave latch to another flip-flop of the IC. When the control circuit initiates BIST (scan testing), data stored in the slave latch is transferred to the data retention latch. Upon completion of BIST, the data stored in the retention latch is used to restore the flip-flop to its original state.Type: GrantFiled: May 27, 2013Date of Patent: September 23, 2014Assignee: Freescale Semiconductor, Inc.Inventors: Nitin Singh, Amit Jindal, Anurag Jindal
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Patent number: 8839205Abstract: Analyzing the performance of multi-threaded applications. An analysis and visualization of thread executions is performed on a graphical timeline using samples of thread execution. This allows users to understand when their application threads are executing, what they were executing, the degree of concurrency in thread execution, and the order in which work is performed in their application. The visualizations and analysis also allow users to sample thread execution contexts using a graphical user interface, as well as the generation of execution profile reports that may be filtered for a specific time range of execution and a subset of the threads running in the application.Type: GrantFiled: November 11, 2013Date of Patent: September 16, 2014Assignee: Microsoft CorporationInventor: Hazim Shafi
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Publication number: 20140257738Abstract: An apparatus includes an output pad, a plurality of arrays of test devices, a hierarchy of selection devices, and address logic. The hierarchy of selection devices includes a plurality of levels coupled between the output pad and the arrays of test devices. Each test device is coupled to a selection device in a first level of the hierarchy, and the selection devices for each array are coupled to one selection device in a second level of the hierarchy. The address logic is coupled to the hierarchy of selection devices and operable to enable one selection device in each level of the hierarchy to couple a selected test device in a selected array to the output pad.Type: ApplicationFiled: March 11, 2013Publication date: September 11, 2014Applicant: GLOBALFOUNDRIES INC.Inventor: Azeez J. Bhavnagarwala