I/o Adapter (e.g., Port, Controller) Patents (Class 703/25)
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Patent number: 8108201Abstract: A native device includes a memory storing a personal computing environment; an interface configured for coupling with a host information processing system; a native function system for performing a native function; and a native function emulator for emulating the native function in the host information processing system. According to another embodiment, a host information processing system includes: an interface for coupling with a native device comprising its user's personal computing environment; a processor configured for operating with the native device when the native device is coupled; and logic for emulating functions of the native device when the native device is coupled.Type: GrantFiled: November 17, 2005Date of Patent: January 31, 2012Assignee: International Business Machines CorporationInventors: Mandayam Thondanur Ragnunath, Chandrasekhar Narayanaswami
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Patent number: 8099274Abstract: An article of manufacture, method and system are provided for facilitating input/output (I/O) processing of at least one guest processing system. The article of manufacture includes at least one computer-usable medium having computer-readable program code logic to facilitate the I/O processing of the at least one guest processing system. The computer-readable program code logic when executing performing the following: emulating on a native system an I/O architecture for the at least one guest processing system, the emulating including: providing multiple device managers for a plurality of I/O devices of the I/O architecture; providing at least one communications adapter process interfacing the multiple device managers to the at least one network driver process; and wherein the multiple device managers translate I/O messages in at least one guest processing system format to messages in native system format for processing by the at least one communications adapter process, thereby facilitating I/O processing.Type: GrantFiled: March 30, 2007Date of Patent: January 17, 2012Assignee: International Business Machines CorporationInventors: Theodore J. Bohizic, Richard T. Brandle, Ping T. Chan, Michael S. Cirulli, Paul M. Gioquindo, Ying-Yeung Li, Stephen R. Valley
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Patent number: 8095715Abstract: Systems and methods for accessing host bus adapter (HBA) management features for Small Computer System Interface (SCSI) based HBAs produced by different vendors use a standard interface. A virtual SCSI target is created to emulate each HBA in a system, representing the HBA as a logical unit. Standard commands specified for logical units are used by an HBA device driver to perform HBA management operations. The standard commands may be used to access HBA management features for any HBA regardless of the vendor. Therefore, the HBA communication interface is standardized for HBA devices, permitting efficient access regardless of the operating system or HBA vendor.Type: GrantFiled: September 5, 2006Date of Patent: January 10, 2012Assignee: NVIDIA CorporationInventor: Mark A. Overby
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Patent number: 8073675Abstract: A RAID storage device controller provides a host interface for interfacing the controller to a host system bus. The host interface is isolated from the attached storage devices, for example IDE disk drives, so that the actual attached drives are not limited in number or interface protocol. Various device ports can be implemented, and various RAID strategies, e.g., level 3 and level 5, can be used. In all the cases, the host interface provides a standard, uniform interface to the host, namely an ATA interface, and preferably a dual channel ATA interface. The host interface emulates the ATA single or dual channel interface and emulates one or two attached IDE devices per channel, regardless of the actual number of devices physically connected to the controller. Thus, for example, five or seven IDE drives can be deployed in RAID level 5 protocol without changing the standard BIOS in a PCI host machine. Thus the RAID controller is transparent relative to a standard dual channel ATA controller board.Type: GrantFiled: July 6, 2004Date of Patent: December 6, 2011Assignee: NVIDIA CorporationInventors: Michael C. Stolowitz, Norman L. Towson, David G. Dutra
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Publication number: 20110246171Abstract: Techniques for reducing virtual machine input/output emulation overhead and decreasing the attack surface of a virtual machine architecture are disclosed.Type: ApplicationFiled: March 31, 2010Publication date: October 6, 2011Applicant: Microsoft CorporationInventors: Lawrence R. Cleeton, Andrei Warkentin, Andrew Nicholas, Rene Antonio Vega, Jacob Oshins, John A. Starks
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Patent number: 8032354Abstract: A method and system for communicating between two independent software components of the WINDOWS® SIDESHOW™ device are disclosed. Specifically, one embodiment of the present invention sets forth a method, which includes the steps of independently queuing an incoming packet from a second software component via an emulated serial transport in a first software component before parsing and responding to the incoming packet and independently queuing an outgoing packet in the first software component before transmitting the outgoing packet to the second software component also via the emulated serial transport.Type: GrantFiled: December 27, 2007Date of Patent: October 4, 2011Assignee: NVIDIA CorporationInventor: Yu-Fong Cho
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Patent number: 8024171Abstract: Methods and systems for a managed resource simulator for storage area networks are disclosed. To simulate a managed resource, a first template of generic communication information is executed. The execution of the first template establishes communications between an agent and a server of a storage area network, wherein the agent is a type of agent that manages the managed resource to be simulated. A second template is then populated with data specific to the managed resource to be simulated. The second template further includes generic communication information used to establish communications between an agent and a store process. This generic communication information corresponds to the managed resource to be simulated. The managed resource is then simulated by executing the second template. This allows the simulated managed resource to be tested, and any causes of failed transactions may be corrected, without having access to the actual physical managed resource.Type: GrantFiled: September 29, 2006Date of Patent: September 20, 2011Assignee: EMC CorporationInventor: Eugenio Korolev
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Patent number: 8024170Abstract: Configuring reconfigurable interconnect resources employing a switch matrix and configuration bit look-up table are disclosed. Reconfigurable interconnect resources include multiplexors to decrease the number of bits needed to load a configuration. Distributed processing resources configure a selected reconfigurable interconnect resource, interconnecting each input of the reconfigurable interconnect resource with a particular output of the reconfigurable interconnect resource using configuration bits scalably extracted from a row of configuration bits of a look-up table. Use of a configuration bit look-up table allows for compression of the bits needed to load the configuration for a reconfigurable interconnect resource.Type: GrantFiled: February 17, 2010Date of Patent: September 20, 2011Assignee: Mentor Graphics CorporationInventors: Xavier Montagne, Florent Bedoiseau
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Patent number: 8014993Abstract: An operating environment emulation system includes a separate peripheral emulation system having a memory device. The memory device is operable to store one or more executable programs, referred to as emulators. The emulators are operable to emulate an original operating environment. Multiple emulators may be deployed on the emulation system to allow execution and presentation of an original operating environment on several different host computers. The system also includes a method for connecting the emulation system to a host computer or accessory device upon which the emulation will run. The emulator may employ insulation processes to limit interaction between the emulation system and host computer resources.Type: GrantFiled: November 16, 2000Date of Patent: September 6, 2011Assignee: Cypress Semiconductor CorporationInventors: Lynn Watson, DeVerl Stokes, Gregory Tew Nalder
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Patent number: 8010923Abstract: A computer-implemented method of implementing a circuit design within a programmable logic device can include selecting at least one circuit element of the circuit design. The selected circuit element can be converted to a latch. A timing analysis can be performed upon the circuit design after conversion of the selected circuit element to a latch. A determination can be made as to whether the timing of the circuit design improves and the conversion of the selected circuit element to a latch can be accepted when the timing of the circuit design improves. The circuit design can be output.Type: GrantFiled: May 28, 2008Date of Patent: August 30, 2011Assignee: Xilinx, Inc.Inventors: Sankaranarayanan Srinivasan, Sridhar Krishnamurthy, Brian D. Philofsky, Kamal Chaudhary, Anirban Rahut
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Patent number: 7996206Abstract: The present invention is directed to a system and method for emulating a serial small computer system interface (SAS) connection for direct attached serial advanced technology attachment (SATA) communication are disclosed. A system in accordance with the present invention includes a host controller. The host controller includes a physical interface for accepting at least one of a SAS connection or a direct attached SATA device. A common interface logic configured to receive SAS communications and SATA communications having a SAS emulated connection is included in the host controller. An emulation logic is communicatively coupled to the common interface logic. The emulation logic being configured to determine a value of a ConnectedSata signal based on the state of a SATA link state machine.Type: GrantFiled: November 3, 2004Date of Patent: August 9, 2011Assignee: LSI CorporationInventors: Patrick R. Bashford, Brian A. Day, Silvia E. Jaeckel
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Patent number: 7992046Abstract: A test system for testing various functions of electronic devices includes a master device and a simulation control device. The master device is connected to an input device and the electronic devices through the simulation control device. The master device records input signals of the input device and generate simulation signals according to the input signals. The simulation control device simulates the input signals of the input device according to the simulation signals to test the electronic devices.Type: GrantFiled: December 7, 2008Date of Patent: August 2, 2011Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.Inventors: Su-Kuang Yang, Chien-Hung Lo, Min-Fu Deng, Zheng-Quan Peng, Xiang Cao
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Publication number: 20110106520Abstract: One embodiment is a remote system management controller that virtualizes a video controller for a server that is managed by a remote computer.Type: ApplicationFiled: July 1, 2008Publication date: May 5, 2011Inventors: Theodore F. Emerson, Jeffery L. Galloway
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Patent number: 7904288Abstract: A hardware emulator having a variable input emulation group is described. Each emulation group comprises two or more processors, where one of the processors (a first processor) is coupled to a data input selector and another one of the processors (a second processor) processes a first amount of data received from a data array. The data input selector receives the first amount of data and a second amount of data from the data array, and selects a third amount of data from among the first and second amounts of data. The third amount of data is provided to the first processor for evaluation.Type: GrantFiled: November 6, 2006Date of Patent: March 8, 2011Assignee: Cadence Design Systems, Inc.Inventors: William F. Beausoleil, Beshara G. Elmufdi, Mitchell G. Poplack, Tai Su
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Patent number: 7899662Abstract: A data backup system is provided for backing up data files from a data source and for securing those data files against accidental modification or deletion. The system comprises storage and a data protection component that includes an application programming interface defining a command set. The system can also comprise a backup application that is configured to use the commands of the command set. The data protection component allows applications that use the commands of the command set, such as the backup application, to access the storage of the system. The data protection component prevents operating systems and applications that do not use the commands of the command set from accessing the storage. The data protection function of the data protection component can optionally be disabled to allow open access to the storage.Type: GrantFiled: November 28, 2006Date of Patent: March 1, 2011Assignee: Storage Appliance CorporationInventors: Jeffrey Brunet, Ian Collins, Yousuf Chowdhary, Eric Li, Alex Lemelev
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Patent number: 7890317Abstract: A system for designing a circuit, which includes a module, uses a computer. A user may program or adapt the computer to perform computer-aided design functions. The computer obtains a description of the module from the user. The computer parses the description of the module to identify a port of the module, and to obtain information about the port. The computer presents to the user the information that it has obtained about the port.Type: GrantFiled: August 15, 2007Date of Patent: February 15, 2011Assignee: Altera CorporationInventors: James M. Brown, Tim Allen, Mike Fairman, Jeffrey O. Pritchard
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Patent number: 7873764Abstract: The present invention relates to a system and method for switching keyboard human interface devices (HIDs) and video displays. Provided is a switch with emulation support for advanced HID features. The switch uses information contained in HID report descriptors to extract information contained in HID reports and insert the extracted information into a switch report, which is sent to a host computer.Type: GrantFiled: August 15, 2008Date of Patent: January 18, 2011Assignee: Video Products, Inc.Inventor: Adrian Bica
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Patent number: 7865345Abstract: Transaction-level simulation in which communication over a bus is performed by using a transaction. The transaction includes information indicating whether information is attribute information that is mapped to hardware and includes attribute information that is not mapped to hardware. The transaction is received, time information which is attribute that is not mapped to hardware is read from the transaction, and the result of the simulation based on the read time information is outputted.Type: GrantFiled: September 8, 2005Date of Patent: January 4, 2011Assignee: Canon Kabushiki KaishaInventors: Masayuki Odagawa, Oki Minabe
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Patent number: 7865351Abstract: A USB peripheral device may automatically launch an application residing in its memory after it is connected to a host or after restarting the host if the USB flash drive has already been connected. Alternatively, the USB peripheral \device can automatically launch an application residing on the host or on a network, which is accessible by the host. The USB peripheral device has a USB interface and a controller, which is operative to execute instructions for sending and receiving messages through the USB interface. The controller is further operative, when executing the instructions, to send to a host a stream of emulated keystrokes, which emulated keystrokes cause the host to generate and execute a startup script. Embodiments of the invention include a USB peripheral device able to control a host and a method of using a USB peripheral device to control a host.Type: GrantFiled: December 30, 2007Date of Patent: January 4, 2011Assignee: SanDisk IL Ltd.Inventor: Eitan Mardiks
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Patent number: 7844764Abstract: A unitary control module having adjustable input and output mapping functionality, including methods of configuring such devices for use in different applications, are disclosed. The unitary control module can include a unit type selector such as a DIP-switch that can be used by an installer to configure the control module to emulate a particular type of controller. The control module can be configured to run a selection algorithm for configuring the mapping of the input terminals and output terminals for the device based on the controller type selected. In use, the control module may run different control algorithms for controlling the system components based on the controller type selected.Type: GrantFiled: October 1, 2007Date of Patent: November 30, 2010Assignee: Honeywell International Inc.Inventor: Eric B. Williams
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Patent number: 7835900Abstract: A controller, system, method and computer program for emulating one or more tape-based storage devices using non-tape based physical data storage media. The controller is adapted to generate a data set for indicating an available capacity of the one or more emulated tape-based storage devices, the data set includes capacity data for indicating a respective available capacity of the one or more emulated tape-based storage devices based on an available capacity of the non-tape-based physical data storage media. The controller is also adapted to provide access to data stored on the non-tape based physical data storage medium using tape-based media command and the data set, and to dynamically update the capacity data of the data set in response to a change in the available capacity of the non-tape-based physical data storage media.Type: GrantFiled: April 27, 2007Date of Patent: November 16, 2010Assignee: Hewlett-Packard Development Company, L.P.Inventors: Alastair Slater, Simon Pelly, Matthew Jack Burbridge
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Patent number: 7822909Abstract: A system and method are disclosed for crossbar switching in an emulation environment. The switch is designed to coordinate scheduling between different crossbars in the system and to be dynamically reconfigurable during operation. In one aspect, a crossbar switch includes a switching matrix and an array of control cells. The control cells use a high-frequency clock to perform high-speed switching and a low-frequency clock in order to initiate a switching sequence. The low-frequency clock initiates the sequence at a time coordinated with other crossbars in the system to optimize scheduling. In another aspect, the control cells include a memory containing control bits for the switching matrix. The memory may be reconfigured without stopping traffic management through the crossbar switch. In yet another aspect, the high-frequency sequence may provide for the ability to loop.Type: GrantFiled: April 10, 2009Date of Patent: October 26, 2010Assignee: Mentor Graphics CorporationInventor: Grégoire Brunot
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Patent number: 7813914Abstract: Techniques and mechanisms provide design information in a scalable representation. A design includes multiple master components and slave components. The master components and slave components include ports allowing interconnection. Techniques and mechanisms are described for selectively providing a subset of the interconnections between the master components and the slave components.Type: GrantFiled: September 30, 2004Date of Patent: October 12, 2010Assignee: Altera CorporationInventors: Timothy Allen, Michael Fairman
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Patent number: 7809546Abstract: A method and system of emulating serial com port communication. A computer processing system has computer-executable operating system instructions including first instructions that interact with a first serial device according to a predefined input/output (I/O) hardware interface. A first serial device has a receive port and a transmit port and has the predefined (I/O) hardware interface. A second serial device has a receive port and a transmit port. The transmit port of the first serial device is in serial communication with the receive port of the second serial device, and the receive port of the first serial device is in serial communication with the transmit port of the second serial device. Computer-executable instructions emulate serial communication port device communication and include instructions that transmit information over another medium in response to receive requests from the second serial device.Type: GrantFiled: May 1, 2007Date of Patent: October 5, 2010Assignee: Egenera, Inc.Inventors: Neil Haley, Justin Maynard
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Patent number: 7809404Abstract: Embodiments of methods and means for passively emulating channels in a multiple-input multiple output (MIMO) system are provided. Such embodiments include passively splitting a plurality of radio frequency signals into a greater plurality of such signals. Each of the greater plurality of radio frequency signals can then be selectively and passively attenuated, delayed and/or phase shifted. The resulting modified radio frequency signals are then recombined crossed over channels and coupled to a plurality of output nodes. Economical and versatile device and system testing is thus facilitated in a low-noise radio frequency environment without the need for complex up/down frequency or analog/digital conversions.Type: GrantFiled: November 8, 2006Date of Patent: October 5, 2010Assignee: Intel CorporationInventors: Melanie Daniels, Stanley K Ling, Raymond Blackham
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Patent number: 7805566Abstract: Embodiments include methods, apparatus, and systems for replication in storage systems. One embodiment includes a method that uses a target port on a storage array to function as an initiator port on a host in a storage area network (SAN). The target port discovers storage arrays in the SAN and mimics an initiator port to transmit input/output (I/O) requests.Type: GrantFiled: March 29, 2007Date of Patent: September 28, 2010Assignee: Hewlett-Packard Development Company, L.P.Inventors: Ayman Abouelwafa, Robert A. Cochran
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Patent number: 7802126Abstract: A system for planning and verifying off-site disaster recovery plans as well as implementing alternate fall back operations in the event of a disaster. The system includes at least one primary mainframe computer having an inboard catalog component, a primary emulated device controller connected to the primary computer, and a primary virtual tape system connected to the primary computer. A primary virtual tape system catalog is connected to the primary virtual tape system. A disaster recovery administrator using remote management tools maintains user and resource profiles and controls configuration of the primary emulated device controller and the primary virtual tape system.Type: GrantFiled: February 1, 2008Date of Patent: September 21, 2010Inventor: R. Brent Johnson
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Patent number: 7788665Abstract: A computing device has first and second virtual machines (VMs) and a resource assigned to the first VM. Each access request for the resource is forwarded thereto until the first VM is to be saved or migrated. Thereafter, each access request is forwarded to a holding queue. When the resource has acted upon all access requests forwarded thereto, the resource is reassigned to the second VM, and each access request at the holding queue is forwarded to the second VM and then the resource. Thus, all access requests for the resource are acted upon by the resource even after the resource is removed from the first VM and assigned to the second VM, and the save or migrate of the first VM can thereafter be completed.Type: GrantFiled: February 28, 2006Date of Patent: August 31, 2010Assignee: Microsoft CorporationInventor: Jacob Oshins
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Patent number: 7779368Abstract: Systems and methods for presenting managed data from one or more applications are invented and disclosed. A data storage management system comprises a data store, a data storage manager, and a graphical user interface. The data storage manager is communicatively coupled to the data store and configured to allocate and use logical and physical storage elements of the data store via an application instance. The graphical user interface exposes data storage in application specific storage units. A method for managing data comprises coupling a data store to one or more applications, allocating storage on the data store in accordance with respective storage requirements expressed as an application instance associated with each of the one or more applications, and using a graphical user interface to expose the data store in application storage units associated with the one or more applications.Type: GrantFiled: October 30, 2004Date of Patent: August 17, 2010Assignee: Hewlett-Packard Development Company, L.P.Inventors: James Wichelman, Peter M. Maddocks, Mark Mills, Gary L. Thunquest
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Publication number: 20100204976Abstract: An access monitoring section (11) obtains access information including an address conforming to an address stored in a monitoring address setting section (10) from an access signal output from a CPU (1) to a peripheral device (3). An access judging section (13) compares the access information received from the access monitoring section (11) and the last access information stored in an access storing section (12), and stores the obtained access information in the access storing section (12) and requests the transmission of an exception generation notification to an exception generating section (14) when the received access information is different from the last access information while excluding the last access information stored in the access storing section (12) from access information to be compared when the received access information is the same as the last access information. By this construction, throughput can be reduced at the time of emulation and the peripheral device can be efficiently emulated.Type: ApplicationFiled: May 20, 2009Publication date: August 12, 2010Inventors: Katsushige Amano, Tadao Tanikawa
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Patent number: 7761284Abstract: A data protection and storage system includes an array of disk drives for data storage. Data is received for storage on the disk drive via an interface that is configured to emulate a tape drive interface. A virtual tape data structure is created and stored on the disk drives. The allocated capacity of the virtual tape is dynamically and transparently alterable in response to data storage demand within the virtual tape.Type: GrantFiled: September 17, 2004Date of Patent: July 20, 2010Assignee: Overland Storage, Inc.Inventors: John E. Matze, Michael H. Reider, Kenneth David Geist, Daniel Davies
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Patent number: 7739094Abstract: A method and apparatus for designing a processor-based emulation integrated circuit (chip) having a selectable fastpath topology. Included are initially designing an N-level fastpath topology comprising a plurality of processors, then reducing the N-level fastpath topology to an M-level topology such that the performance of the topology meets a design criterion, e.g., capable of evaluating data during a time of an emulation step. In this manner, an emulator chip designer may configure the fastpath topologies without redesigning the chip layout.Type: GrantFiled: November 22, 2006Date of Patent: June 15, 2010Assignee: Cadence Design Systems, Inc.Inventors: Mitchell G. Poplack, Steven Comfort
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Publication number: 20100138208Abstract: A VMM disables an interrupt interception flag on at least one CPU to execute, upon reception of an interrupt, an interrupt handler code of an OS, and enables the interrupt interception flag on the at least one CPU to execute, upon the reception of the interrupt, an emulator in the VMM. When, to a virtual machine, an I/O device is assigned in a dedicated form, and when the CPU is assigned while the interrupt interception is disabled, a destination of the interrupt from the physical I/O device is set to the corresponding CPU on which the interrupt interception is disabled. When, to the virtual machine, the I/O device is assigned in a shared form, or when the CPU is assigned while the interrupt interception is disabled, the destination of the interrupt from the physical I/O device is set to the corresponding CPU on which the interrupt interception is enabled.Type: ApplicationFiled: November 24, 2009Publication date: June 3, 2010Inventors: Naoya HATTORI, Toshiomi Moriki, Takashige Baba, Yuji Tsushima
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Patent number: 7721016Abstract: A method of initiating re-enumeration of a USB device without manual intervention is provided. The method involves a sequence emulating detachment and re-attachment of a device to the host while the device remains attached to the host. As the device remains attached to the host throughout the sequence, the host OS is manipulated to receive a plurality of preset device states in order for it to perceive a device change and to eventually initiate device enumeration. The sequence, which involves a series of command exchanges between the device and the host, may be initiated by a software application residing in the host upon an event requiring device enumeration.Type: GrantFiled: February 12, 2007Date of Patent: May 18, 2010Assignee: Seagate Technology LLCInventors: Wen Xiang Xie, Sze Chek Tan, Yew Meng Tan, Zhong Quan Jiang
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Patent number: 7721036Abstract: A target interface system for flexibly routing and timing communication signals exchanged between selected components of a communication system and methods for manufacturing and using same. Under the control of a host system, the target interface system samples an output data signal provided by the host system and includes a reconfigurable datapath for flexibly routing the sampled data signal to a selected target I/O pin of the target interface system. The selected target I/O pin provides the sampled data signal as an outgoing target data signal to a target system and likewise receives an incoming target data signal from the target system. Upon sampling the incoming target data signal, the target interface system flexibly routes the sampled data signal to the host system as an input data signal. The target interface system thereby facilitates exchanges of communication signals between the host system and the target system.Type: GrantFiled: May 31, 2005Date of Patent: May 18, 2010Assignee: Quickturn Design Systems Inc.Inventors: Mitchell G. Poplack, John A. Maher
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Patent number: 7716035Abstract: PCI simulation component has an initialization component, a configuration space simulator and a memory-mapped I/O space simulator. The initialization component can claim an amount of memory by modifying the amount of memory that an operating system has available to it. The initialization component further identifies to the operating system that at least some of the claimed memory resides on a PCI bus. The configuration space simulator causes the operating system to accept that the simulated PCI device is present in the system.Type: GrantFiled: June 28, 2006Date of Patent: May 11, 2010Assignee: Microsoft CorporationInventors: Jacob Oshins, Brandon Allsop
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Patent number: 7711539Abstract: A system and method for emulating SCSI reservations using network file access protocols is provided. The system and method enable applications or operating systems on a networked computer designed to utilize SCSI reservations on only locally attached storage to also access networked data storage. The emulation occurs transparently to higher levels of operating systems or applications so that the applications or operating systems which are designed to only access locally attached storage may be enabled to access networked storage.Type: GrantFiled: August 12, 2002Date of Patent: May 4, 2010Assignee: NetApp, Inc.Inventors: Jeffrey S. Kimmel, Robert Hawley
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Patent number: 7707022Abstract: A method and system is provided for emulating individual JTAG devices in a multiple device boundary scan chain. The method includes coupling an emulator to the scan chain, and obtaining the topology of the scan chain. One device within the scan chain is then selected, and at least one other device within the scan chain is placed into bypass mode. Emulation instructions are sent to the scan chain, so that the emulation instructions bypass the at least one other device and are executed by the one device.Type: GrantFiled: February 14, 2005Date of Patent: April 27, 2010Assignee: Wind River Systems, Inc.Inventor: James J. O'Brien
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Patent number: 7702498Abstract: A method of tracing data processor activity includes trace data markers indicating initiation and termination of at least one trace function at a specified program counter address and emulation pause related markers indicating initiation and termination of an emulation halt state at a specified program counter. Each emulation pause related marker includes a conflict bit indicating the presence or absence of a simultaneous trace data marker having a different program counter address.Type: GrantFiled: May 15, 2006Date of Patent: April 20, 2010Assignee: Texas Instruments IncorporatedInventor: Manisha Agarwala
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Patent number: 7693703Abstract: Configuring reconfigurable interconnect resources employing a switch matrix and configuration bit look-up table are disclosed. Reconfigurable interconnect resources include multiplexors to decrease the number of bits needed to load a configuration. Distributed processing resources configure a selected reconfigurable interconnect resource, interconnecting each input of the reconfigurable interconnect resource with a particular output of the reconfigurable interconnect resource using configuration bits scalably extracted from a row of configuration bits of a look-up table. Use of a configuration bit look-up table allows for compression of the bits needed to load the configuration for a reconfigurable interconnect resource.Type: GrantFiled: August 1, 2003Date of Patent: April 6, 2010Assignee: Mentor Graphics CorporationInventors: Xavier Montagne, Florent Bedoiseau
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Publication number: 20100082323Abstract: Devices systems and methods are provided for providing a deterministic remote interface unit (RIU) based on a finite state machine. The RIU emulator uses a sequence controller that is configured to receive a synchronization input and to execute a fixed list of unconditional commands in an invariable order of execution based solely upon the synchronization input. The RIU emulator also uses pre-defined or pre-certified data structures that are specific to one or more interface devices to successfully execute the at least one unconditional command of the plurality when encountered in the invariable order. As such, peripheral devices may be added, removed or updated without recertification by merely inserting pre-certified data structures into memory or deleting them.Type: ApplicationFiled: September 29, 2009Publication date: April 1, 2010Applicant: HONEYWELL INTERNATIONAL INC.Inventors: Mitch Fletcher, Thom Kreider, John Dawson, Julee Clelland
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Patent number: 7672828Abstract: A software development technique is provided using target system virtualization software simulating behaviour of a target system. A target device driver running on a host system issues memory access commands to the target system virtualization software rather than to a memory interface unit of the host system. The memory interface unit may be an SRAM (Static Random Access Memory) interface. The target system may be an EGPRS (Enhanced General Packet Radio Service) modem.Type: GrantFiled: December 21, 2005Date of Patent: March 2, 2010Assignee: Advanced Micro Devices, Inc.Inventors: Michael Fiedler, Ralf Findeisen, Michael Grell, Matthias Lenk
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Patent number: 7660480Abstract: A two-level transformation scheme to enable a practical fast mesh-free method is disclosed. The first level transformation transforms the original chosen mesh-free shape function to a first transformed mesh-free shape function that preserves Kronecker delta properties. The first transformed mesh-free function allows the essential boundary conditions to be imposed directly. The second-level transformation scheme employs a low pass filter function served as a regularization process that filters out the higher-order terms in the monomial mesh-free approximation obtained from the first-level transformation scheme with desired consistency and completeness conditions. This integration scheme requires only a low-order integration rule comparing to the high order integration rule used in the traditional mesh-free methods. The present invention simplifies the boundary condition treatments and avoids the usage of high-order integration rule and therefore is more practical than the traditional mesh-free methods.Type: GrantFiled: February 10, 2006Date of Patent: February 9, 2010Assignee: Livermore Software Technology CorporationInventors: Cheng-Tang Wu, Hongsheng Lu
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Patent number: 7653801Abstract: A method, computer program product, and distributed data processing system that allows a single physical I/O adapter, such as a PCI, PCI-X, or PCI-E adapter, to track performance and reliability statistics per virtual upstream and downstream port, thereby allowing a system and network management to be performed at finer granularity than what is possible using conventional physical port statistics, is provided. Particularly, a mechanism of managing per-virtual port performance metrics in a logically partitioned data processing system including allocating a subset of resources of a physical adapter to a virtual adapter of a plurality of virtual adapters is provided. The subset of resources includes a virtual port having an identifier assigned thereto. The identifier of the virtual port is associated with an address of a physical port. A metric table is associated with the virtual port, wherein the metric table includes metrics of operations that target the virtual port.Type: GrantFiled: January 7, 2009Date of Patent: January 26, 2010Assignee: International Business Machines CorporationInventors: Richard Louis Arndt, Harvey Gene Kiel, Renato John Recio, Jaya Srikrishnan
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Patent number: 7653526Abstract: A method and system for emulating an Ethernet link over a Sonet path to provide link integrity is disclosed. The method generally includes receiving an error code at a local Ethernet port upon detection of a link failure at a remote Ethernet port. The error code is received over a Sonet path in a Sonet path overhead. If the error code is still present after a specified period of time, the local Ethernet port is disabled. Methods for providing link stability and link availability are also disclosed.Type: GrantFiled: August 16, 2002Date of Patent: January 26, 2010Assignee: Cisco Technology, Inc.Inventors: Thomas Eric Ryle, Sanjeev Rampal, Jimmy Philip Ervin, Charles Allen Carriker, Jr., Russell Eugene Gardo
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Publication number: 20100017190Abstract: To provide an emulator capable of targeting a device capable of accepting connection of an expansion device for expanding a controller connection port to a plurality of controller connection ports. The emulator, targeting a device having at least one controller connection port and capable of accepting connection of an expansion device for expanding the controller connection port to a plurality of controller connection ports so as to accept connection of a plurality of controllers, emulates operation of the targeted device. The emulator assigns port identification information to each of controllers connected via wire or radio, the port identification information indicating to which of a controller connection port of the targeted device and the controller connection ports of the expansion device connected to the device the controller is assumed to be connected. The assigned port identification information is provided to a process for receiving an operation carried out on the controller.Type: ApplicationFiled: August 13, 2007Publication date: January 21, 2010Applicant: SONY COMPUTER ENTERTAINMENT INC.Inventors: Shinichi Tanaka, Tadayasu Hakamatani, Masaki Higuchi
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Publication number: 20100017191Abstract: Provided is a microcomputer simulator capable of quickly dealing with change of a target microcomputer to thereby enable a speedy development of software. The microcomputer simulator is a microcomputer simulator for simulating a microcomputer including therein a CPU and a peripheral circuit of the CPU, and includes a mother board including a CPU for executing application software to be processed by the CPU provided in the microcomputer, and an IO board for executing, at an FPGA thereof, processing of the peripheral circuit provided in the microcomputer and IO processing executed by the CPU provided in the microcomputer. The FPGA includes a common memory portion so that the microcomputer simulator updates data stored in the common memory portion through a communication bus provided between the mother board 10 and the IO board, and causes data to be exchanged between the CPU provided in the mother board and the FPGA.Type: ApplicationFiled: February 15, 2008Publication date: January 21, 2010Applicant: FUJITSU TEN LIMITEDInventors: Atsushi Yamanaka, Masahiro Maekawa, Kohichi Kanoh, Takashi Higuchi
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Patent number: 7650553Abstract: An interface test can be performed by, for example, only a self apparatus when interface operation specifications are different between the self apparatus and an original connection partner apparatus. An LSI has a plurality of interfaces (IFs) for transmission/reception of data with an external device, and the LSI includes an emulation control unit for allowing one of the two of the plurality of IFs to perform an operation of emulating an IF of a connection partner device having operation specifications different from those of the LSI, when two IFs are connected to each other via a transmission line.Type: GrantFiled: December 29, 2005Date of Patent: January 19, 2010Assignee: Fujitsu Microelectronics LimitedInventor: Kazufumi Komura
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Patent number: 7650275Abstract: Systems, methodologies, media, and other embodiments associated with external virtualization are described. One exemplary system embodiment includes an emulation logic located external to an integrated circuit to which it may be operably connected. The example emulation logic may include a virtualization logic that is configured to virtualize a portion of a function performed by the integrated circuit. The portion may be identifiable by an address associated with the portion. The example emulation logic may also include a data store that is operably connected to the virtualization logic and that is configured to store a state data associated with virtualizing the portion of the function.Type: GrantFiled: January 20, 2005Date of Patent: January 19, 2010Assignee: Hewlett-Packard Development Company, L.P.Inventors: Russ Herrell, Gerald J. Kaufman, Jr., John A. Morrison
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Patent number: 7643983Abstract: A technique for emulation of a data storage system. The invention allows the level of services to be provided by a data storage system to be specified in terms of the level of services provided by another storage system. In one aspect, a performance characterization of a data storage device to be emulated is obtained (e.g., by experimental techniques). A specification of a workload is also obtained that includes a specification of a plurality of data stores for the workload. The data stores are assigned to an emulation data storage device according to the performance characterization and according to the specification of the workload such that sufficient resources of the emulation data storage device are allocated to the workload to meet the performance characterization of the data storage device to be emulated. The emulation data storage device is then operated under the workload. Quality-of-service (QoS) control may be performed so as to provide a degree of performance isolation among the workloads.Type: GrantFiled: March 27, 2003Date of Patent: January 5, 2010Assignee: Hewlett-Packard Development Company, L.P.Inventors: Christopher Lumb, Arif Merchant, Guillermo Alvarez