Abstract: A system includes a client and an interface component. The client includes (i) a device manager associated with a field device in a process control system and (ii) a first emulator configured to emulate a communication manager. The device manager defines a user interface associated with the field device. The interface component includes (i) a second emulator configured to emulate the device manager and (ii) the communication manager. The communication manager is configured to communicate with the field device over a communication link using a specified protocol. The client is physically separated from the interface component. The communication manager could represent a communication Device Type Manager (DTM), and the device manager could represent a device DTM. Also, the first emulator could emulate at least some functions of the communication DTM, and the second emulator could emulate at least some functions of the device DTM.

Abstract: Methods and structures utilizing multiple configuration bitstreams to program integrated circuits (ICs) such as programmable logic devices, thereby enabling the utilization of partially defective ICs. A user design is implemented two or more times, preferably utilizing different programmable resources as much as possible in each configuration bitstream. The resulting user configuration bitstreams are stored along with associated test bitstreams in a memory device, e.g., a programmable read-only memory (PROM). Under the control of a configuration control circuit or device, the test bitstreams are loaded into a partially defective IC and tested using an automated testing procedure. When a test bitstream is found that enables the associated user design to function correctly in the programmed IC, i.e.

Abstract: A plurality of local and remote computers share a plurality of local manipulating devices, and the connection agreements of the computers and the manipulating devices are different. First electrical signals from these manipulating devices are received, and each of the first electrical signals complies with the connection agreement of its source manipulating device. Each first electrical signal is then converted to a standard packet. The paths of these standard packets are routed between the manipulating devices and the computers. Afterwards, each standard packet is converted to a second electrical signal which complies with the connection agreement of its destination computer.

Abstract: A method and system for accessing audiovisual data in a computer, which has a hard disk, a hard disk controller and a device driver. The hard disk is divided into a partition region and a non-partition region. The partition region has an audiovisual table to record a location of the audiovisual data stored in the non-partition region. The non-partition region is emulated as an emulated compact disk drive. When the device driver determines to access the emulated compact disk drive, it performs a converting procedure to convert an access instruction to the compact disk drive into an access instruction to the non-partition region, and sets a command register of the hard disk controller in accordance with the instruction converted and the audiovisual table, thereby accessing the non-partition region.

Abstract: A signal conversion system for interfacing selected components of a communication system and methods for manufacturing and using same. The signal conversion system converts selected logic signals from one system component into a pair of differential logic signals and provides the pair of differential logic signals to a second system component, resolving any logical and/or temporal artifacts. While one or more of the selected logic signals change signal state, the signal conversion system maintains the pair of differential logic signals in a first valid combined signal state until the signal state of the selected logic signals corresponds to a second valid combined signal state for the pair of differential logic signals. The signal verification system then updates the pair of differential logic signals to have the second valid combined signal state. The system components thereby can communicate, exchanging differential communication signals while maintaining duty cycle and avoiding signaling glitches.

Abstract: A method and apparatus for sharing data between processors within first and second discrete clusters of processors. The method comprises supplying a first amount of data from a first data array in a first discrete cluster of processors to selector logic. A second amount of data from a second data array in a second discrete cluster of processors is also supplied to the selector logic. The first or second amount of data is then selected using the selector logic, and supplied to a shared input port on a processor in the first discrete cluster of processors. The apparatus comprises selector logic for selecting between input data supplied by a first data array and a second data array. The data arrays are located within different discrete clusters of processors. The selected data is then supplied to a shared input port on a processor.

Abstract: This invention provides trace address compression by comparing respective bytes of a current trace address with a stored comparison address. Only the least significant bytes of the current trace address that do not match the comparison address or are less significant than any section of the current trace address that does not match the comparison address are transmitted. This sometimes reduces the amount of data that needs to be transmitted. The comparison address is specified by a central processing unit via a memory mapped register write operation.

Abstract: A programmable control interface is for circuits using complex commands. The programmable interface includes a memory for storing sampled commands and a sequencing circuit. The sequencing circuit is programmable. Thus, a processor downloads into the programmable interface a sequencing specific to the sequence of commands. Once the programmable interface has been programmed, the processor launches the start of the sequence and the programmable interface manages and controls in a standalone manner the inputs/outputs with the slave circuit. The management and control of the slave circuit is independent of any interrupt specific to the system. The programmable interface uses a software-type upgrade to interface with new slave circuits that may appear on the market.

Abstract: A storage apparatus is provided with a storage area for storing data sent from a host computer, and a virtual/logical volume to which a dynamically variable storage area is allocated from within the storage area, the volume being provided to the host computer, and this storage apparatus is configured to include: a pool area generation unit for generating a plurality of pool areas composed from the storage area; a setting unit for setting, for each of the plurality of pool areas generated by the pool area generation unit, an allocation unit size for allocating a storage area from within the storage area provided by the pool area to the virtual/logical volume; a selecting unit for selecting, when data to be stored in the storage area is sent from the host computer, a pool area from among the plurality of pool areas having the allocation unit size set by the setting unit, in accordance with the size of the sent data; and an allocation unit for allocating a storage area from within the storage area provided by th

Abstract: Provided are a method, system, and article of manufacture for mapping programming interfaces. A synchronous request for reading data is received. An asynchronous request to fill selected buffers of a plurality of buffers is sent. The synchronous request is responded to with the data from at least one buffer of the plurality of buffers.

Abstract: An apparatus for transcoding encoded content, the encoded content being encoded using a first coding algorithm, with a first interface for communicating with a content sink, the first interface being adapted for receiving a request for content being encoded using a second coding algorithm and for providing a transcoded content being encoded using the second coding algorithm. The apparatus further has a second interface for communicating with the content source, being adapted for providing a request for the encoded content being encoded using the first coding algorithm and for receiving the encoded content being encoded using the first coding algorithm. The apparatus further has a processing unit being adapted for processing the encoded content being encoded using the first coding algorithm to provide the transcoded content being encoded using the second coding algorithm.

Abstract: A system and method are disclosed for crossbar switching in an emulation environment. The switch is designed to coordinate scheduling between different crossbars in the system and to be dynamically reconfigurable during operation. In one aspect, a crossbar switch includes a switching matrix and an array of control cells. The control cells use a high-frequency clock to perform high-speed switching and a low-frequency clock in order to initiate a switching sequence. The low-frequency clock initiates the sequence at a time coordinated with other crossbars in the system to optimize scheduling. In another aspect, the control cells include a memory containing control bits for the switching matrix. The memory may be reconfigured without stopping traffic management through the crossbar switch. In yet another aspect, the high-frequency sequence may provide for the ability to loop.

Abstract: An ASIC based hardware accelerated simulation engine accelerates logic verification of integrated circuit designs utilizing a field of ASIC chips interconnected by direct connections. Communication between the chips has to be accomplished by switching technology internal to the chips. The switching technology employing programmable cross-point switches; i.e. hardware elements with input, output and command ports which propagate signals from the input ports to the output ports following a given permutation determined by values on the command port. The ASIC chip contains an instruction memory to program the logic elements thereof. A conveyor belt based implementation of the programmable cross-point switches provides reduced command bit requirements.

Abstract: The present invention relates to a method for assisting an application, executed in a processing platform where a first operation system is installed, in controlling a USB device plugged in a second operation system rather than the first operation system. First, under the first operation system, the method is used for receiving a USB request block in a first format, translating the USB request block in the first format into the USB request block in a second format native to the second operation system in accordance with an algorithm, and transmitting the USB request block in the second format out. Next, under the second operation system, the method is used for controlling the USB device in accordance with the USB request block in the second format.

Abstract: A method for simulating the insertion of a data storage medium into or removal of a data storage medium from an input/output station, alternatively referred to as an import/output station. In one application of the invention, a data storage resides in an I/O station slot. A first variable corresponding to this slot is modified to indicate that the slot is actually empty. A command is issued indicating that the I/O station has been accessed, triggering a scan of the slot by an automated robotic accessor. Since the accessor will detect that the slot is, in fact, full, it will report this status to a library manager which will, in turn, update the first variable. The action of updating this variable is reported to associated devices such as a host computer, host application, or other associated device. In this manner, the operation of the library manager and devices receiving status information may be tested without requiring that a physical data storage medium actually be removed and re-inserted.

Abstract: A system and method are disclosed for crossbar switching in an emulation environment. The switch is designed to coordinate scheduling between different crossbars in the system and to be dynamically reconfigurable during operation. In one aspect, a crossbar switch includes a switching matrix and an array of control cells. The control cells use a high-frequency clock to perform high-speed switching and a low-frequency clock in order to initiate a switching sequence. The low-frequency clock initiates the sequence at a time coordinated with other crossbars in the system to optimize scheduling. In another aspect, the control cells include a memory containing control bits for the switching matrix. The memory may be reconfigured without stopping traffic management through the crossbar switch. In yet another aspect, the high-frequency sequence may provide for the ability to loop.

Abstract: A tool for simulating an industrial control system is provided. The tool includes a simulation component to emulate a controller according to a simulated execution environment and one or more simulation models for simulating devices associated with the controller, where the controller and the devices are integrated in a common simulation platform.

Abstract: A bus emulation device in accordance with one aspect of the present description includes an embedded microcontroller and a nonvolatile memory carried on a body. The memory contains firmware which includes boot code adapted to boot the microcontroller to operate in one of a plurality of dedicated operating modes in response to a mode switch. These dedicated operating modes include a learning mode in which bus signals generated by other bus devices are recorded in the nonvolatile memory, and an emulation mode in which recorded bus signals are retransmitted over the bus in response to received signals, to emulate a bus device. Other aspects are described and claimed.

Abstract: An apparatus, circuit arrangement and method for emulating a hardware design by time division multiplexing data communicated between an emulator and a runtime assist unit (RTAU), such as a behavior card. Data from the emulator may be received directly at the general purpose registers of the RTAU. A programmable delay may be used in conjunction with a step generator to initiate concurrent cycle processes. Code executed by the RTAU may be coded in assembly, and external interrupts that might otherwise affect the determined processing time of the RTAU task are disabled. The time multiplexing reduces card port, cabling and processing cycle requirements.

Abstract: A method, system and computer program product that allows a System Image within a multiple System Image Virtual Server to maintain isolation from the other system images while directly exposing a portion, or all, of its associated System Memory to a shared PCI Adapter without the need for each I/O operation to be analyzed and verified by a component trusted by the LPAR manager.

Abstract: A method and apparatus are provided for dynamically determining a primary adapter in a heterogeneous N-way adapter configuration. Each of the adapters generates information about itself and exchanges the information with all other adapters. First a decision-making adapter is identified. Then the decision-making adapter compares the adapter-generated information of all the adapters and makes a decision determining the primary adapter. The decision-making adapter communicates the decision to all other adapters. The determined primary adapter assumes a role as the primary adapter and the other adapters assume a role as a secondary adapter.

Abstract: A method, computer program product, and distributed data processing system that allows a single physical I/O adapter, such as a PCI, PCI-X, or PCI-E adapter, to track performance and reliability statistics per virtual upstream and downstream port, thereby allowing a system and network management to be performed at finer granularity than what is possible using conventional physical port statistics, is provided. Particularly, a mechanism of managing per-virtual port performance metrics in a logically partitioned data processing system including allocating a subset of resources of a physical adapter to a virtual adapter of a plurality of virtual adapters is provided. The subset of resources includes a virtual port having an identifier assigned thereto. The identifier of the virtual port is associated with an address of a physical port. A metric table is associated with the virtual port, wherein the metric table includes metrics of operations that target the virtual port.

Abstract: The application is directed to the accurate transfer of data. In various methods, systems, and devices of the present invention, a connectivity workbench may be employed to correct errors in data records transmitted between two systems. This workbench may enable real-time manual fixes as well as previously selected automatic fixes. A method that embodies the invention may include receiving a data record, verifying whether or not the data record is error free, correcting the data record and then buffering it until it is needed at a downstream system. In some embodiments, if the downstream system is busy when it receives the data record or if the target location is otherwise occupied, the data record may be returned to the upstream system and then resent at a later time once the error is resolved.

Abstract: A multi-server computing system includes a plurality of server modules mounted in an enclosure; each server has a universal serial bus (USB) interface. An enclosure onboard administration (OA) module is also mounted in the enclosure and has an addressable communication interface for connection to a remote management system and a USB interface connected to each of the plurality of servers. The USB interface of the enclosure OA operates as a master and the USB interface of each of the plurality of servers acts as a slave to the enclosure OA, such that each of the server modules can be managed by the remote management system using a single communication address.

Abstract: An apparatus for automatic testing of a PS/2 interface includes a micro controller unit, a PS/2 port, and a plurality of LEDs. The micro controller unit is coupled with both a data pin and a clock pin of the PS/2 interface. The LEDs coupled to the micro controller unit simulate functions of a keyboard. A related method for testing the PS/2 interface is also provided.

Abstract: A method, apparatus and program product are provided for increasing the usable memory capacity of a logic simulation hardware emulator. The present invention performs an additional logic synthesis operation during model build to transform an original logical array within a logic model into a transformed logical array, such that a row within the transformed logical array includes a plurality of merged logical array rows from the original logical array. The invention further modifies read and write port logic surrounding the transformed logical array during the logic synthesis operation to support read and write accesses during model emulation run time.

Abstract: A security protection device provides protection for computer long-term storage devices, such as hard drives. The security protection device is placed between a host computer and the storage device. The security protection device intercepts communications between the host and the storage device and examines any commands from the host to the storage device. Only “safe” commands that match commands on a pre-approved list are passed to the storage device. All other commands may be discarded.

Abstract: An emulation-based event-wait simulator including an application module to configure and command verification processes on a design under test (DUT). An event dispatcher is in communication with the application module to deliver commands to the DUT. A plurality of transactors are in communication with the event dispatcher to forward the commands to the DUT. A channel controller is in communication with the transactors to process and forward the commands to the DUT, wherein the channel controller also receives messages from the DUT, processes the messages, and forwards the messages to the transactors for delivery to the event dispatcher and the application module.

Abstract: An emulation-based event-wait simulator including an application module to configure and command verification processes on a design under test (DUT). An event dispatcher is in communication with the application module to deliver commands to the DUT. A plurality of transactors are in communication with the event dispatcher to forward the commands to the DUT. A channel controller is in communication with the transactors to process and forward the commands to the DUT, wherein the channel controller also receives messages from the DUT, processes the messages, and forwards the messages to the transactors for delivery to the event dispatcher and the application module.

Abstract: A serial channel emulator adapted to react and respond to an electronic device in such a way that the electronic device will allow a third party power adapter containing the serial channel emulator to power the electronic device is presented. The serial channel emulator utilizes a processing unit to emulate a serial channel in the third party power adapter by receiving data from the electronic device, making decisions based upon the data, and delivering an appropriate response to the electronic device in order to allow the third party power adapter to be used instead of a proprietary device. Once the electronic device has established communication with the power adapter and received the appropriate response, the electronic device would allow the third party power adapter to power and/or charge the electronic device based on responses from the serial channel emulator disposed in the third party power adapter.

Abstract: A system for testing communication software, such as a network stack that may be used in a personal computer or other computing device. The system includes software to emulate the functionality of hardware of two or more computers. This software may be executed on a single computer, thereby simplifying testing or providing greater control over the test environment by avoiding unintended interactions with hardware connected over a physical network connection. The emulation software includes interfaces that emulate the interfaces used in hardware drivers for network cards in the computers. These interfaces allow the emulation software to interface to the same test applications and tools that would be used in a hardware test so that testing using emulation software may be used instead of or in conjunction with testing using hardware.

Abstract: A portable distributed application framework that uses a definition file describing a structure of data and commands to be used by the framework to interface with an application. A proxy, responsive to a definition file, creates and receives messages based on the definition file. The created messages contain data and commands used to control the application while the received messages contain data from the application. A control, responsive to the definition file, relays messages between the proxy and the application. A housing, responsive to the definition file and the messages from the proxy, provides the application with configuration information and receives data from the application.

Abstract: In one embodiment, a distributed simulation system may include a first node configured to participate in a simulation and a second node configured to transmit a hot pull command designating the first node. The first node does not participate in the simulation responsive to the hot pull command. In another embodiment, A distributed simulation system may include a first node configured to participate in a simulation and a second node configured to transmit a hot plug command designating the first node. The first node does not participate in the simulation prior to the hot plug command. Additionally, the first node begins participation in the simulation responsive to the hot plug command.

Abstract: A method for emulating a hardware design by time division multiplexing data communicated between an emulator and a runtime assist unit (RTAU), such as a behavior card. Data from the emulator may be received directly at the general purpose registers of the RTAU. A programmable delay may be used in conjunction with a step generator to initiate concurrent cycle processes. Code executed by the RTAU may be coded in assembly, and external interrupts that might otherwise affect the determined processing time of the RTAU task are disabled. The time multiplexing reduces card port, cabling and processing cycle requirements.

Abstract: A method is provided in a server, having a first operating system (Windows) and a second operating system (MCP), to allow both environments to share the same resilient and redundant benefits provided by the Fibre Channel storage systems with multi-path capabilities and to ensure that MCP formatted disk units in a virtualized environment in the first operating system will only receive and accept MCP formatted data from the second.

Abstract: A method of maintaining network protocol timers in data structures associated with different respective processors in a multi-processor system. The timers accessed by a respective one of the processors include timers of connections mapped to the processor.

Abstract: There is provided a test emulator for emulating a test apparatus including a plurality of test modules for supplying test signal to devices under test respectively, including: a plurality of test module emulation sections for emulating the plurality of test modules generating the test signal based on different cycles, a control emulation section for emulating a control apparatus for controlling the test of the devices under test, a synchronous emulation section for generating test signal generating timings, at which each of the plurality of test module emulation sections is to generate the test signal in simulation corresponding to cycle time of the test module emulation section, based on instructions from the control emulation section, a timing alignment section for aligning the plurality of test signal generating timings generated by the synchronous emulation section in order of time, and outputting them one by one, and a schedule section for causing the test module emulation section corresponding to one of

Abstract: Adapter for emulating hard disk drive interface is designed for providing IDE interface by means of emulation without having to install any additional drivers for the motherboard which lacks IDE interface. The controller of the adapter is able to provide reply information on the manufacturer name, serial number of the equipment, and the device type of the hard disk device to which it is electrically connected, by responding to the BIOS query though the bus interface, thus emulating the control components of the hard disk drive as if they were appeared to be configured on the motherboard. Therefore, the number of hard disk interface types as compared to that originally supported by the motherboard is expanded.

Abstract: A method of scheduling trace packets in an integrated circuit generating trace packets of plural types stores trace data in respective first-in-first-out buffers. If a timing trace data first-in-first-out buffer is empty, timing trace data packet is transmitted. If a program counter overall data first-in-first-out buffer is not empty and the processor is at a data interruptible boundary, a program counter data packet is transmitted. If data first-in-first-out buffer is not empty, a data packet is transmitted. The program counter data packets include program counter sync data, program counter exception data, program counter relative branch data and program counter absolute branch data.

Abstract: An emulation-based event-wait simulator including an application module to configure and command verification processes on a design under test (DUT). An event dispatcher is in communication with the application module to deliver commands to the DUT. A plurality of transactors are in communication with the event dispatcher to forward the commands to the DUT. A channel controller is in communication with the transactors to process and forward the commands to the DUT, wherein the channel controller also receives messages from the DUT, processes the messages, and forwards the messages to the transactors for delivery to the event dispatcher and the application module.

Abstract: A testing device to test how computer systems interact with computer long-term storage devices, such as hard drives. The testing device is placed between a host computer and the storage device. The testing device intercepts communications between the host and the storage device and examines any commands from the host to the storage device. The testing device may respond to an Information ID request from the host with predetermined data, not the storage device's actual data. The testing device may respond to a read or write command to a specific sector with an error message from a predetermined list of sectors and errors.

Abstract: A target interface system for interfacing selected components of a communication system and methods for manufacturing and using same. Being reconfigurable to support an extensive range of conventional input/output technologies, the target interface system downloads a selected image associated with a desired input/output technology prior to runtime. The selected image identifies an appropriate output driver supply voltage, and any auxiliary voltages are controlled as functions of the output driver supply voltage to limit voltage inconsistencies. Defaulting each voltage to its least dangerous state when unprogrammed, the target interface system subsequently monitors the voltages, disabling the input/output connections if a problem is detected. The target interface system likewise detects when a selected system component is absent, unpowered, and/or wrongly powered and provides contention detection.

Abstract: A network emulator provides both per-connection and non-connection-based emulation. The emulator includes a host computer, and a kernel-mode emulator driver and user-mode application component running on the host computer. The application component supplies configuration parameters to the driver. The driver includes a packet filter list that filters a captured packet, a virtual network link that receives the packet from the packet filter list, a link group list that applies an emulation procedure to the packet, a timer management component that manages a timer associated with the emulation procedure, and a packet dispatcher component that sends out the packet. A connection pool component facilitates per-connection emulation.

Abstract: The emulation of an adapter for I/O to link a host data processing system to a local area network provides advantages of memory to memory transfer which results in higher data transfer rates while at the same time providing a mechanism for working with two data transfer vectors in an overlapping fashion.

Abstract: A system and method are disclosed to provide an interface between an emulator and a network that is readily scalable. In one aspect, a scalable solution is achieved through a hardware interface board positioned between the network and the emulator to allow proper transfer there between. A computer is separated from and coupled to the hardware interface board and provides the necessary control signals. Because it is done in hardware separated from the computer, the interface board is readily scalable through the simple addition of network chip sets. In another aspect, the interface board can be placed in two modes of operation. One is a live test wherein the emulator and network communicate through the interface board, without the need to traverse a computer. A second is a direct test where the network is electrically disconnected from the emulator, and an application program on the computer sends packets directly to the emulator through the interface board.

Abstract: Methods and structures utilizing multiple configuration bitstreams to program integrated circuits (ICs) such as programmable logic devices, thereby enabling the utilization of partially defective ICs. A user design is implemented two or more times, preferably utilizing different programmable resources as much as possible in each configuration bitstream. The resulting user configuration bitstreams are stored along with associated test bitstreams in a memory device, e.g., a programmable read-only memory (PROM). Under the control of a configuration control circuit or device, the test bitstreams are loaded into a partially defective IC and tested using an automated testing procedure. When a test bitstream is found that enables the associated user design to function correctly in the programmed IC, i.e.

Abstract: A vehicle control apparatus comprises: a computer operable to execute a control program, a first memory storing the control program, and a second memory storing the produced data. The control program includes: a platform program for inputting data from a hardware device and storing inputted data as first data in a first section of the second memory, an application program for processing for a vehicle control in accordance with an AP interface, and a coupling processing program. The coupling processing program performs mediation in the processing using the application program by converting the first data provided from the processing using the platform program to second data in accordance with the PF interface so that the second data is adapted to the AP interface. The application program executes vehicle control by using the second data. The platform program performs an operation at different predetermined intervals than the coupling program.

Abstract: Hardware access is provided for an operating system by allocating a portion of firmware address space of a data processing arrangement for use as a virtualized data interface that emulates a first hardware device. The virtualized data interface is presented to the operating system. The operating system accesses the virtualized data interface using a standardized kernel component of the operating system adapted to interface with the first hardware device. Data is exchanged between the virtualized interface and a second hardware device based on accesses of the virtualized data interface by the operating system via the standardized kernel component.

Abstract: The kernel is a shared environment. Accordingly, many different kernel-mode drivers utilize services provided by the kernel. Furthermore, when shimming of drivers is necessary, it is desirable to support shim reuse amongst drivers with similar problems or issues, rather than generating a customized shim for each driver. To facilitate kernel-mode shimming and shim reuse, context information needs to be retrieved and maintained so that shims can identify particular driver calls and preserve driver specific linkage information. The present invention accomplishes the forgoing by employing an intermediate structure, a content component, between a client or driver call and a common shared shim to provide the shim with contextual information.

Abstract: A method for providing an interface to a Bluetooth compliant device can emulate a modem such that computer software programs can communicate through the Bluetooth compliant device in the same manner in which they would communicate through a standard modem to access a dial-up, wide area network. The method also supports an interface to a Bluetooth compliant device which can emulate a network socket such that computer software programs can communicate through the Bluetooth compliant device seemingly in the same manner in which they would communicate through a standard network interface card to access a local area network. The method also allows for the interface to a Bluetooth compliant device to be dependent on the nature of the Bluetooth compliant device.