Abstract: A method, apparatus, and computer program product for simulating mobile platforms. In one advantageous embodiment, a method is used to performing operations with a virtual aircraft network. A data processing system with the virtual aircraft network is connected to a ground network. The operations are performed with the virtual aircraft network connected to the ground network.

Abstract: A plurality of FPGAs and off-chip storage devices provide a verification module for functionally debugging electronic circuit designs. Signal value compression circuits embedded in each FPGA conserve the limited number of pins available on each FPGA. Transmitting addresses to signal values previously stored in off-chip storage further reduce the bottlenecks in analyzing logic functionality distributed across multiple FPGAs.

Abstract: A method of running a target device in a hardware-in-the-loop network simulation via a host computer may include launching a network application on a host computer each having a protocol stack and a network device connected to a simulated network of target devices, interposing, on the host computer, a target device interface and adaptor between the protocol stack and the network device and transferring data and control information between the network application and the target device via the network device, whereby the target device runs on the host computer as if the target device were running directly on a host computer having a network device directly compatible with the target device.

Abstract: Methods and systems are disclosed, including a method for executing a non-native code stream on a computing system. The method includes forming one or more blocks of emulated mode code for execution on a computing system. Each of the one or more blocks includes a preamble and a plurality of operators ordered for execution in a predetermined sequence, wherein for a specified block the preamble defines one or more conditions required for uninterrupted execution of the operators included in the specified block. The method also includes assessing the one or more conditions associated with the specified block, and, after assessing the one or more conditions, executing each of the operators included in the specified block without assessing any of the one or more conditions between execution of the operators within the specified block.

Abstract: A virtualization apparatus includes: an emulation manager for searching a basic block cache for an entry with an entry point, and, if there exists no entry with the entry point in the basic block cache, requesting the identification of a basic block corresponding to the entry point; a basic block identifier for identifying the basic block by sequentially analyzing instructions of a source binary in response to a request from the emulation manager; and an instruction replacer for writing an entry of the identified basic block in a replaced instruction table, writing a branch instruction for the entry of the basic block in the source binary, and then branching to the entry point. The apparatus further includes an instruction emulator for executing an instruction of the basic block when a branch to the entry point is made.

Abstract: A coordination simulation system, in which a system simulator including a plant model and a CPU simulator that controls by a microcomputer model are configured via a feedback loop, comprises a synchronization adapter that synchronizes the system simulator and the CPU simulator, wherein the synchronization adapter is provided with a function that provides alignment information per control cycle to the microcomputer model in accordance with a synchronizing signal generated in the plant model.

Abstract: A method of simulating a program. Compiled and interpretive techniques are combined into a just-in-time cached compiled technique. When an instruction of a program simulation is to be executed at run-time, a table of compiled instructions is accessed to determine whether compiled data for the instruction is stored in the table. If the compiled data is not therein, the instruction is compiled and stored in the table. The compiled data is returned to a simulator that is executing the program simulation. In another embodiment, before storing new information in the table, another table may be consulted to determine if the location to which the new information is to be stored is protected. If the table location is protected, the new information is not stored in the table. Rather, the new information is simply passed on to the simulator.

Abstract: Development software compares prototype functionality to module library to pre-qualify design rights. Functional equivalence is determined at different abstraction levels. When equivalence is determined at one level, but not another level, functionality may be modified. Software may configure actual prototype per modified design. Network database provides on-line transaction and delivery of licensed design, preferably according to manufacturing parameters.

Abstract: A plurality of Guest cells of Guest instructions are provided with corresponding Host cells for emulating Guest instructions, each Guest instruction having a Guest cell corresponding to a Host cell. Each of the Host cells are initialized with an initialization routine for discovering a corresponding semantic routine for emulating the Guest instruction.

Abstract: The invention relates to managing registers during a binary translation mode in a virtual computing system. A set of registers is saved to memory before beginning to execute a series of blocks of translated code, and the contents of the set of registers are restored from memory later. A status register is maintained for tracking the status of each register within the set, the status indicating whether the contents are valid and whether the contents are saved in memory. Before the execution of each block, a determination is made as to whether the actions taken within the block relative to the registers are compatible with the current status of the registers. If the actions are not compatible, additional registers are saved to memory or restored from memory, so that the translation block can be executed.

Abstract: An efficient facility for determining resource usage, such as a processor time used by tasks. The determination is performed on behalf of user applications that do not require a call to operating system services. The facility includes an instruction that determines elapsed time and reports it to the user as a single unit of operation.

Abstract: A machine-implemented method includes enabling a script writer to enter a line of dialog for use by a call center in a connection with a machine-implemented, speech-based, caller-interaction, assigning a line type to the line of dialog, determining, based on the assigned line type, information to incorporate the line into the user-interaction and enabling the script writer to provide the information anytime after the line is entered, and, an integrated database and delivery system that can automatically make the results available to callers.

Abstract: A method may include creating an Extensible Markup Language (XML) instruction file based on screen shots of a host system, providing the XML instruction file to a screen scraper program, executing screen scraping operations based on the XML instruction file, and outputting a user interface file based on the screen scraping operations that corresponds to extracted data output from the host system.

Abstract: Calls from an application in an emulated environment to a module in the operating system hosting the emulated environment may be combined to reduce the overhead of accessing the module. An application handling secure shell (SSH) communications may execute multiple calls to a cryptographic module in the host operating system. Because many calls to the cryptographic module during SSH communications follow patterns, two or more related calls may be combined into a single combined call to the cryptographic module. For example, a call to generate a server-to-client key and a call to generate a client-to-server key may be combined into a single call.

Abstract: A method for emulating and debugging a microcontroller is described. In one embodiment, an event thread is executed on an emulator that operates in lock-step with the microcontroller. Event information is sampled at selected points. Trace information is also recorded at the selected points. As such, the event information and trace information are effectively pre-filtered. Accordingly, it is not incumbent on a designer to read and understand the event and trace information and sort out the information that is of interest. Instead, this task is essentially done automatically, helping the designer and reducing the probability of error. Furthermore, because only selected event and trace information is recorded, the resources of the in-circuit emulator system are not taxed.

Abstract: In one embodiment, a processor comprises a redirect unit configured to detect a match of an instruction pointer (IP) in an IP redirect table, the IP corresponding to a guest instruction that the processor has intercepted, wherein the guest is executed under control of a virtual machine monitor (VMM), and wherein the redirect unit is configured to redirect instruction fetching by the processor to a routine identified in the IP redirect table instead of exiting to the VMM in response to the intercept of the guest instruction.

Abstract: A computing system and method of executing a software program and translation of instructions for an emulated computing environment. The computing system includes a programmable circuit capable of executing native instructions of a first instruction set architecture and incapable of executing non-native instructions of a second instruction set architecture. The emulator operates within an interface layer and translates non-native applications hosted within an emulated operating system for execution. The computing system includes translated memory banks defined at least in part by the emulated operating system and capable of native execution on the programmable circuit, where the emulated operating system is incapable of execution on the programmable circuit.

Abstract: A CPU emulation system includes; a plurality of virtual CPUs each operating on a different physical CPU; an instruction sequence selecting section for selecting an instruction sequence to be optimized; a virtual CPU selecting section for selecting one of the plurality of virtual CPUs, which is to perform optimization processing of the selected instruction sequence, based on usage rates of the plurality of virtual CPUs; and an optimization level selecting section for determining an optimization level of the optimization processing that is to be executed by the selected one of the plurality of virtual CPUs, and giving a direction to perform the optimization processing to the selected one of the plurality of virtual CPUs.

Abstract: A method and system for managing a large number of servers and their server components distributed throughout a heterogeneous computing environment is provided. In one embodiment, an authenticated user, such as a IT system administrator, can securely and simultaneously control and configure multiple servers, supporting different operating systems, through a “virtual server.” A virtual server is an abstract model representing a collection of actual target servers. To represent multiple physical servers as one virtual server, abstract system calls that extend execution of operating-system-specific system calls to multiple servers, regardless of their supported operating systems, are used. A virtual server is implemented by a virtual server client and a collection of virtual server agents associated with a collection of actual servers.

Abstract: A plurality of Guest cells of Guest instructions are provided with corresponding Host cells for emulating Guest instructions, each Guest instruction having a Guest cell corresponding to a Host cell. Each of the Host cells are initialized with an initialization routine for discovering a corresponding semantic routine for emulating the Guest instruction. When an instruction is to be emulated for the first time, the initialization routine patches itself with the discovered semantic routine such that subsequent emulation of the Guest instruction can be directly performed.

Abstract: Generation of a test based on a test template comprising of branch instructions. The test template may be a layout test template, defining a set of possible control flows possibilities between template instructions in the layout test template. The test is generated by a test generator which may simulate a state of a target computerized system executing the test. The simulation may be performed during generation of the test. The test generator may further verify previously generated instructions. The test generator may further generate instructions associated with leftover template instructions.

Abstract: In one embodiment, after translating a plurality of target instructions from a target memory location into a plurality of host instructions, a write operation to a target memory portion which includes said target memory location is detected. In response to the detecting, a copy of the target instructions is stored in a host memory. In response to an attempt to execute the host instructions, the copy is compared with a plurality of current target instructions presently stored in the target memory location. Further, in response to a mismatch based on the comparison, the host instructions are disabled.

Abstract: Emulation of a target system with a host system is disclosed. Two or more target system code instructions may be grouped into one or more fragments. A main translation function may be implemented by translating each fragment into a corresponding set of position-independent instructions executable by the host system. A target processor may be emulated by executing the corresponding set of position-independent executable instructions with the host system.

Abstract: A design interface is described for maintaining call information for creating a voice user interface. An initial set of sample call paths is defined for a dialog application. Each sample call path has associated call information including a sequence of system prompts and caller responses that model a user interaction through the dialog application for the sample call path. A call design database stores the call information. A set of subsequent call paths is defined for the dialog application using the call information in the call design database. The call information in the call design database is updated to reflect current versions of the call information for all the call paths.

Abstract: A method for controlling a peripheral hardware device connected to a computer system is disclosed, the computer system includes an operating system, acting as the host operating system, running on a processor platform, and a generic device driver configured to operate on the combination of the operating system and a processor platform. The peripheral hardware device is delivered with an original peripheral hardware device driver file written for at least one of another operating system and a another processor platform, handling, by the generic device driver, interfaces between the operating system, the peripheral hardware devices and a software application. These are configured to interact with the original peripheral device driver file, and emulating, by the generic device driver, at least a part of the another operating system and the another processor that are required for the peripheral hardware device to operate on the operating system and the processor.

Abstract: The present invention concerns a mainframe data stream proxy (MDSP) (1) for caching communication of at least one emulator (2) directed to at least one mainframe (3), wherein the MDSP (1) comprises: a. a runtime application server (10), adapted for receiving (101, 201) at least one emulator action from the at least one emulator (2) and for sending (105, 209) at least one corresponding mainframe action to the at least one emulator (2); b. wherein the runtime application server (10) is further adapted for retrieving (102, 103) the at least one corresponding mainframe action to be sent to the at least one emulator (2) from a cache (20) of the MDSP (1).

Abstract: Dynamic creation of a spatially aware emulation environment comprising Host cells of Host pages corresponding to Guest cells of Guest pages of Guest instructions. Each Host cell comprises a semantic routine for emulating a corresponding Guest instruction located at the corresponding Guest cell of the guest page.

Abstract: Processing within an emulated computing environment is facilitated. Code used to implement system-provided (e.g., standard or frequently used) routines referenced in an application being emulated is native code available for the computing environment, rather than emulated code. Responsive to encountering a reference to a system-provided routine in the application being emulated, the processor is directed to native code, rather than emulated code, even though the application is being emulated.

Abstract: Processing within an emulated computing environment is facilitated. Code used to implement system-provided (e.g., standard or frequently used) routines referenced in an application being emulated is native code available for the computing environment, rather than emulated code. Responsive to encountering a reference to a system-provided routine in the application being emulated, the processor is directed to native code, rather than emulated code, even though the application is being emulated.

Abstract: Methods and systems are disclosed, including a method for executing a non-native code stream on a computing system. The method includes forming one or more blocks of emulated mode code for execution on a computing system. Each of the one or more blocks includes a preamble and a plurality of operators ordered for execution in a predetermined sequence, wherein for a specified block the preamble defines one or more conditions required for uninterrupted execution of the operators included in the specified block. The method also includes assessing the one or more conditions associated with the specified block, and, after assessing the one or more conditions, executing each of the operators included in the specified block without assessing any of the one or more conditions between execution of the operators within the specified block.

Abstract: In a method of simulating a multi-processor system by running code that simulates the system on a host processor, a SPECULATE and a COMMIT instruction is used to mark an area of memory, shared across several simulated processors, and the code is translated at run time to a form required by the host processor. All instructions are mapped to a native instruction set of the host using two different code dictionaries: all instructions outside a SPECULATE/COMMIT region are mapped to the first of the two code dictionaries. If a SPECULATE instruction is encountered during runtime by a simulator running the code, the instructions are mapped to a native instruction set of the host using the second code dictionary.

Abstract: A technique for reliably replaying operations in electronic-design-automation (EDA) software is described. In this technique, the EDA software stores operations performed by a user during a design session, as well as any replay look-ahead instructions, in a log file. When repeating the first operation, the replay look-ahead instruction ensures that the same state is obtained in the EDA environment as was previously obtained. For example, if an interrupt occurred when the first operation was previously performed, the replay look-ahead instruction may specify when the interrupt occurred during the performance of the operation so that the effect of the interrupt may be simulated when replaying the first operation.

Abstract: Generating a virtual CD recorder by using a storage device is proposed. The storage device includes a first data sector for storing auto-run data and a second data sector for storing table of content (TOC) information data. When the storage device is connected to a host, a detecting module of the host detects whether the TOC information data exists in the second sector. When the TOC information data exists or could be accessed, a reading module can read a first disc image file based on the TOC information data. A burning module can record data into a second disc image file and update the TOC information data associated with the second disc image file in the second sector.

Abstract: One example embodiment is a method that simulates a sampling period of an application to collect execution counts of basic blocks and compute cycles per instruction (CPI) data. A non-sampling period of the application is simulated to collect execution counts of basic blocks, and a comparison of the execution counts collected during the sampling period is performed to the execution counts collected during the non-sampling period. Based on the comparison, a determination is made whether to estimate CPI for the basic blocks during the non-sampling period using the CPI data collected during the sampling period.

Abstract: An emulation system and emulation method for a no longer available microcontroller, having a supplyable microcontroller and emulation software able to be run thereon, and having an interpreter, the emulation software forming a software layer between the hardware of the available microcontroller and an operating software of the no longer available microcontroller, and the software being adapted in such a way that the hardware of the available microcontroller in conjunction with the additional emulation software behaves like the hardware of the no longer available microcontroller, and the interpreter is adapted in order to represent address, code and data information of the operating software of the no longer available microcontroller to functionally equivalent address, code and data information of the available microcontroller.

Abstract: An X display may be dynamically rerouted to a different graphics terminal, or to several graphics terminals, without disrupting X clients. The corresponding X server architecture includes a static, protocol router part which acts as an endpoint for client connections and which routes X protocol to one or more X server displays, and a dynamic X display part which maintains the state and contents of the display. An X display may maintain its state and display contents entirely in memory without any need for physical display or input devices, in which case it is termed a “headless X display” and provides a virtual X server display that appears to the host as if it were a user-interactive display. The architecture allows for any number of X displays to be attached to the protocol router for multi-user, fault tolerant or suspend/resume functionality.

Abstract: A method of trace collection in a data processor begins trace data collection even if a trace trigger is received during an interval when a central processing unit is stalled. Trace data collection is deferred if a trace trigger is received during an interval of an invalid instruction boundary until a valid instruction boundary.

Abstract: A CPU emulation system includes; a plurality of virtual CPUs each operating on a different physical CPU; an instruction sequence selecting section for selecting an instruction sequence to be optimized; a virtual CPU selecting section for selecting one of the plurality of virtual CPUs, which is to perform optimization processing of the selected instruction sequence, based on usage rates of the plurality of virtual CPUs; and an optimization level selecting section for determining an optimization level of the optimization processing that is to be executed by the selected one of the plurality of virtual CPUs, and giving a direction to perform the optimization processing to the selected one of the plurality of virtual CPUs.

Abstract: Emulating legacy hardware using IEEE 754 compliant hardware is disclosed herein. In some aspects, the emulation includes locating an instruction that includes NaN (not a number) as at least one of an operand or a resultant. The emulation adjusts the resultant of the instruction, via additional code, to produce a final resultant of non-compliant (legacy) hardware. Legacy software, which was written in anticipation of processing by legacy hardware, may then be processed using compliant hardware.

Abstract: Dynamic program analysis is decoupled from execution in virtual computer environments so that program analysis can be performed on a running computer program without affecting or perturbing the workload of the system on which the program is executing. Decoupled dynamic program analysis is enabled by separating execution and analysis into two tasks: (1) recording, where system execution is recorded with minimal interference, and (2) analysis, where the execution is replayed and analyzed. Recording and analysis are carried out on heterogeneous systems so that they can be separately optimized.

Abstract: A method of emulating an instruction includes identifying a fault instruction. The fault instruction is saved in a register. The fault instruction is associated with a software emulated operation. The software emulated operation is initiated with an access to the fault instruction in the register.

Abstract: A method and a device for operating a machine tool are disclosed, wherein a machining operation of the machine tool is controlled by a parts program by storing a simulated configuration of the machine tool in the parts program, determining an actual configuration of the machine tool, comparing the actual configuration with the simulated configuration of the machine tool stored in the parts program, and generating a warning message if the actual configuration is not in conformance with the simulated configuration. This prevents errors in the machining process resulting from a discrepancy between the configuration of the machine tool used in the simulation of the parts program and the configuration of the actual machine tool during the actual machining operation.

Abstract: The described implementations relate to virtual computing techniques. One implementation provides a technique that can include receiving a request to execute an application. The application can include first application instructions from a guest instruction set architecture. The technique can also include loading an emulator and a guest operating system into an execution context with the application. The emulator can translate the first application instructions into second application instructions from a host instruction set architecture. The technique can also include running the application by executing the second application instructions.

Abstract: The subject disclosure is directed towards a technology for efficiently emulating program code that is protected by one or more various code virtualization techniques to detect the presence of malware. An emulation engine emulates a program containing a mix of native code, custom (e.g., virtualized obfuscated) code, and at least one emulator and/or interpreter that understands the custom code, by building a custom emulation component that is built by detecting and analyzing the internal emulator or interpreter. The custom emulation component may access a translation table built from the analysis, and also may simplify a plurality of instructions in the program into a lesser number of instructions in an intermediate language used for emulation.

Abstract: A method and apparatus for processor emulation using speculative forward translation are disclosed. A potential candidate for forward translation is identified from one or more portions of target system code. A priority for forward translation is assigned to the potential candidate. It is determined whether the potential candidate is a valid candidate for forward translation. If valid, the potential candidate is translated with a host system to produce one or more corresponding blocks of translated code executable by the host system.

Abstract: A instructions of a Guest program to be emulated by a Host computer occupy one or more Guest cells of Guest memory, each Guest cell having a corresponding Host cell in Host memory. The emulator selects a Host cell for emulating a Guest instruction. When the Host cell corresponds to a Guest cell other than a cell aligned with the beginning of the Guest instruction, a wild branch handling routine is executed.

Abstract: The specification and drawings present a new method, system and software product for and apparatus for generating a robotic validation system for a robot design. The robotic validation system for the robot design of a robotic system is automatically generated by converting a robot design into a generic robotic description using a predetermined format, then generating a control system from the generic robotic description and finally updating robot design parameters of the robotic system with an analysis tool using both the generic robot description and the control system.

Abstract: A method, system and computer program product is provided for emulating two or more processes for executing a source application, comprising: providing virtual trampoline memory whereby each emulated process has a respective private trampoline memory; providing shared code heap memory, wherein each emulated process only sees the code heap and its respective private trampoline memory; fetching a fragment of source instructions from the application; generating equivalent target instructions for writing to the code heap, the fragment of target instruction being indexed by its physical address in the code heap; generating, for each jump instruction in the fragment, a jump to a slot in the virtual trampoline memory; and writing a trap in each private trampoline slot, each trap adapted to be replaced by a jump to a physical address in the code heap corresponding the start of the same or a different target instruction fragment.

Abstract: According to a first aspect of the present invention there is provided a method of performing emulation of at least part of a program using an emulated computer system implemented on a computer system. The method comprises includes, during execution of the program within the emulated computer system, when the program attempts to access a unit of data, copying the unit of data from a memory of the computer system into an emulated memory, and allowing the program to access the unit of data within emulated computer system. A unit of data may be a memory page.

Abstract: An emulation system, method, and computer program product are provided for passing system calls to an operating system for direct execution. In operation, a file is loaded into memory and instructions associated with the loaded file are emulated. Furthermore, system calls resulting from the emulation are identified. Still yet, at least a portion of the system calls are passed to an operating system for direct execution thereof. In addition, application programming interfaces are provided for external components to access, to monitor and to control the aforementioned system.