Compatibility Emulation Patents (Class 703/27)
  • Patent number: 8285827
    Abstract: A method, and apparatus for software and resource management with a model-based architecture.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: October 9, 2012
    Assignee: EMC Corporation
    Inventors: David Stephen Reiner, George M. Ericson
  • Publication number: 20120245918
    Abstract: Disclosed are various embodiments that facilitate remote emulation of computing devices. A model of a computing device and an application that is executable in the computing device are identified. The application is executed in a hosted environment. A video signal of the application is encoded into a media stream. A user interface is encoded for rendering in a client. The user interface includes a graphical representation of the model of the computing device. A screen of the graphical representation of the model of the computing device is configured to render at least a portion of the video signal from the media stream.
    Type: Application
    Filed: May 24, 2011
    Publication date: September 27, 2012
    Applicant: AMAZON TECHNOLOGIES, INC.
    Inventors: Adam J. Overton, Bruce J. McKenzie, Ethan Z. Evans, Ian S. W. Cornwall, Michael Anthony Frazzini, Paul A. Ryder
  • Publication number: 20120215518
    Abstract: A normal mode is a processing mode in which processing based on a first architecture for an information processing method is executed, and a compatible mode is a processing mode in which processing based on a second architecture for another information processing method is executed. In the normal mode, first result data obtained by executing the processing based on the first architecture is inputted to an output section configured to output inputted data to a user. In the compatible mode, second result data obtained by executing the processing based on the second architecture is inputted to the output section, in a manner adapting the second result data to input of the output section.
    Type: Application
    Filed: February 23, 2012
    Publication date: August 23, 2012
    Applicant: NINTENDO CO., LTD.
    Inventors: Yutaka Murakami, Akio Terui, Minoru Hatamoto
  • Patent number: 8249231
    Abstract: Data pertaining to interactions between a plurality of customers is obtained. A graph is formed, having a plurality of nodes representing the customers and a plurality of edges representing interactions between the customers. A sub-set of the customers are denoted as previously churned customers. A spreading activation model is applied to the graph to identify, based on the graph and the previously churned customers, the potential churning customers.
    Type: Grant
    Filed: January 28, 2008
    Date of Patent: August 21, 2012
    Assignee: International Business Machines Corporation
    Inventors: Dipanjan Chakraborty, Koustuv Dasgupta, Sougata Mukherjea, Amit A Nanavati, Rahul Singh, Balaji Viswanathan
  • Publication number: 20120185234
    Abstract: A method for emulating human cognition in electronic form is disclosed. Information is received in the form of a textual or voice input in a natural language. This is parsed into pre-determined phrases based on a stored set of language rules for the natural language. Then, the parsed phrases are determined as to whether they define aspects of an environment and, if so, then creating weighting factors to the natural language that are adaptive, the created weighting factors operable to create a weighted decision based upon the natural language. Then it is determined if the parsed phrases constitute a query and, if so, then using the weighted factors to make a decision to the query.
    Type: Application
    Filed: April 12, 2011
    Publication date: July 19, 2012
    Applicant: NEURIC TECHNOLOGIES, LLC
    Inventor: THOMAS A. VISEL
  • Patent number: 8224989
    Abstract: Flexible network policies might be enforced by (a) obtaining a flow of network packets, (b) determining a content characteristic by characterizing content of the flow using bit-stream level statistics, (c) determining content-independent flow characteristics, port-independent flow characteristics, and/or application header-independent flow characteristics, and (d) enforcing a policy on the flow using both (1) the determined content characteristic and the (2) determined content-independent flow characteristics, port-independent flow characteristics, and/or application header-independent flow characteristics.
    Type: Grant
    Filed: June 7, 2010
    Date of Patent: July 17, 2012
    Assignee: Polytechnic Institute of New York University
    Inventors: Nasir Memon, Kulesh Shanmugasundaram
  • Patent number: 8194830
    Abstract: Data pertaining to interactions between a plurality of customers is obtained. A graph is formed, having a plurality of nodes representing the customers and a plurality of edges representing interactions between the customers. A sub-set of the customers are denoted as previously churned customers. A spreading activation model is applied to the graph to identify, based on the graph and the previously churned customers, the potential churning customers.
    Type: Grant
    Filed: January 28, 2008
    Date of Patent: June 5, 2012
    Assignee: International Business Machines Corporation
    Inventors: Dipanjan Chakraborty, Koustuv Dasgupta, Sougata Mukherjea, Amit A. Nanavati, Rahul Singh, Balaji Viswanathan
  • Patent number: 8180620
    Abstract: Verification tests perform hardware and software co-verification on a system under verification. Each signal interface controller coupled to the system performs a test action transferring at least one of stimulus signals and response signals between a corresponding portion of the system under verification and the signal interface controller during verification. A debugger controls an associated processing unit that executes software routines. A debugger signal interface controller performs test actions transferring stimulus signals and response signals between the debugger and the debugger signal interface controller during verification. A test manager transfers test controlling messages to these interface controllers identifying the test actions to be performed. As a result, the test manager controls the processing unit via the debugger signal interface controller and the debugger in order to coordinate the execution of the software routines with a sequence of verification tests.
    Type: Grant
    Filed: January 27, 2004
    Date of Patent: May 15, 2012
    Assignee: ARM Limited
    Inventor: Andrew Mark Nightingale
  • Patent number: 8179550
    Abstract: A management apparatus includes a management unit configured to manage information associating each of a plurality of image processing apparatuses constituting a virtual device with a function executed by the each of the plurality of image processing apparatuses, a control unit configured to provide a display for setting a virtual device as a transmission destination of transmission data, an identification unit configured, if a virtual device is set as the transmission destination of the transmission data, to identify an image processing apparatus that executes a function corresponding to a type of the transmission data from among the plurality of image processing apparatuses constituting the set virtual device based on the information managed by the management unit, and a transmission unit configured to transmit the transmission data to the image processing apparatus identified by the identification unit.
    Type: Grant
    Filed: August 20, 2008
    Date of Patent: May 15, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventor: Toshiaki Igarashi
  • Patent number: 8160863
    Abstract: A system and method for connecting a running logic circuit simulation to a network running at a higher speed that includes a computer for receiving data packets from the network and storing the received data packets in a first buffer. The computer next transmits the received data packets to an electronic circuit in the logic circuit simulation at a slower speed. The computer also receives data packets from the electronic device under simulation, and stores the data packets received from the electronic device under simulation in a second buffer. The computer then transmits the data packets received from the electronic device under simulation to the network at a higher speed.
    Type: Grant
    Filed: November 19, 2001
    Date of Patent: April 17, 2012
    Assignee: Ionipas Transfer Company, LLC
    Inventor: Robert M. Zeidman
  • Publication number: 20120084072
    Abstract: A method and a device for running a Linux application in an Android system are described herein. An Android application proxy processing module can create a shared display area, and the display configuration can be set by a Linux application processing module (i.e., a Linux application) according to the created shared display area to share the display area. The Android application proxy processing module can transmit the received user events to the Linux application processing module for processing. The user interface information created after being processed can be sent by the Linux application processing module to a display module for display.
    Type: Application
    Filed: November 10, 2011
    Publication date: April 5, 2012
    Applicant: BEIJING BORQS SOFTWARE TECHNOLOGY CO., LTD.
    Inventors: Fei XUE, Fei ZHAO
  • Patent number: 8145469
    Abstract: A memory mapping system for compactly mapping dissimilar memory systems and methods for manufacturing and using same. The mapping system maps a source memory system into a destination memory system by partitioning the source memory system and disposing memory contents within the partitioned source memory system into the destination memory system. In one embodiment, the mapping system factorizes a source data width of the source memory system in terms of a destination data width of the destination memory system to form at least one data sub-width. A source memory sub-region is defined for each data sub-width. The memory contents associated with each source memory sub-region are disposed within the destination memory system in a side-by-side manner across selected destination memory registers of the destination memory system. The mapping system thereby can compactly map the memory contents into the destination memory system without a loss of valuable memory space.
    Type: Grant
    Filed: April 17, 2009
    Date of Patent: March 27, 2012
    Assignee: Quickturn Design Systems, Inc.
    Inventor: Alexandre Birguer
  • Patent number: 8146106
    Abstract: Methods and apparatuses enable on-demand instruction emulation via user-level exception handling. A non-supported instruction triggers an exception during runtime of a program. In response to the exception, a user-level or application-level exception handler is launched, instead of a kernel-level handler. Then the exception handler can execute at the application layer instead of the kernel level. The handler identifies the instruction and emulates the instruction, where emulation of the instruction is supported by the handler. Emulating the instructions enables the program to continue execution. Repeated instruction emulation is amortized via dynamic binary translation of hot code.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: March 27, 2012
    Assignee: Intel Corporation
    Inventors: Ho-Seop Kim, Mauricio Breternitz, Jr., Youfeng Wu
  • Patent number: 8145471
    Abstract: A method for simulating a hardware failure in a virtualization environment includes determining a location of an instruction pointer for a particular operating system operating in the virtualization environment; determining an address of a memory location containing an invalid instruction; and writing the address of the memory location containing the invalid instruction in the location of the instruction pointer.
    Type: Grant
    Filed: April 30, 2008
    Date of Patent: March 27, 2012
    Assignee: International Business Machines Corporation
    Inventors: Duane K. Beyer, Eli M. Dow, Frank R. LeFevre
  • Patent number: 8131534
    Abstract: Systems and methods provide for emulating a host architecture in guest firmware. One aspect of the systems and methods comprises determining whether an emulated instruction would cause a transition into a legacy mode. A current execution context is converted into a legacy mode context, and the firmware emulator proceeds to a group of legacy mode instructions in a native mode for the processor. The firmware emulator detects an end instruction and converts the legacy context back to the guest firmware context.
    Type: Grant
    Filed: August 4, 2009
    Date of Patent: March 6, 2012
    Assignee: Intel Corporation
    Inventor: Michael D. Kinney
  • Patent number: 8108201
    Abstract: A native device includes a memory storing a personal computing environment; an interface configured for coupling with a host information processing system; a native function system for performing a native function; and a native function emulator for emulating the native function in the host information processing system. According to another embodiment, a host information processing system includes: an interface for coupling with a native device comprising its user's personal computing environment; a processor configured for operating with the native device when the native device is coupled; and logic for emulating functions of the native device when the native device is coupled.
    Type: Grant
    Filed: November 17, 2005
    Date of Patent: January 31, 2012
    Assignee: International Business Machines Corporation
    Inventors: Mandayam Thondanur Ragnunath, Chandrasekhar Narayanaswami
  • Patent number: 8108198
    Abstract: A system and method are disclosed to trace memory in a hardware emulator. In one aspect, a first Random Access Memory is used to store data associated with a user design during emulation. At any desired point in time, the contents of the first Random Access Memory are captured in a second Random Access Memory. After the capturing, the contents of the second Random Access Memory are copied to a visibility system. During the copying, the user design may modify the data in the first Random Access Memory while the captured contents within the second Random Access Memory remain unmodifiable so that the captured contents are not compromised. In another aspect, different size memories are in the emulator to emulate the user model. Larger memories have their ports monitored to reconstruct the contents of the memories, while smaller memories are captured in a snapshot RAM. Together the two different modes of tracing memory are used to provide visibility to the user of the entire user memory.
    Type: Grant
    Filed: February 21, 2007
    Date of Patent: January 31, 2012
    Assignee: Mentor Graphics Corporation
    Inventors: Peer Schmitt, Philippe Diehl, Charles Selvidge, Cyril Quennesson
  • Patent number: 8086660
    Abstract: Method and systems for transferring data from a sending device to a receiving device. The method starts with the preparation of a description of the structure of the data which is provided to the sending device and the receiving device. A reference model of the data structure is created on each of the sending and receiving devices, during run time, using the description of the data. As requested, instances of the reference model are created with the data on the sending device. The data in the instance is serialized by extracting the data and transferred from the sending device to the receiving device. The receiving device creates an instance of the data based on the reference model.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: December 27, 2011
    Assignee: Ixia
    Inventor: Geoff Smith
  • Patent number: 8073676
    Abstract: An emulation enhancement method in a first video game platform for enhancing execution of video games written for a second video game platform includes receiving an input signal written for the second video game platform, analyzing the input signal written for the second video game platform, intercepting a control signal from the input signal based on a set criteria, enhancing the control signal to generate an enhanced control signal for the first video game platform, and outputting the enhanced control signal. The control signal carries an audio effect component, a video effect component and a haptic effect component that are outputted on a user output display. Enhancing the control signal augments the audio effect component and the video effect component of the control signal and generates the enhanced control signal that utilizes additional platform capabilities on the first video game platform.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: December 6, 2011
    Assignee: Sony Computer Entertainment Inc.
    Inventors: Stewart Sargaison, Brian Watson, Simon Booth, Victor Octav Suba Miura, Bret Mogilefsky
  • Patent number: 8073674
    Abstract: A method for storage virtualization in user space. The method includes providing a first emulation module running in the OS kernel and providing a second emulation module in the user space of the computer, which may emulate a media changer or other SCSI or other storage device. The method continues with a kernel-resident driver receiving a packet of data at a port of the computer that is linked to a data communications network (such as a SAN). The packet of data may include command data for a particular data storage device (e.g., a SCSI command for a SCSI device). The method includes operating the first emulation module to communicate with the driver and to then pass through the packet of data to the second emulation module, allowing the second emulation module to run in user space but efficiently receive data from the kernel-resident driver via the first emulation module.
    Type: Grant
    Filed: September 23, 2008
    Date of Patent: December 6, 2011
    Assignee: Oracle America, Inc.
    Inventors: Charles R. Gehr, Ceri I. Davies, Stacy Maydew
  • Patent number: 8073675
    Abstract: A RAID storage device controller provides a host interface for interfacing the controller to a host system bus. The host interface is isolated from the attached storage devices, for example IDE disk drives, so that the actual attached drives are not limited in number or interface protocol. Various device ports can be implemented, and various RAID strategies, e.g., level 3 and level 5, can be used. In all the cases, the host interface provides a standard, uniform interface to the host, namely an ATA interface, and preferably a dual channel ATA interface. The host interface emulates the ATA single or dual channel interface and emulates one or two attached IDE devices per channel, regardless of the actual number of devices physically connected to the controller. Thus, for example, five or seven IDE drives can be deployed in RAID level 5 protocol without changing the standard BIOS in a PCI host machine. Thus the RAID controller is transparent relative to a standard dual channel ATA controller board.
    Type: Grant
    Filed: July 6, 2004
    Date of Patent: December 6, 2011
    Assignee: NVIDIA Corporation
    Inventors: Michael C. Stolowitz, Norman L. Towson, David G. Dutra
  • Patent number: 8069193
    Abstract: A method and system for utilizing a column function for a relational database in a structure query language (SQL) environment is disclosed. The column function is capable of performing an operation on an indeterminate number of entries. The relational database utilizes data including a plurality of entries capable of being organized into at least one column and at least one row. The method and system include allowing a user to specify the at least one row as an argument for a generalized scalar function and simulating a column environment for the at least one row using the generalized scalar function to allow the at least one row to be provided to the column function as though the at least one row was a column. The method and system also include performing the column function on the at least one row to provide at least one output.
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: November 29, 2011
    Assignee: International Business Machines Corporation
    Inventors: Jason Alexander Cu, Christopher John Crone, Andrei Fedorovich Lurie
  • Publication number: 20110282642
    Abstract: A network emulation system is described herein that allows a software developer to accurately simulate different network characteristics while testing an application, framework, or other software code on a single or multiple computers. The system also provides an ability to record a real network's characteristics and apply those characteristics during a test. The network emulation system integrates a network emulation facility into test tools for both manual and automated tests and allows an application, framework, or other software code to be tested while operating under varying networking conditions such as bandwidth, latency, packet reordering and duplication, disconnection, and so forth. Thus, the network emulation system allows a software developer testing software code to quickly and easily determine how the software code will perform in a variety of real-world networking situations without physically setting up each of those situations.
    Type: Application
    Filed: May 15, 2010
    Publication date: November 17, 2011
    Applicant: MICROSOFT CORPORATION
    Inventors: Lonny B. Kruger, William H. Barnett, Edward D. Glas, Michael W. Taute
  • Patent number: 8036874
    Abstract: There is provided with a software executing device co-operating with a hardware circuit or a hardware simulator, including: a software executing unit configured to execute a software; an execution monitoring unit configured to monitor execution of the software by the software executing unit to sequentially obtain an execution state of the software; a determining unit configured to determine whether the software executing unit and the hardware circuit or the hardware simulator are to be synchronized based on an obtained execution state of the software; and a synchronization controlling unit configured to control synchronization between the software executing unit and the hardware circuit or the hardware simulator.
    Type: Grant
    Filed: June 20, 2008
    Date of Patent: October 11, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masato Igarashi
  • Patent number: 8027349
    Abstract: A data collection system for distributing data from at least one target asset to at least one software application, comprising a machine platform and a data routing system. The machine platform stores data associated with the at least one target asset. The data routing system collects data from the machine platform. The data routing system operates in a pass through mode and a data processing mode. In the pass through mode, data is passed from the at least one target asset to the at least one software application without modification. In the data processing mode, the data routing system generates modified data based on the data stored by the machine platform and sends the modified data to the at least one software application.
    Type: Grant
    Filed: September 11, 2009
    Date of Patent: September 27, 2011
    Assignee: Roy-G-Biv Corporation
    Inventors: David W. Brown, Jay S. Clark
  • Patent number: 8027829
    Abstract: A system and method for integrated circuit emulation. One embodiment provides a system for in-circuit emulation of an integrated circuit device with program-controlled components. The system includes an integrated circuit device with program-controlled components used in a system for normal operation. The integrated circuit device having at least one program-controlled emulation unit emulating at least one of the program-controlled components of the integrated circuit device, and at least one statistics memory for storing statistical data of the program-controlled emulation unit during emulation.
    Type: Grant
    Filed: February 28, 2008
    Date of Patent: September 27, 2011
    Assignee: Infineon Technologies AG
    Inventors: Albrecht Mayer, Harry Siebert
  • Patent number: 8024170
    Abstract: Configuring reconfigurable interconnect resources employing a switch matrix and configuration bit look-up table are disclosed. Reconfigurable interconnect resources include multiplexors to decrease the number of bits needed to load a configuration. Distributed processing resources configure a selected reconfigurable interconnect resource, interconnecting each input of the reconfigurable interconnect resource with a particular output of the reconfigurable interconnect resource using configuration bits scalably extracted from a row of configuration bits of a look-up table. Use of a configuration bit look-up table allows for compression of the bits needed to load the configuration for a reconfigurable interconnect resource.
    Type: Grant
    Filed: February 17, 2010
    Date of Patent: September 20, 2011
    Assignee: Mentor Graphics Corporation
    Inventors: Xavier Montagne, Florent Bedoiseau
  • Publication number: 20110208506
    Abstract: Methods, systems and devices are described for implementing a virtual placeshifting device, set top box (STB), media player or other hardware device using a general purpose computing system that executes a software application. A message is received at the general-purpose computer that requests a session with a client application. The session is established between an emulator application executing on the general-purpose computer and the client application, wherein the emulator application is configured to emulate an application programming interface associated with an actual hardware device. Communications are exchanged between the emulator application executing on the general-purpose computer and the client application throughout the session, wherein each the communications is consistent with the application programming interface (API) associated with the actual hardware device.
    Type: Application
    Filed: February 24, 2010
    Publication date: August 25, 2011
    Applicant: SLING MEDIA INC.
    Inventors: Alexander Gurzhi, Arkady Balter
  • Patent number: 7979247
    Abstract: A method is provided for developing an architecture model for a system-of-systems (SoS) that includes n system levels L1 . . . Ln, each of which includes at least one component of the SoS. For at least i>1, each system level Li includes at least one component of level Li-1. The method includes developing an architecture model for at least one level of the SoS. For at least i>1, the level Li-1 architecture model can be developed by developing a functional architecture model for level Li-1, and thereafter transforming the level Li-1 functional architecture model into a physical architecture model for level Li-1. The functional architecture model includes a functional and a logical structure for level Li-1. And as such, the functional architecture model is developed based upon a concurrent functional and logical decomposition of a functional architecture model developed for level Li.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: July 12, 2011
    Assignee: The Boeing Company
    Inventors: Marion L. Butterfield, Haig F. Krikorian, Alaka D. Shivananda, John A. Gula
  • Patent number: 7979262
    Abstract: Connections between digital blocks and other circuit components, such as power supplies and clocks, are verified using a discrete property or object, such as a discrete discipline. A discrete discipline is defined for each value of an operating parameter, such as voltage or clock speed, that is used in a circuit design. Each discrete discipline is propagated throughout respective nets using bottom-up and/or top-down propagation. As a result, each digital net is associated with a power supply value through its corresponding discrete discipline. A determination is made whether two digital nets are connected to each other within the same digital island. If so, a determination is made whether the digital nets are compatible. If they have conflicting discrete disciplines, then they are not compatible and an error report or signal can be generated to identify the incompatibility and its location. Compatibility checks can disregard grounded digital nets.
    Type: Grant
    Filed: March 9, 2006
    Date of Patent: July 12, 2011
    Assignee: Cadence Design Systems, Inc.
    Inventors: Srinivasan Iyengar, Abhijeet Kolpekwar, Chandrashekar L. Chetput
  • Patent number: 7975198
    Abstract: A test system for performing a test of a device is provided that comprises a source file of a test plan that describes a program for performing a test, and one or more of elements that are formed in a unit that divides the source file into one or more blocks. The test system further comprises an annotatable object that, when debugging of objects of the source file is performed, manages modification details of the debugging with reference to an element corresponding to a portion where the debugging is performed, and a controller that, after the debugging, rewrites the source file with details after the debugging is performed on an element basis based on the element and the annotatable object.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: July 5, 2011
    Assignee: Advantest Corporation
    Inventor: Masaru Yokoyama
  • Patent number: 7937258
    Abstract: A memory mapping system for providing compact mapping between dissimilar memory systems and methods for manufacturing and using same. The memory mapping system can compactly map contents from one or more first memory systems into a second memory system without a loss of memory space in the second memory system. Advantageously, the memory mapping system can be applied to hardware emulator memory systems to more efficiently map design memory systems into an emulation memory system during compilation.
    Type: Grant
    Filed: June 24, 2009
    Date of Patent: May 3, 2011
    Assignee: Quickturn Design Systems, Inc.
    Inventor: Alexandre Birguer
  • Patent number: 7934205
    Abstract: A method of restructuring a source computer program to a target computer program. A defined source computer program has source code. A set of tasks is defined for the source computer program to be performed by the source computer program. For each task, a corresponding set of input data sets is defined. For each input data set, a corresponding set of programs is determined such that each program in the set of programs includes declarations and executable statements, from the source code of the source computer program, required to execute the task in each input data set. Each set of programs is processed to generate a component that executes the respective task, resulting in generation of a set of components. A target computer program is generated from the set of components.
    Type: Grant
    Filed: March 1, 2007
    Date of Patent: April 26, 2011
    Assignee: International Business Machines Corporation
    Inventor: Rajendra K. Bera
  • Patent number: 7930165
    Abstract: A method and corresponding equipment for emulation of a target programmable unit, which has at least one CPU, by means of an external emulation device, which is coupled to the target programmable unit by means of a communication link, comprising: transferring predetermined initialization data through the communication link to the emulation device for initializing the emulation; transferring through the communication link to the emulation device a CPU clock signal and emulation data; emulating the target programmable unit in the external emulation device using the transferred emulation data; ascertaining respective trace data from the emulation in the external emulation device and storing and/or outputting the trace data; deriving respective target integrity-control data and emulation integrity-control data from respective target-internal data and emulation-internal data; and transferring the derived target integrity-control data from the target programmable unit to the external emulation device.
    Type: Grant
    Filed: February 7, 2008
    Date of Patent: April 19, 2011
    Assignee: Accemic GmbH & Co. KG
    Inventors: Alexander Weiss, Alexander Lange
  • Patent number: 7930685
    Abstract: A method and system for exposing a version-independent interface to a computer resource. The interface system exposes a version-independent interface to a computer resource, such as a database or computer program. The interface system also provides a version-dependent interface to the computer resource that is typically not exposed. When the computer resource is modified, the version-dependent interface may be modified, but the version-independent interface might not be modified. When the version-dependent interface is modified, a mapping is generated (in some cases automatically) between the version-independent interface and the version-dependent interface. When an accessing computer program uses the version-independent interface to request services of the computer resource, the system uses the mapping to map the request to a request that is appropriate for the version-dependent interface.
    Type: Grant
    Filed: September 12, 2006
    Date of Patent: April 19, 2011
    Assignee: Siebel Systems, Inc.
    Inventors: Jeffrey Fischer, Heung-Wah Yan
  • Patent number: 7930686
    Abstract: A handle for a trace is provided that is memory indifferent. The handle is created using contents of the trace rather than memory location of the trace. This enables the trace to be easily identified in subsequent runs of an application associated with the trace.
    Type: Grant
    Filed: June 19, 2009
    Date of Patent: April 19, 2011
    Assignee: International Business Machines Corporation
    Inventors: Marcel Mitran, Ali L. Sheikh
  • Patent number: 7925492
    Abstract: A method for emulating human cognition in electronic form is disclosed. Information is received in the form of a textual or voice input in a natural language. This is parsed into pre-determined phrases based on a stored set of language rules for the natural language. Then, the parsed phrases are determined as to whether they define aspects of an environment and, if so, then creating weighting factors to the natural language that are adaptive, the created weighting factors operable to create a weighted decision based upon the natural language. Then it is determined if the parsed phrases constitute a query and, if so, then using the weighted factors to make a decision to the query.
    Type: Grant
    Filed: June 5, 2007
    Date of Patent: April 12, 2011
    Assignee: Neuric Technologies, L.L.C.
    Inventor: Thomas A. Visel
  • Patent number: 7925250
    Abstract: A method, system, and program product for providing for reuse of a mobile device application in a desktop environment is disclosed. The method includes obtaining an application that is configured for running on a mobile device, and then running the mobile device application on a desktop. A method for deploying an application that includes providing a computer infrastructure that is operable to run the application on a desktop and provide user preferences for the application on the desktop is also disclosed.
    Type: Grant
    Filed: March 27, 2006
    Date of Patent: April 12, 2011
    Assignee: International Business Machines Corporation
    Inventor: Richard Redpath
  • Patent number: 7904288
    Abstract: A hardware emulator having a variable input emulation group is described. Each emulation group comprises two or more processors, where one of the processors (a first processor) is coupled to a data input selector and another one of the processors (a second processor) processes a first amount of data received from a data array. The data input selector receives the first amount of data and a second amount of data from the data array, and selects a third amount of data from among the first and second amounts of data. The third amount of data is provided to the first processor for evaluation.
    Type: Grant
    Filed: November 6, 2006
    Date of Patent: March 8, 2011
    Assignee: Cadence Design Systems, Inc.
    Inventors: William F. Beausoleil, Beshara G. Elmufdi, Mitchell G. Poplack, Tai Su
  • Patent number: 7904289
    Abstract: A method for testing functionality of a chip checker is disclosed. The checker is arranged for generating a predetermined verification signal when the chip, upon receiving a predetermined input signal, generates a corresponding response signal. The method comprises the steps of developing a model of the chip, the model at least partially emulating at least one response of the chip by generating, upon receiving the predetermined input signal, the corresponding response signal. The method further supplies the developed chip model with the predetermined input signal. The checker is then used to test whether the generated response signal corresponds to the respective predetermined input signal. A failure of the checker to generate the predetermined verification signal indicates checker malfunction.
    Type: Grant
    Filed: November 12, 2007
    Date of Patent: March 8, 2011
    Assignee: International Business Machines Corporation
    Inventors: Shridhar Narasimha Ambilkar, Girish Gopala Kurup
  • Patent number: 7895362
    Abstract: Embodiments of the present invention address deficiencies of the art in respect to EDI enveloping and provide a method, system and computer program product for multiple message source EDI enveloping with batching support. In one embodiment of the invention, a method for multi-format EDI enveloping can include receiving messages from multiple concurrent message sources, transforming the received messages into an EDI format, inserting the transformed messages into a minimal number of envelopes, and forwarding the envelopes as an EDI interchange to designated trading partners.
    Type: Grant
    Filed: March 7, 2007
    Date of Patent: February 22, 2011
    Assignee: International Business Machines Corporation
    Inventors: Rayne S. Anderson, Ashutosh Arora, Tuan T. Dang, Raja Das, David W. Hixon, Sreedhar Janaswamy
  • Patent number: 7882497
    Abstract: A system and method for a symbiotic computer application and system and method for generation and presentation of same. The symbiotic computer application allows end-user devices to access back-end data systems including legacy host data systems having legacy host applications and other alternative data systems not directly compatible with the end-user devices. In some embodiments, the symbiotic computer application is generated by a symbiotic computer application generator to include user interface forms and discrete associations, which relate the user interface forms to the back-end data systems. A symbiotic computer application presentation end-user system allows the end-user device to perform desired functions of the back-end data systems through programs and user interfaces configured for the end-user device.
    Type: Grant
    Filed: May 17, 2001
    Date of Patent: February 1, 2011
    Assignee: Attachmate Corporation
    Inventors: Hemant Nanivadekar, J. Michael Constans, Kingsley Daniel, Kalpana Narayanaswamy
  • Patent number: 7881921
    Abstract: In computer system simulations, previous translations of simulation virtual addresses to physical host addresses can be remembered in a cache. During execution of a simulation program, the simulated computer system generates a simulation virtual address. The simulation virtual address may be translated to a host address. Information associated with the translation can be cached, and subsequent accesses to the simulation virtual address can use the cached information to compute the host address.
    Type: Grant
    Filed: July 2, 2007
    Date of Patent: February 1, 2011
    Assignee: Synopsys, Inc.
    Inventor: Jeroen Dobbelaere
  • Patent number: 7881919
    Abstract: Techniques for simulating universal serial bus (USB) video devices are described. In one example, a document containing a USB video device descriptor set is loaded by a device simulator application. The document is parsed and the descriptor set is extracted. The descriptor set is then used to define a simulated USB video device. A device simulation framework simulates a USB device attachment to a computing device and video data is streamed from the simulated USB video device to the computing device. A video driver associated with the computing device processes the video data as if the data originated from USB video device hardware. Multiple different USB video devices may be simulated and different collections and configurations of video data can be utilized.
    Type: Grant
    Filed: April 3, 2007
    Date of Patent: February 1, 2011
    Assignee: Microsoft Corporation
    Inventors: Art Trumble, Tuan D. Le
  • Publication number: 20110022377
    Abstract: In an information processing device connected to an external device via a network, the external device includes an application platform of an image forming device and the information processing device includes a platform emulator that emulates the application platform. The platform emulator includes an implementing information acquiring part that receives a list of information items of interfaces implemented on the application platform in the external device from the external device and stores the list of information items in a holding part, a determining part that determines, in response to an interface calling request from an application using the platform emulator, whether an interface is implemented in the external device based on the stored list of information items, and an external calling part that transmits, when the interface is implemented, a request of execution of the interface to the external device.
    Type: Application
    Filed: July 21, 2010
    Publication date: January 27, 2011
    Inventors: Xiaofeng HAN, Tsutomu Ohishi
  • Patent number: 7873794
    Abstract: Disclosed is an apparatus, method, and program product that provides atomic, multi-word load support without incurring additional memory utilization. A double-word is atomically loaded without the use of one or more additional fields and without a lock. An invalidity marker is used in connection with a cache miss time to ascertain whether a loaded double-word has been stored and loaded atomically, and is thus, valid.
    Type: Grant
    Filed: August 21, 2007
    Date of Patent: January 18, 2011
    Assignee: International Business Machines Corporation
    Inventors: Michael Joseph Corrigan, Timothy Joseph Torzewski
  • Patent number: 7870033
    Abstract: An intelligent product catalog system provides for electronic creation, management and viewing of product information using a multimedia display system. A central database repository stores the product information and provides for an unlimited number of product attributes and dynamic reconfiguration of the product information. The central database repository comprises a meta data system, a scheme system and an object model system. A plurality of applications access the central database repository, the applications being automatically adaptive to the dynamic reconfiguration of the product information. A user interface provides display, sorting and filtering of the product information including the unlimited number of product attributes.
    Type: Grant
    Filed: September 26, 2007
    Date of Patent: January 11, 2011
    Assignee: eXalt Solutions, Inc.
    Inventor: Leslie H. Swanson
  • Patent number: 7844446
    Abstract: A method (and system) for executing a multiprocessor program written for a target instruction set architecture on a host computing system having a plurality of processors designed to process instructions of a second instruction set architecture, includes representing each portion of the program designed to run on a processor of the target computing system as one or more program threads to be executed on the host computing system.
    Type: Grant
    Filed: February 19, 2009
    Date of Patent: November 30, 2010
    Assignee: International Business Machines Corporation
    Inventors: Erik Richter Altman, Ravi Nair, John Kevin O'Brien, Kathryn Mary O'Brien, Peter Howland Oden, Daniel Arthur Prener, Sumedh Wasudeo Sathaye
  • Patent number: 7818808
    Abstract: In one embodiment, a processor mode is provided for guest software. The processor mode enables the guest software to operate at a privilege level intended by the guest software. When the guest software attempts to perform an operation restricted by the processor mode, the processor mode is exited to transfer control over the operation to a virtual-machine monitor, which runs outside this processor mode.
    Type: Grant
    Filed: December 27, 2000
    Date of Patent: October 19, 2010
    Assignee: Intel Corporation
    Inventors: Gilbert Neiger, Stephen Chou, Erik Cota-Robles, Stalinselvaraj Jeyasingh, Alain Kagi, Michael Kozuch, Richard Uhlig
  • Patent number: RE42227
    Abstract: A system and method is described for connecting a logic circuit simulation to a hardware peripheral that includes a computer running software for communicating data to and from the hardware peripheral. The software transmits the data received from the hardware peripheral to the device being simulated by the logic circuit simulation. The computer also transmits the data received from the device being simulated by the electronic circuit simulation to the hardware peripheral. This allows the user to test the device being simulated using real hardware for input and output instead of simulated hardware.
    Type: Grant
    Filed: June 10, 2009
    Date of Patent: March 15, 2011
    Assignee: Ionipas Transfer Company, LLC
    Inventor: Robert Marc Zeidman