Of Electrical Device Or System Patents (Class 703/4)
  • Patent number: 10120926
    Abstract: A device may receive information for an attribute to include in a shared attribute library. The information may include an attribute identifier, data variables needed to compute a value of the attribute, and source code for computing the value of the attribute. The source code may be written in a first programming language. The device may receive a first request to compute the value of the attribute based on a first set of data variables from a first type of data application and a second request to compute the value of the attribute based on a second set of data variables from a second type of data application that is different than the first type of data application. The device may select a computing server, which may execute the first programming language, to compute the value of the attribute based on the first and second sets of data variables.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: November 6, 2018
    Assignee: Capital One Services, LLC
    Inventor: Saurabh Gupte
  • Patent number: 9853767
    Abstract: Embodiments of the present disclosure provide a method and apparatus for determining a nonlinear characteristic and a system. The method for determining a nonlinear characteristic includes: determining a correction factor of a nonlinear item of a nonlinear model of a system to be measured according to an input and/or a parameter of the system to be measured; correcting the nonlinear item of a nonlinear model of the system to be measured by using the correction factor; and obtaining a nonlinear characteristic of the system to be measured according to the corrected nonlinear model. The nonlinear characteristic allows the input and/or the parameter of the system to be corrected to produce a corrected output. With the embodiments of the present disclosure, the nonlinear characteristic of the system to be measured under different inputs and/or parameters may be estimated, and accuracy of the estimation and applicability are improved.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: December 26, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Hao Chen, Zhenning Tao
  • Patent number: 9703921
    Abstract: A system, method, and computer program product for determining whether a design for a circuit meets design specifications, to facilitate the provision of a manufacturable description of the circuit. A computer-operated circuit simulation tool reads the design for the circuit and a power specification, and selectively internally creates a network connection and inserts a corresponding connect module in the design, for at least one circuit block having an unsupported signal declared in the power specification. Typically such a circuit block will be an analog block, whether an original analog block or an analog representation of a digital block, and may involve electrical or wreal signal interactions. The simulation tool performs a mixed-signal simulation of the design. Embodiments tangibly output a verification determination from a comparison of the simulated design performance results and the design specifications in order to provide the manufacturable description of the circuit.
    Type: Grant
    Filed: July 8, 2015
    Date of Patent: July 11, 2017
    Assignee: CADENCE DESIGN SYSTEMS, INC.
    Inventors: Qingyu Lin, Nan Zhang
  • Patent number: 9389618
    Abstract: This disclosure is directed to regulating electric power at a node of a system for distribution of electricity. A voltage controller can identify properties of branch structures in a system that includes a voltage regulation device that controls a voltage source supplying electricity to nodes via the branch structures. The voltage controller can receive information on voltage and current associated with electricity provided by the voltage source. The voltage controller can receive, from a metering devices at nodes in the system, primary voltage information. The voltage controller can select one of the nodes based on the primary voltage information. The voltage controller can determine, based on the properties, an impedance for a branch structure corresponding to the selected node. The voltage controller can control the voltage regulation device based on the impedance for the branch structure corresponding to the selected node and the information on the voltage and the current.
    Type: Grant
    Filed: September 29, 2014
    Date of Patent: July 12, 2016
    Assignee: UTILIDATA, INC.
    Inventor: David Bell
  • Patent number: 9262566
    Abstract: A system is configured to determine, during a first time period, one or more first output values, of an RF circuit, by solving one or more differential equations using one or more first input values; build, during the first time period, a table based on the one or more first input values and the one or more first output values; receive, during a second time period, one or more second input values for the RF circuit; and determine, during the second time period, one or more second output values, of the RF circuit, using the table and the one or more second input values.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: February 16, 2016
    Assignee: The MathWorks, Inc.
    Inventor: Danil Kirsanov
  • Patent number: 9223754
    Abstract: A computer-implemented method for use in simulating dynamic behavior of complex engineering systems comprised of several subsystems includes computing a Jacobian matrix based on output derivatives, wherein the output derivatives are based on corresponding state variable derivatives related to corresponding first input variables for each of a plurality of subsystems. The method also includes modifying the first input variables and computing second input variables and residuals for each of the plurality of subsystems based on corresponding state variable derivatives.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: December 29, 2015
    Assignee: Dassault Systèmes, S.A.
    Inventors: Vladimir Belsky, Bruce Edward Engelmann, Hilding Elmqvist, Hans Roland Olsson
  • Patent number: 9208530
    Abstract: At the time of using a haptic device to present to a user haptics which a first virtual object superimposed on the haptic device receives from a second virtual object superimposed on a real object, the user is enabled to touch within the second virtual object, regardless of the real object. Accordingly, the haptics received from the second virtual object is obtained using a first haptic event model of the first virtual object and a second haptic event model of the second virtual object, and while the first haptic event model corresponds to computer graphics information of the first virtual object, the shape of the first virtual object differs from that of the haptic device, such that instructions can be made regarding the inside of the real object, using the first virtual object.
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: December 8, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tsuyoshi Kuroki, Christian Sandor, Shinji Uchiyama
  • Patent number: 9147031
    Abstract: Systems and methods for determining a chip yield are disclosed. One system includes a first level integration solver and a second level integration solver. The first level integration solver is configured to obtain a first probability distribution function modeling variations within a chip and to perform a discontinuous first level integration with the first probability distribution function. In addition, the second level integration solver is implemented by a hardware processor and is configured to perform a continuous second level integration based on a second probability distribution function modeling variations between dies to determine the chip yield.
    Type: Grant
    Filed: January 31, 2013
    Date of Patent: September 29, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Carl J. Radens, Amith Singhee
  • Patent number: 9093934
    Abstract: A control system for controlling a motor having a stator and a rotor coupled to the stator is provided. The control system includes a plurality of input taps and an input coupled to the plurality of input taps. The input is configured to transmit an input voltage to at least one input tap of the plurality of input taps. The control system also includes a microcontroller coupled to the input. The microcontroller is programmed to determine the at least one input tap of the plurality of input taps that is asserted by the input voltage; access from a memory a predetermined input condition; detect an invalid operating input condition of the motor based on a comparison of the predetermined input condition and the at least one input tap of the plurality of input taps that is asserted by the input; and perform a function to change an operating characteristic of the motor.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: July 28, 2015
    Assignee: Regal Beloit America, Inc.
    Inventors: Bryan J. Stout, Gregory P. Sullivan
  • Patent number: 9037441
    Abstract: The present invention aims to simulate a response more similar to a actual machine while inhibiting load increase in analog operation. Program configuration of the present invention is a component of a simulation program for circuit design, which is executed by a computer. The computer includes an operation portion, a storage portion, a manipulation portion, and a display portion, so that the computer exerts a function of a circuit design simulator, and as a macro model of an operational amplifier for use in the circuit design simulator, enabling the computer to act by simulating a response of the operational amplifier on the circuit design simulator. The macro model of the operational amplifier includes a control portion (LMT1) for generating output exception in the event of input exception or power supply exception of the operational amplifier.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: May 19, 2015
    Assignee: Rohm Co., Ltd.
    Inventor: Noboru Takizawa
  • Patent number: 9015013
    Abstract: A position detection and simulation platform includes software configurable logic and programmable inputs and outputs to support software configuration only changes for use with a variety of position feedback devices including synchros, resolvers, linear variable differential transformers, and rotary variable differential transformers. Power to the software configurable outputs is dynamically controlled so that the power supply voltage presented to the outputs satisfies a minimum threshold above the amplitude of the output signal. Dynamic control is based on at least one of a digital representation of a signal to be output, an analog version of the signal to be output, or the signal being output.
    Type: Grant
    Filed: October 18, 2013
    Date of Patent: April 21, 2015
    Assignee: United Electronic Industries, Inc
    Inventors: Olexiy Ivchenko, Denys Kraplin
  • Patent number: 8967032
    Abstract: A smart-store emulation unit is provided for use on-board a weapon platform in place of the physical presence of a smart-store. The emulation unit may be used for operator training on or testing of the smart-store on-board an operational weapon platform such as an aircraft, tank or ship.
    Type: Grant
    Filed: February 9, 2012
    Date of Patent: March 3, 2015
    Assignee: Raytheon Company
    Inventor: Edward H. Campbell
  • Patent number: 8954305
    Abstract: A circuit simulation apparatus acquires wiring connection information indicating connection data in an electric circuit, selects a component constituting the circuit based on the wiring connection information, performs a setting of replacing the selected component with each resistor having different resistance values, generates at least one of netlists using the acquired wiring connection information and at least one of the set resistance values, calculates a value of an equivalent power source and a value of an internal resistance thereof for a part of the circuit using the acquired wiring connection information and at least one of the generated netlists, and calculates a resistance value of the selected component and a power consumption for the resistance value using the value of the equivalent power source and the value of the internal resistance.
    Type: Grant
    Filed: June 18, 2010
    Date of Patent: February 10, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Eiji Yajima, Shunko Kaneko, Atsushi Asayama, Ryo Yamazaki
  • Patent number: 8952965
    Abstract: A visual representation of a mechanical-electrical machine behavior model is presented that utilizes a non-linear time scale to best illustrate multiple details occurring in a relatively short time frame without affecting the amount of information contained in the complete model. In particular, time periods without user-relevant details are identified and minimized so as to allow for the display space to adequately represent the details associated with the actions of each machine. By “folding” these longer time periods to occupy relatively short lengths along the time axis, additional space along the time axis is then available to illustrate the details of each operation (i.e., by using a non-linear time scale).
    Type: Grant
    Filed: January 25, 2011
    Date of Patent: February 10, 2015
    Assignee: Siemens Aktiengesellschaft
    Inventors: Oswin Noetzelmann, Marko Bogeljic, Jochen Handels, Amir Davari Jazin, Karoly Kiraly, Dirk Schwarz
  • Patent number: 8954306
    Abstract: A behavior model is provided, which is configured to simulate one aspect of the behavior of a component apart from the component model for the component. The behavior model can be included in a circuit model used to simulate operation of a circuit. The circuit model can include a component model for a component and a corresponding behavior model, which is located in parallel or series with the component model. The component model and behavior model can collectively simulate all of the behavior of the component within the circuit. In an embodiment, the behavior model simulates snapback behavior exhibited by the component.
    Type: Grant
    Filed: June 30, 2010
    Date of Patent: February 10, 2015
    Assignee: International Business Machines Corporation
    Inventors: Junjun Li, Rahul Nayak
  • Patent number: 8949751
    Abstract: A method for visually verifying an implementation of a design is described. The method includes integrating logical design data, physical design data, and physical implementation data into a common data format and graphically displaying the commonly formatted data to provide a visualization of the design, the visualization including a spatial context component associated with the physical implementation data.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: February 3, 2015
    Assignee: The Boeing Company
    Inventors: Brent Hadley, Patrick Jan Eames, Michael Patrick Sciarra, Charles Mark Williams
  • Patent number: 8938316
    Abstract: In connection with a machining program used in machining a workpiece by means of a machine tool controlled by a numerical controller, interpolation data, a command position point sequence, and a servo position point sequence for each processing period are determined by simulation by designating speed data for giving a machining speed and precision data for giving a machining precision. A predicted machining time for workpiece machining is determined based on the determined interpolation data, and a predicted machining error for workpiece machining is determined based on the determined command and servo position point sequences. Further, the precision data and the speed data are determined for the shortest predicted machining time within a preset machining error tolerance, based on a plurality of predicted machining times and a plurality of predicted machining errors.
    Type: Grant
    Filed: February 23, 2012
    Date of Patent: January 20, 2015
    Assignee: FANUC Corporation
    Inventors: Toshiaki Otsuki, Osamu Hanaoka
  • Patent number: 8935133
    Abstract: A computing device may be used to create a model that includes a block. The block may represent a function corresponding to a simulation. Measurement points may be inserted into the model. The model may be used to create a simulation, and the measurement points may be used to measure operational characteristics corresponding to the block.
    Type: Grant
    Filed: March 26, 2012
    Date of Patent: January 13, 2015
    Assignee: The MathWorks, Inc.
    Inventors: Joel Berg, Venkata Tamminana, Jagadish Gattu
  • Patent number: 8924189
    Abstract: A system and method for workload generation include a processor for identifying a workload model by determining each of a hierarchy for workload generation, time scales for workload generation, and states and transitions at each of the time scales, and defining a parameter by determining each of fields for user specific attributes, application specific attributes, network specific attributes, content specific attributes, and a probability distribution function for each of the attributes; a user level template unit corresponding to a relatively slow time scale in signal communication with the processor; an application level template corresponding to a relatively faster time scale in signal communication with the processor; a stream level template corresponding to a relatively fastest time scale in signal communication with the processor; and a communications adapter in signal communication with the processor for defining a workload generating unit responsive to the template units.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: December 30, 2014
    Assignee: International Business Machines Corporation
    Inventors: Kay S. Anderson, Eric P. Bouillet, Parijat Dube, Zhen Liu, Dimitrios Pendarakis
  • Patent number: 8903687
    Abstract: A method for compensating for a dielectric absorption effect in a measurement configuration during measurements by an instrument having measurement terminals includes providing a feedback loop in the instrument, the loop having a gain adjustment and a simulation impedance and being adapted to provide a signal counter to the dielectric absorption at the measurement terminals; applying a transient calibration signal to the test terminals for at least two values of the gain adjustment; measuring a response to the calibration signal for each of the at least two values; and determining an operating value of the gain adjustment based on the measured responses. The operating value is used for subsequent measurements by the instrument, the simulation impedance modeling the dielectric absorption characteristics of the measurement configuration.
    Type: Grant
    Filed: August 17, 2007
    Date of Patent: December 2, 2014
    Assignee: Keithley Instruments, Inc.
    Inventors: John G. Banaska, Gregory Roberts
  • Patent number: 8855980
    Abstract: Embodiments are directed to an antenna builder and a method of building and maintaining an antenna design repository. A first embodiment consists of an antenna builder that enables the creation of an antenna representation that can subsequently be output into a plurality of formats to be used by other tools, such as electromagnetic simulation software. An alternative embodiment is directed to a method of building and maintaining a repository of antenna designs. The repository of antenna designs can be queried, enabling a plurality of users to search for specific antenna designs. Alternative embodiments can enable a user to search the repository antenna designs by visually browsing over the antenna designs in the repository. The repository of antenna designs is created by saving solutions generated by an optimizer during an optimization run to the repository. Solutions from the repository can also be used to seed and bootstrap other optimization runs.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: October 7, 2014
    Assignee: Dockon AG
    Inventors: Kenneth Joseph Brown, Ryan James Orsi
  • Patent number: 8849629
    Abstract: Embodiments are directed to an antenna builder and a method of building and maintaining an antenna design repository. A first embodiment consists of an antenna builder that enables the creation of an antenna representation that can subsequently be output into a plurality of formats to be used by other tools, such as electromagnetic simulation software. An alternative embodiment is directed to a method of building and maintaining a repository of antenna designs. The repository of antenna designs can be queried, enabling a plurality of users to search for specific antenna designs. Alternative embodiments can enable a user to search the repository antenna designs by visually browsing over the antenna designs in the repository. The repository of antenna designs is created by saving solutions generated by an optimizer during an optimization run to the repository. Solutions from the repository can also be used to seed and bootstrap other optimization runs.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: September 30, 2014
    Assignee: Dockon AG
    Inventors: Kenneth Joseph Brown, Ryan James Orsi
  • Patent number: 8849628
    Abstract: The software application is used to rank language translations and a method to implement those ranked language translations. The language translations are for textual or vocal phrases that a user wants to convert from its original language to a preferred language. The software application will refer to a variety of translation sources in order to create a set of applicable translations for a textual or vocal phrase. The software application will then rank each applicable translation with an accuracy score, which is weighed by three factors: the commonalities between the set of translation sources, a user input process, and a linguistic mapping process. Some methods to implement the ranked language translations include using accelerometer data from a electronic communication device to operate the software application, integrating a moderator into a conversation process, using subtitles in speech bubbles for a video chat, and using location data to communicate with different contacts.
    Type: Grant
    Filed: April 16, 2012
    Date of Patent: September 30, 2014
    Inventor: Andrew Nelthropp Lauder
  • Patent number: 8793106
    Abstract: A system, method and computer program product for predicting at least one feature of at least one product being manufactured. The system receives, from at least one sensor installed in equipment performing one or more manufacturing process steps, at least one measurement of the feature of the product being manufactured. The system selects one or more of the received measurement of the feature of the product. The system estimates additional measurements of the feature of the product at a current manufacturing process step. The system creates a computational model for predicting future measurements of the feature of the product, based on the selected measurement and the estimated additional measurements. The system predicts the future measurements of the feature of the product based on the created computational model. The system outputs the predicted future measurements of the feature of the product.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: July 29, 2014
    Assignee: International Business Machines Corporation
    Inventors: Robert J. Baseman, Amit Dhurandhar, Sholom M. Weiss, Brian F. White
  • Patent number: 8754663
    Abstract: A circuit for simulating an electrical load at a terminal of a test circuit having at least one first switch and at least one second switch includes a third switch connected to the first switch of the test circuit via a first external connection point. A fourth switch is connected to the second switch of the test circuit via a second external connection point. The first switch and the second switch are connected via a shared, first internal connection point to the terminal of the test circuit and the third switch and the fourth switch are connected via a shared, second internal connection point such that that the first switch, the second switch, the third switch and the fourth switch form an H-bridge circuit. A voltage source is configured to provide the first and second external connection points with a supply voltage. A controllable voltage source is connected in a transverse bridge branch between the terminal and the second internal connection point. An inductance is active in the transverse bridge branch.
    Type: Grant
    Filed: July 15, 2009
    Date of Patent: June 17, 2014
    Assignee: Dspace Digital Signal Processing and Control Engineering GmbH
    Inventors: Thomas Schulte, Joerg Bracker
  • Patent number: 8751993
    Abstract: A method of designing a microwave filter using a computerized filter optimizer, comprises generating a filter circuit design in process (DIP) comprising a plurality of circuit elements having a plurality of resonant elements and one or more non-resonant elements, optimizing the DIP by inputting the DIP into the computerized filter optimizer, determining that one of the plurality of circuit elements in the DIP is insignificant, removing the one insignificant circuit element from the DIP, deriving a final filter circuit design from the DIP, and manufacturing the microwave filter based on the final filter circuit design.
    Type: Grant
    Filed: July 11, 2013
    Date of Patent: June 10, 2014
    Assignee: Resonant LLC
    Inventors: Neal Fenzi, Kurt Raihn
  • Patent number: 8745563
    Abstract: A system for simulating operation of a VLSI interconnect structure having capacitive and inductive coupling between nodes thereof, including a processor, and a memory, the processor configured to perform obtaining a matrix X and a matrix Y containing different combinations of passive circuit element values for the interconnect structure, the element values for each matrix including inductance L and inverse capacitance P, obtaining an adjacency matrix A associated with the interconnect structure, storing the matrices X, Y, and A in the memory, and performing numerical integration to solve first and second equations.
    Type: Grant
    Filed: December 10, 2012
    Date of Patent: June 3, 2014
    Assignee: Purdue Research Foundation
    Inventors: Jitesh Jain, Stephen F Cauley, Hong Li, Cheng-Kok Koh, Vankataramanan Balakrishnan
  • Patent number: 8731876
    Abstract: Various embodiments of a method and apparatus for creating editable feature curves for a multi-dimensional model represented by a tessellated mesh are described. A mesh representation of a multi-dimensional model may not support intuitive modification of the model. The mesh representing the multi-dimensional model may be analyzed to extract feature curves that define the characteristics of the multi-dimensional model. Such feature curves may provide an intuitive mechanism for modifying the multi-dimensional model. The model may be modified by changing the constraints of the feature curves defining the model's characteristics. For example, a constraint may be modified to change the angle of the surface on either side of a location on a feature curve. A compressed representation of a multi-dimensional model may include the feature curves that define the shape of multi-dimensional model and a set of boundary curves that represent disjoint regions of the multi-dimensional model.
    Type: Grant
    Filed: August 10, 2010
    Date of Patent: May 20, 2014
    Assignee: Adobe Systems Incorporated
    Inventors: Nathan A. Carr, Pushkar P. Joshi, James L. Andrews
  • Patent number: 8718987
    Abstract: Provided is a circuit simulation model that can suitably represent capacitor characteristics, thereby realizing accurate circuit design and circuit analysis. A SPICE model is constituted of a capacitor unit in which a capacitor is replaced with a linear voltage dependent current source, a low-pass filter unit that has a function of extracting a DC bias voltage, a calculation circuit unit that is configured by combining an adder, a multiplier, and the like to perform a calculation of a circuit equation derived from an equivalent circuit for a capacitor such as an idealized C circuit model, an RC circuit model, or the like, and a linear voltage dependent voltage source that applies a total voltage applied across the capacitor to the calculation circuit.
    Type: Grant
    Filed: January 13, 2012
    Date of Patent: May 6, 2014
    Assignee: Taiyo Yuden Co., Ltd.
    Inventor: Xiangying Wu
  • Patent number: 8718988
    Abstract: A method determines and/or predicts a maximum power capacity of a battery by using a model of the battery based on an electric equivalent circuit diagram that predicts the maximum power capacity of the battery. The maximum power of the battery is prognosticated for a defined prognosis period and for the different operating modes with respect to the charging or discharging operation, considering the maximum allowable operating voltage and the maximum allowable operating current.
    Type: Grant
    Filed: April 13, 2012
    Date of Patent: May 6, 2014
    Assignee: Bayerische Motoren Werke Aktiengesellschaft
    Inventors: Oliver Bohlen, Michael Roscher
  • Patent number: 8712742
    Abstract: The present invention proposes methods, devices and computer program products. To this extent, there is defined a set X including N distinct parameter values x_i for at least one input parameter x, N being an integer greater than or equal to 1, first measured the physical quantity Pm1 for each of the N distinct parameter values x_i of the at least one input parameter x, while keeping all other input parameters fixed, constructed a Vandermonde matrix VM using the set of N parameter values x_i of the at least one input parameter x, and computed the model W for emulating the physical quantity P based on the Vandermonde matrix and the first measured physical quantity according to the equation W=(VMT*VM)?1*VMT*Pm1. The model is iteratively refined so as to obtained a desired emulation precision. The model can later be used to emulate the physical quantity based on input parameters or logs taken from the field and thereby support device design optimization.
    Type: Grant
    Filed: July 5, 2011
    Date of Patent: April 29, 2014
    Assignee: Renesas Mobile Corporation
    Inventors: Deogratius Musiige, Vincent Laulagnet
  • Patent number: 8712751
    Abstract: In a particular embodiment, a first digital function module is created that represents a first analog circuit and a second digital function module is created that represents a second analog circuit. A first value representing a first analog signal is transmitted from the first digital function module to the second digital function module while concurrently or substantially currently, the second digital function module transmits a second value representing a second analog signal to the first digital function module. In a particular embodiment, the first digital function module is a current signal related to an output of the first analog circuit and the second analog signal from the second digital function module is a voltage signal related to an output of the second analog circuit. The values may be transmitted along a bidirectional analog data bus capable of communicating real floating point numbers.
    Type: Grant
    Filed: May 8, 2009
    Date of Patent: April 29, 2014
    Assignee: QUALCOMM Incorporated
    Inventor: Jesse Eugene Chen
  • Patent number: 8706454
    Abstract: Disclosed are various embodiments for transmission evaluation. In one embodiment, among others, a method includes evaluating a plurality of contingencies to generate a plurality of contingency results, where at least one of the contingency results includes an overload condition. The evaluation is based at least in part upon a case associated with a transmission network. The method further includes sorting the plurality of contingency results based upon corresponding overload-contingency pairs and determining a potential remediation solution to the overload condition based at least in part upon the overload-contingency pair. In another embodiment, a system includes a transmission evaluation application executed in a computing device.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: April 22, 2014
    Assignee: Southern Company Services, Inc.
    Inventor: Joseph E. Sneed, III
  • Patent number: 8694294
    Abstract: In a computerized, automated method to determine the conductor structure of a gradient coil of a magnetic resonance device, the conductor structure is determined depending on the theoretical oscillation response of at least one metallic structure of the magnetic resonance device that is arranged adjacent to the gradient coil at the installation point, with the oscillation response of the metallic structure being determined dependent on theoretical eddy currents generated in the structure by the gradient coil.
    Type: Grant
    Filed: March 17, 2010
    Date of Patent: April 8, 2014
    Assignee: Siemens Aktiengesellschaft
    Inventors: Peter Dietz, Andreas Krug
  • Patent number: 8682638
    Abstract: Channel emulation in a PC computing platform including at least one general purpose parallel processor (GPPP) includes defining a plurality of fading channels in a GPPP and generating complex tap coefficients in a GPPP for the fading channels.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: March 25, 2014
    Assignee: Octoscope, Inc.
    Inventors: Fanny Mlinarsky, Samuel J. MacMullan
  • Patent number: 8676554
    Abstract: With a simulation apparatus for a system including a motor-driven compressor, a compressor that does not suffer from a driving torque shortage and surging, but can operate at low costs, can be provided. A simulation apparatus for a motor-driven compressor system includes a simulation section in which a driving motor, a compressor driven by the driving motor, a suction throttle valve controlling the inlet flow rate of the compressor, and an anti-surge valve interposed between pipes for returning a part of gas discharged from the compressor to the inlet side of the compressor are translated into unit models and stored. The simulation apparatus further includes an input section through which designed specification data of the compressor is input, a data setting section storing the designed specification data, and a display section displaying unsteady-state Q-H characteristics and required driving torque obtained through simulation by the simulation section.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: March 18, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Naoto Ebisawa, Hideaki Orikasa, Takeshi Miyanaga
  • Publication number: 20140067348
    Abstract: Among other things, one or more techniques for creating an array model for analog device modeling are provided. In an embodiment, the array model represents a mean value or a standard deviation value of an analog device characteristic for an analog device based on a physical location of the analog device within a circuit layout, where the physical location is identified using a physical set of coordinates. The physical set of coordinates maps to an array set of coordinates of the array model. In this manner, a mean value and a standard deviation value are obtainable from the array model using the array set of coordinates. The mean value and the standard deviation value are usable to model the analog device, and thus a circuit within which the analog device is used, to obtain a more accurate or realistic prediction of operation or behavior, for example.
    Type: Application
    Filed: August 28, 2012
    Publication date: March 6, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Yang Chung-Chieh, Chih-Chiang Chang, Chung-Ting Lu
  • Patent number: 8635050
    Abstract: The size distribution f(r) of powder particles is found, and the packing rate p of the powder particles is found based on the size distribution f(r) according to the following formula (a): p = ? i ? ? ? j ? ? r i 2 ? r j 3 ? f ? ( r i ) ? f ? ( r j ) ? r 2 ? ? ? r 3 ? ? p ji ? ( max ) ( a ) where f(ri): a frequency of i-particles having a radius of ri contained in the powder particles, f(rj): a frequency of j-particles having a radius of rj contained in the powder particles, ri: the radius of the i-particles contained in the powder particles, rj: the radius of the j-particles contained in the powder particles, ? r 2 ? : ? i ? ? r i 2 ? f ? ( r i ) ? r 3 ? : ? i ? ? r i 3 ? f ? ( r i ) pji(max): a void fraction in a hypothetical sphere having a radius of rj+ri around a j-particle having a radius of rj when the j-particle has i-particles most closely packed therearound so as be
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: January 21, 2014
    Inventor: Yutaka Aikawa
  • Publication number: 20140005992
    Abstract: Illustrative embodiments include a method, system, and computer program product for accelerating functional verification in simulation testing of an integrated circuit (IC). Using a processor and a memory, a serial operation is replaced with a direct register access operation, wherein the serial operation is configured to perform bit shifting operation using a register in a simulation of the IC. The serial operation is blocked from manipulating the register in the simulation of the IC. Using the register in the simulation of the IC, the direct register access operation is performed in place of the serial operation.
    Type: Application
    Filed: June 27, 2012
    Publication date: January 2, 2014
    Inventors: Michael Deindl, Jeffrey Joseph Ruedinger, Christian G. Zoellin
  • Patent number: 8615728
    Abstract: Roughly described, a method for approximating stress-induced mobility enhancement in a channel region in an integrated circuit layout, including approximating the stress at each of a plurality of sample points in the channel, converting the stress approximation at each of the sample points to a respective mobility enhancement value, and averaging the mobility enhancement values at all the sample points. The method enables integrated circuit stress analysis that takes into account stresses contributed by multiple stress generation mechanisms, stresses having vector components other than along the length of the channel, and stress contributions (including mitigations) due to the presence of other structures in the neighborhood of the channel region under study, other than the nearest STI interfaces. The method also enables stress analysis of large layout regions and even full-chip layouts, without incurring the computation costs of a full TCAD simulation.
    Type: Grant
    Filed: July 27, 2009
    Date of Patent: December 24, 2013
    Assignee: Synopsys, Inc.
    Inventors: Victor Moroz, Dipankar Pramanik
  • Patent number: 8601414
    Abstract: A system and methods are provided for verifying a hardware design for an electronic circuit. The method may include: providing a hardware design description for the electronic circuit; extracting a set of design constraints from the hardware design description, where the set of design constraints represents the electronic circuit in terms of signals and logical operations performed on the signals; creating an abstraction model from the set of design constraints, where the abstraction model abstracts one or more of the logical operations in the set of design constraints by replacing the abstracted logical operations with uninterpreted functions; and property checking the abstraction model in relation to one or more design properties. When a violation in the electronic circuit is detected by the property checking step, the feasibility of the violation is then checked and, if the violation is deemed infeasible, the abstraction model is refined.
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: December 3, 2013
    Assignee: The Regents of The University of Michigan
    Inventors: Zaher Andraus, Karem A. Sakallah, Mark Liffiton
  • Patent number: 8594981
    Abstract: A position detection and simulation platform includes software configurable logic and programmable inputs and outputs to support software configuration only changes for use with a variety of position feedback devices including synchros, resolvers, linear variable differential transformers, and rotary variable differential transformers. Power to the software configurable outputs is dynamically controlled so that the power supply voltage presented to the outputs satisfies a minimum threshold above the amplitude of the output signal. Dynamic control is based on at least one of a digital representation of a signal to be output, an analog version of the signal to be output, or the signal being output.
    Type: Grant
    Filed: June 2, 2011
    Date of Patent: November 26, 2013
    Assignee: United Electronic Industries
    Inventors: Olexiy Ivchenko, Denys Kraplin
  • Publication number: 20130311152
    Abstract: A system for generating behavioral models for analog circuits may include a database that is configured to store a parameterized hardware description language model of an analog circuit and an analog circuit simulator template of the analog circuit. The system may also include an interface module configured to receive data for an instance of the analog circuit in a schematic format. The system may also include an analog circuit simulator configured to use the received data and the analog circuit simulator template to generate a value for a parameter of the parameterized hardware description language model of the analog circuit. The system may also include a model constructor configured to generate a behavioral hardware description language model of the instance of the analog circuit based on the parameterized hardware description language model of the analog circuit and the generated value.
    Type: Application
    Filed: May 15, 2012
    Publication date: November 21, 2013
    Applicant: FUJITSU LIMITED
    Inventor: William W. WALKER
  • Patent number: 8549372
    Abstract: A method to increase automatic test pattern generation (ATPG) effectiveness and compression identifies instances of “majority gates” and modifies test generation to exploit their behavior so that fewer care bit are needed. This method can increase test coverage and reduce CPU time as previously aborted faults are now tested. The majority gate enhanced ATPG requires no hardware support and can be applied to any ATPG system.
    Type: Grant
    Filed: March 5, 2012
    Date of Patent: October 1, 2013
    Assignee: Synopsys, Inc.
    Inventors: Peter Wohl, John A. Waicukauski
  • Patent number: 8548790
    Abstract: A mechanism is provided for determining fragmentation in a computing environment. A simulation of virtual machine requests for resources in the computing environment is run for a predetermined time. The simulation is scaled down when the predetermined time exceeds a threshold. The scaling down includes scaling down the resources in the computing environment and/or scaling down a number of the virtual machine requests. The scaled down simulation is run iteratively to estimate relative fragmentation of the virtual machine requests against the resources in the computing environment.
    Type: Grant
    Filed: January 7, 2011
    Date of Patent: October 1, 2013
    Assignee: International Business Machines Corporation
    Inventor: Marcus A. Tylutki
  • Patent number: 8515725
    Abstract: A system, method and computer program product for modeling a semiconductor device structure. The system and method implemented includes performing a simulation of the circuit by applying at least one input waveform on a circuit input port, and loading an output port with at least one of output load; determining, at successive time steps of the circuit simulation, a voltage value Vi on the input port, a voltage value Vo on the output port, and a current values (ia) and (ib) on the respective input and output ports. Then there is computed from the respective current value for each successive time step of the simulation, at least one charge value (Qa(Vi, Vo)) and (Qb(Vi, Vo)), respectively, as a function of Vi and Vo voltage values; and generating a nonlinear charge source from the at least one charge value, the nonlinear charge source used in modeling a dynamic behavior of the cell. A voltage controlled charge source (VCCS) is thereby determined by capturing the natural digital circuit cell behavior.
    Type: Grant
    Filed: December 2, 2010
    Date of Patent: August 20, 2013
    Assignee: International Business Machines Corporation
    Inventors: Peter Feldmann, Sampath Dechu, Soroush Abbaspour, Ratan Singh
  • Patent number: 8510092
    Abstract: Computer-implementable recursive summation algorithms are disclosed that are useful for efficiently performing recursive convolution, such as is often required in Statistical Signal Analysis (SSA) techniques. The disclosed recursive summation algorithms can be more computationally-efficient from both a speed and memory perspective than other recursive convolution techniques known in the prior art, such as the techniques relying on Fast Fourier Transforms (FFTs).
    Type: Grant
    Filed: January 7, 2011
    Date of Patent: August 13, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Timothy M. Hollis, J. Matthew Tanner
  • Patent number: 8499274
    Abstract: A tool includes one or more machine readable storage mediums encoded with data. The data include a list of standard cells included in an integrated circuit (IC) design The data include a nominal leakage value approximating a respective median leakage value for each of the plurality of standard cells at a predetermined temperature and voltage. The data include at least one table including adjustment factors for calculating leakage based on voltage, temperature and process variations. The table includes a respective statistical scaling factor, for computing a mean leakage corresponding to a given median leakage. A processor is programmed to calculate and output a total IC leakage for the IC design at an input voltage and input temperature, based on the list, the nominal leakage values, the input voltage, the input temperature and at least one of the adjustment factors.
    Type: Grant
    Filed: February 23, 2012
    Date of Patent: July 30, 2013
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chien-Ju Chao, Jerry Chang-Jui Kao, King-Ho Tam, Chung-Hsing Wang, Huan Chi Tseng
  • Patent number: 8489369
    Abstract: An improved algorithm for calculating multimode fiber system bandwidth which addresses both modal dispersion and chromatic dispersion effects is provided. The radial dependence of a laser transmitter emission spectrum is taken into account to assist in designing more effective optical transmission systems.
    Type: Grant
    Filed: August 26, 2010
    Date of Patent: July 16, 2013
    Assignee: Panduit Corp.
    Inventors: Brett Lane, Jose M. Castro
  • Patent number: 8484000
    Abstract: Incoming data from, for example, an array of detectors, may be received. A dynamical system may be initialized corresponding to a modality of the incoming data so that a measurement probe based on the initialized dynamical system may be generated. Such a measurement probe may be injected into a quantum mechanical system so that it may be determined whether the injection of the measurement probe into the quantum mechanical system results in a collapse of the quantum mechanical system. Thereafter, it may be determined that a signal is present within the incoming data if the quantum mechanical system collapses. Related methods, apparatuses, systems, and computer-program products are also described.
    Type: Grant
    Filed: September 2, 2005
    Date of Patent: July 9, 2013
    Assignee: ViaLogy LLC
    Inventor: Sandeep Gulati