Abstract: A method of obtaining uniform and independent random numbers is given (a) comprising two distinct odd primes p1, p2 that give mutually coprime integers q1=(p1?1)/2 and q2=(p2?1)/2 with different parity to form the modulus d=p1p2; (b) comprising primitive roots z1, z2 of primes p1, p2, respectively, giving congruence relations z?zj mod(pj) for j=1, 2 that determine the multiplier z; and (c) comprising the initial value n coprime with d=p1p2. The method generates the coset sequence n<z>={r1=n, r2, r3, . . . } of period T=2q1q2 recursively by rj+1=zrj mod(d) for j=1, 2, . . . in the reduced residue class group Z*d, giving {v1=r1/d, v2=r2/d, . . . } for output.

Abstract: A pseudo-random number generator 100 generates a pseudo-random number by the following operation. At C.2, S1[B41] is determined from B41 set in a second internal memory, and S2[B40] is determined from B40. Then, R[J] is generated from S1[I], S1[B41], and S2[B40]. At C.3, S1[I] is newly generated based on S1[B41] and S2[B40]. At C.4, B4 is updated from S2(I). In the above, the relationship between R[J] and S2(I) is cut off, which makes difficult to estimate S2(I) from R[J], and security is increased. Further, since S1[I], S1[B41], S2[B40], etc. have 4 bytes, the processing speed is high.

Abstract: A random number generating apparatus and method for generating a metastable state signal by using logic gates include a metastable state generating unit generating and outputting a metastable state signal; an amplifying unit receiving the metastable state signal from the metastable state generating unit, amplifying the received metastable state signal, and outputting the amplified metastable state signal; and a sampling unit receiving the amplified metastable state signal and a sampling clock, and sampling and outputting the amplified metastable state signal according to the sampling clock.

Abstract: A linear feedback shift calculation apparatus, into which input data is input, and which outputs output data, including: an L generation unit which generates q values of q0 to qN?2 represented by: q k = { p 0 ( k = 0 ) p k + ? i = 0 k - 1 ? q k - 1 - i × p i ( 1 ? k ? N - 2 ) Equation ? ? 1 (where, p0, p1, . . . , pN?1, q0, q1, . . .

Abstract: There is provided a mechanism for generating random numbers following the normal distribution which does not generate a sequence correlation. The mechanism for generating random numbers following the normal distribution includes: a random recurrence plot generating mechanism 1 for generating random recurrence plots; and a recurrence plot-time series converting mechanism 4 for converting the random recurrence plots from the random recurrence plot generating unit 1 into time series, wherein Gaussian random numbers are generated by the recurrence plot-time series converting mechanism 4.

Abstract: Provided is a decryption method of an encryption algorithm. In the decryption method, a secret key can be received. A plurality of Montgomery multiplications can be repeated on a cipher text until a modular exponentiation of the secret key. When the repeated Montgomery multiplications are performed, an order of the plurality of Montgomery multiplications or an order of operands can be arbitrarily changed.

Abstract: Mental influence detectors and corresponding methods are useful for detecting an influence of mind and hidden or classically non-inferable information. An anomalous effect detector includes a source of non-deterministic random numbers, a converter to convert a property of numbers, a processor to accept converter output and to produce an output signal representative of an influence of mind. The processor output signal contains fewer numbers than the input. A quantum computer includes a physical source of entropy to generate output numbers; a source of test numbers; a measurement processor to accept output numbers and to measure a relationship between process numbers and at least one test number to produce an output representative of an influence of mind.

Abstract: There is provided a test module comprising a random number generator that generates a pseudo random pattern and includes a controller that generates a register selection signal based on a control instruction stored on an instruction memory, a plurality of polynomial configuration registers one of which is selected by the register selection signal, each polynomial configuration register having polynomial data stored therein, a plurality of initial value configuration registers one of which is selected by the register selection signal, each initial value configuration register having an initial value stored therein, and a random number generation shift register that loads the initial value from the selected one of the plurality of initial value configuration registers and sequentially generates the pseudo random pattern based on the polynomial data stored in the selected one of the plurality of polynomial configuration registers.

Abstract: Techniques are generally described for generating an identification number for an integrated circuit (IC). In some examples, methods for generating an identification of an IC may comprise selecting circuit elements of the IC, evaluating measurements of an attribute of the IC for the selected circuit elements, wherein individual measurements are associated with corresponding input vectors previously applied to the IC, solving a plurality of equations formulated based at least in part on the measurements taken of the attribute of the IC for the selected circuit elements to determine scaling factors for the selected circuit elements, and transforming the determined scaling factors for the selected circuit elements to generate an identification number of the IC. Additional variants and embodiments may also be disclosed.

Abstract: A parallel computer system adds entropy to improve the quality of random number generation by using parity errors as a source of entropy because parity errors are influenced by external forces such as cosmic ray bombardment, alpha particle emission, and other random or near-random events. By using parity errors and associated information to generate entropy, the quality of random number generation in a parallel computer system is increased.

Abstract: The invention refers to a pseudo random number generator, PRN, and a method for producing a random number signal, and a system for a fast frequency hopping radio comprising a PRN, and a method for such a system.

Abstract: An entropy source and a random number (RN) generator are disclosed. In one aspect, a low-energy entropy source includes a magneto-resistive (MR) element and a sensing circuit. The MR element is applied a static current and has a variable resistance determined based on magnetization of the MR element. The sensing circuit senses the resistance of the MR element and provides random values based on the sensed resistance of the MR element. In another aspect, a RN generator includes an entropy source and a post-processing module. The entropy source includes at least one MR element and provides first random values based on the at least one MR element. The post-processing module receives and processes the first random values (e.g., based on a cryptographic hash function, an error detection code, a stream cipher algorithm, etc.) and provides second random values having improved randomness characteristics.

Abstract: Presently disclosed is method and apparatus for generating a random bit stream by generating a random bit according to a polynomial expression, providing a modification function operative on the polynomial expression, and modifying the polynomial expression by modifying the modification function.

Abstract: A method and apparatus of transmitting an uplink control signal of a mobile station (MS) in a wireless communication system is provided. A mobile station (MS) receives resource allocation information of a first uplink control channel for transmitting an uplink synchronization signal and resource allocation information of a second uplink control channel. The MS allocates a first uplink control channel resource and a second uplink control channel resource to the first uplink control channel and the second uplink control channel respectively based on the resource allocation information of the first uplink control channel and the resource allocation information on the second uplink control channel and transmits an uplink control signal through at least one of the first uplink control channel and the second uplink control channel to a base station.

Abstract: A randomly selected point on an elliptic curve is set as the initial value of a variable and calculation including a random point value is performed in an algorithm for calculating arbitrary scalar multiple operation on an elliptic curve when scalar multiplication and addition on an elliptic curve are defined, then a calculation value obtained as a result of including a random point is subtracted from the calculation result, whereby an intended scalar multiple operation value on an elliptic curve is determined.

Abstract: A random number generator includes a first one time programmable (OTP) element and a second OTP element. The first OTP element and second OTP element have a first distribution of probable values for an electrical characteristic when unprogrammed and a second distribution of probable values when programmed. A programming circuit applies a programming signal to the first OTP element and to the second OTP element that causes the first OTP element to switch from being unprogrammed to being programmed and having a first value for its electrical characteristic and the second OTP element to switch from being unprogrammed to being programmed and having a second value for its electrical characteristic. A sense amplifier provides an output signal at a first logic state when the first value exceeds the second value and at a second logic state when the second value exceeds the first value.

Abstract: A terminal to be connected to a network has: a data acquisition unit for acquiring first data from the network; an extraction unit for extracting second data regarding a physical quantity in accordance with the first data; a random number generation unit for generating a random number in accordance with the second data; and an enciphering unit for enciphering the first data in accordance with the random number. The terminal has further a counter unit for counting the number of the first data, wherein the random number generation unit generates a random number in accordance with the second data or a value counted by the counter unit.

Abstract: A method, a system, and a computer program product for creating a set of identifiers are disclosed. A first set of identifiers is generated by a first randomization of a partition. Identifiers of the first set of identifiers are selected to generate a third set of identifiers. A second set of identifiers comprising a pre-defined number of identifiers is generated by a second randomization of the third set of identifiers.

Abstract: A method and apparatus for generating a pseudorandom sequence using a hybrid ring generator with low hardware cost. When a primitive polynomial over GF(2) is selected as the characteristic polynomial f(x) to construct a hybrid ring generator, the circuit implementing f(x) will generate a maximum-length sequence (m-sequence). The hybrid ring generator offers unmatched benefits over existing linear feedback shift register (LFSR) based maximum-length sequence generators (MLSGs). Assume k 2-input XOR gates are required in a standard or modular LFSR design. These benefits include requiring only (k+1)/2 2-input XOR gates, having at most one level of a 2-input XOR gate between any pair of flip-flops, enabling the output of each flip-flop to drive at most 2 fanout nodes, and creating a highly regular structure that makes the new design more layout and timing friendly.

Abstract: The invention is based on a process and system for producing random numbers by means of a quantum random number generator where the method comprises the steps of operating a laser in single mode and high modulation bandwidth by means of an electrical pulse driver, transforming the phase randomized optical pulses produced before in optical pulses with random amplitude and detecting the resulting random amplitude signals by means of a fast photodiode. The numbers thus produced are truly random.

Abstract: V An anomalous effect detector (100, 130, 300, 800, 830, 840, 900, 930) responsive to an influence of mind comprises a source of non-deterministic random numbers, SNDRN, (104, 134, 310), a phase-sensitive filter (108, 140, 170, 320), and a results interface (110, 160, 340). In some embodiments, the phase-sensitive filter comprises a complex filter (170). An artificial sensory neuron (802, 810, 820, 906) comprises a SNDRN. Preferably, several artificial sensory neurons (802, 906) are grouped in a small volume. An analog artificial sensory detector (800) comprises a plurality of analog artificial sensory neurons (802), an abstracting processor (804) and a control or feedback unit (806). Some embodiments include an artificial neural network (850). An artificial consciousness network (900) contains a plurality of artificial neural networks (902, 914). One of the artificial neural networks (914) comprises an activation pattern meta-analyzer.

Abstract: A method for generating random numbers mimics by software the principle of coin flipping by combining different sources of randomness. The random number to be generated is assembled bit by bit from the subsequent results of this “coin flipping simulation”. The method for generating a random number with nRND bits BRi, wherein 0?i?nRND?1, comprises the steps of • providing a random bit table BFT with mBFT addressable bits BTj, wherein 0?j?mBFT?1, said random bit table containing an equal number of “0” bits and “1” bits in a random distribution, and • for a bit BRi of said random number with 0?i?nRND?1, generating an address FA in the range between 0 and mBFT?1, selecting the bit BTFA having the address FA from said random bit table, and setting said bit BRi of said random number to equal said bit BTFA from said random bit table (BRi=BTFA).

Abstract: In a first embodiment of the present invention, a method for generating a random number for an instance of a hardware description language definition is provided, the method comprising: generating a unique signature for the instance; applying a message digest generation process on the unique signature to arrive at a message digest having a fixed length; and applying a random number generation process on the message digest.

Abstract: Random numbers output from a random-number generation circuit, for which an optimized control parameter is set, at a predetermined timing after power-on reset are obtained after each power-on reset, by repeating the power-on reset with respect to a system LSI for a preset number of times, and a test of the obtained predetermined number of random numbers is performed by using a test circuit incorporated in the system LSI to determine the quality of the random-number generation circuit incorporated in the system LSI.

Abstract: A random number generator includes an exclusive-OR circuit, a random number determiner, and a random number generation instruction inhibitor. The exclusive-OR circuit obtains an exclusive-OR of outputs from a number of digital circuits. The random number determiner determines whether or not an output generated according to an instruction to generate random numbers is a random number for each of the digital circuits. The random number generation instruction inhibitor inhibits an instruction to generate random numbers to be provided to the digital circuits whose output generated according to the instruction is determined to be not a random number by the random number determiner.

Abstract: A system is described for generating random numbers. The system may include a plurality of information sources and one or more sampling devices coupled to each of the information sources. Each information source may have a characteristic which may differ from the characteristic of any other information source. The sampling devices may sample the information sources at some sampling interval. A sample value may be captured from each of the information sources by the sampling devices coupled thereto at the sampling interval. An output representative of a substantially random number may be derived from the sample values captured at the sampling interval.

Abstract: Generating a number based on a bitset constraints. For example, a method of generating a pseudo random number satisfying a bitset constraint may include determining a number of possible solutions satisfying the bitset constraint; selecting an index representing a solution of the possible solutions; and generating the pseudo-random number based on the index. Other embodiments are described and claimed.

Abstract: A data processing which includes a conversion circuit and a pseudo random number generator including a series connection of plural shift registers. The conversion circuit receives a pseudo random number sequence from an output of one of the plural shift registers excluding a last shift register of the series connection, and converts first data to second data using the received pseudo random number sequence.

Abstract: A circuit for generating a random output value is disclosed that comprises: a bistable circuit having two stable states in which a 0 or a 1 is output and having a balanced metastable state in which a floating value between 0 and 1 is output, said bistable circuit resolving from said metastable state to one of said stable states on being switched on, said state depending on a voltage level at a port on said bistable circuit; a voltage level control circuit for controlling a voltage level at said port on said bistable circuit; a time measuring circuit for measuring a switching time taken for said bistable circuit to switch from said metastable state to one of said stable states following switch on; and control logic for controlling said time measuring circuit, said voltage level control circuit and a switching off and on of said bistable circuit, said control logic being adapted to perform a following sequence: control said voltage level control circuit to set a predetermined voltage level at said port on said

Abstract: Provided is a random number generator including: a clock generator outputting first and second control signals; a ring oscillator (RO) block receiving a meta stable voltage and performing an oscillation operation using the meta stable voltage in response to the first control signal; and a sampling unit sampling an output signal according to the oscillation operation in response to the second control signal.

Abstract: A random number generator includes a fairness checker and correction module that ensures that a complete random sequence within a predetermined period of time will be output by the random number generator.

Abstract: A function f(x) is calculated with a calculating apparatus that makes a correct calculation with a low probability. Provided that G and H are cyclic groups, f is a function that maps an element x of the group H into the group G, X1 and X2 are random variables whose values are elements of the group G, x1 is a realized value of the random variable X1, and x2 is a realized value of the random variable X2, an integer calculation part calculates integers a? and b? that satisfy a relation a?a+b?b=1 using two natural numbers a and b that are relatively prime. A first randomizable sampler is capable of calculating f(x)bx1 and designates the calculation result as u. A first exponentiation part calculates u?=ua. A second randomizable sampler is capable of calculating f(x)ax2 and designates the calculation result as v. A second exponentiation part calculates v?=vb. A determining part determines whether u?=v? or not. A final calculation part calculates ub?va? in a case where it is determined that u?=v?.

Abstract: The invention reduces unnecessary electromagnetic radiation noise due to an operation clock signal generated by an oscillator circuit. Random number data outputted by a random number generation circuit is stored in a frequency variable data register. The data stored in the frequency variable data register is replaced by random number data sequentially generated by the random number generation circuit. An oscillator circuit is a circuit generating a clock signal, and the clock signal is supplied as an operation clock signal to an internal circuit through an operation clock signal generation circuit. The frequency of the clock signal from the oscillator circuit is variably controlled in response to the random number data stored in the frequency variable data register. A frequency variable range control register which stores control data for controlling the range of the frequency variably controlled in response to the random number data stored in the frequency variable data register is further provided.

Abstract: A method for generating a set of random numbers with statistics represented by a cumulative density function includes generating a set of uniformly spaced samples between an upper limit and a lower limit. Each of the uniformly spaced samples are then mapped to a corresponding value on a cumulative density function curve. The set of uniformly spaced samples are then scrambled to randomize the samples. Companding may also be incorporated in the sample generation process.

Abstract: A circuit arrangement and method couple a hardware-based pseudorandom number generator (PRNG) to an execution unit in such a manner that pseudorandom numbers generated by the PRNG may be selectively output to the execution unit for use as an operand during the execution of instructions by the execution unit. A PRNG may be coupled to an input of an operand multiplexer that outputs to an operand input of an execution unit so that operands provided by instructions supplied to the execution unit are selectively overridden with pseudorandom numbers generated by the PRNG. Furthermore, overridden operands provided by instructions supplied to the execution unit may be used as seed values for the PRNG.

Abstract: The invention reduces unnecessary electromagnetic radiation noise associated with a step pulse of an output signal. A random number control register is a register for controlling start, standby, stop, timing or the like of output of random number data from a random number generation circuit. Random number data outputted by the random number generation circuit is stored in a rise/fall time variable data register. The data stored in the rise/fall time variable data register is replaced by random number data sequentially generated by the random number generation circuit. An output circuit is a circuit for outputting a signal from an internal circuit of a microcomputer to an external device, and the rise/fall times of the output signal from the output circuit are variably controlled in response to the random number data stored in the rise/fall time variable data register.

Abstract: A random number generator includes a fairness checker and correction module that ensures that a complete random sequence within a predetermined period of time will be output by the random number generator.

Abstract: Certain embodiments of the present invention relate to methods and apparatuses for providing random numbers for a gaming system. A random number generator (RNG) processor is arranged to select a plurality of RNG system components and configure them in an RNG pipeline, to provide random numbers to a gaming system. In one embodiment, a true random number generator (TRNG) is used to generate seeds for a pseudo random number generator in the pipeline. Analysers, loggers and other elements may also be included in the pipeline.

Abstract: An apparatus and method are provided in various illustrative embodiments for an integrated circuit chip that provides a fast, compact, and cryptographically strong random number generator. In one illustrative embodiment, an apparatus includes an initial random source, and a post-processing block in communicative connection with the initial random source. The post-processing block is configured to receive signals from the initial random source, to apply one or more finite field operations to the signals to generate an output, and to provide an output signal based on the output via an output channel, in this illustrative embodiment.

Abstract: A random signal generator includes a differential noise generation circuit, an amplification circuit and a single-ended amplifier. The differential noise generation circuit includes a pair of input nodes and a pair of output nodes, and is configured to receive noise signals at the pair of input nodes and to generate differential noise signals at the pair of output nodes. The differential noise generation circuit is self-biased such that the pair of input nodes is coupled to the pair of output nodes. The amplification circuit is configured to amplify the differential noise signals output from the differential noise generation circuit to generate amplified differential signals. The single-ended amplifier is configured to generate a random signal based on the amplified differential signals, the random signal having irregular transition time points.

Abstract: Data stored in memory is decoded using iterative probabilistic decoding and multiple decoders. A first decoder attempts to decode a representation of a codeword. If the attempt is unsuccessful, a second decoder attempts to decode the representation of a codeword. The second decoder may have a lower resolution than the first decoder. Probability values such as logarithmic likelihood ratio (LLR) values may be clipped in the second decoder. This approach can overcome trapping sets while exhibiting low complexity and high performance. Further, it can be implemented on existing decoders such as those used in current memory devices.

Abstract: A microprocessor including a random number generator within its instruction set architecture and made selectively available to program instructions of the instruction set architecture depending upon results of a self-test of the random number generator performed is disclosed. The microprocessor also includes a self-test unit that performs the self-test in response to a reset. The microprocessor also includes an instruction translator that translates instructions of the instruction set architecture, including instructions related exclusively to operation of the random number generator. The microprocessor generates a fault defined by the instruction set architecture in response to execution of one of the plurality of instructions related exclusively to operation of the random number generator if the self-test unit previously determined the random number generator is not operating properly.

Abstract: Disclosure is a method for randomly and dynamically generating a dynamic index, incorporated in a dynamic index system to improve the color performance of a display, comprises: transmitting video data to the dynamic index system; dynamically generating a substantially random number by a pseudo-random number generating unit; selecting the m bits of the substantially random number as a target adapted to as a position code of the dynamic pattern index matrix; and generating the two-dimensional dynamic pattern index matrix (S×T) by operating the position code.

Abstract: A nonvolatile memory system is operated by providing data to be written to a nonvolatile memory, logically combining the data to be written to the nonvolatile memory with a random pattern to generate encoded data; and programming the encoded data in the nonvolatile memory.

Abstract: A variable architecture for random number generators is disclosed. In some implementations, the architecture of a random number generator may be varied based on microcontroller-specific data stored on the microcontroller. For example, a random number generator module may be embedded in a microcontroller circuit. The random number generator module may be designed to receive input from data sources in the circuit that contain microcontroller-specific data (e.g., a unique chip identifier, data carried in fuse bits). In some implementations, the architecture of the random number generator module may be adjusted or varied based on the microcontroller-specific data.

Abstract: An apparatus configured to generate random numbers is provided, the apparatus having high entropy and being capable of a reduced chip size. The apparatus includes a plurality of metastable state generation units configured to generate a metastable state signal, a plurality of amplification units configured to amplify the metastable state signal, a connection signal generation unit configured to generate a first connection signal, and a first commutation unit configured to connect at least one metastable state generation unit to at least one amplification unit according to the first connection signal. For example, the number of metastable state generation units and amplification units necessary to achieve are threshold number of commutation connections can be greatly reduced as compared to conventional apparatuses for generating random numbers.

Abstract: A system comprising a feedback shift-register having L serially connected stages, and a non-linear feedback sub-system to receive input from stage n and 2n+1, and including a first AND gate having a first and second input operationally connected to the output of stage n and 2n+1, respectively, the sub-system having an output based on a value of an output of the first AND gate, a bit generator operative to generate bits, and an XOR gate having a first and second input, an output of the bit generator being operationally connected to the first input of the XOR gate, the output of the sub-system being operationally connected to the second input of the XOR gate, the output of the XOR gate being operationally connected to the input of the first stage of the shift-register. Related apparatus and methods are also described.

Abstract: Various embodiments are provided for fully digital chaotic differential equation-based systems and methods. In one embodiment, among others, a digital circuit includes digital state registers and one or more digital logic modules configured to obtain a first value from two or more of the digital state registers; determine a second value based upon the obtained first values and a chaotic differential equation; and provide the second value to set a state of one of the plurality of digital state registers. In another embodiment, a digital circuit includes digital state registers, digital logic modules configured to obtain outputs from a subset of the digital shift registers and to provide the input based upon a chaotic differential equation for setting a state of at least one of the subset of digital shift registers, and a digital clock configured to provide a clock signal for operating the digital shift registers.

Abstract: The present invention relates to a method and system for generating random numbers. The method for generating random numbers comprises the following steps: (a) generating a plurality of first random number samples; (b) assigning relative priority values to each of the first random number samples, wherein a common difference exists between neighboring priority values when the relative priority values are sorted in an ascending order or in a descending order; and (c) converting the first random number samples into respective second random number samples on the basis of the relative priority values. According to the present invention, the second random number samples are those converted into mathematical expectations which can be generated from the relative priority values. The method and system of the present invention can generate a plurality of random number samples having a distribution that is closest to the theoretical mean value and variance value, or having a uniform distribution.

Abstract: In the field of direct mind-machine interactions, prior art devices and methods do not provide sufficiently fast and reliable results. Mental influence detectors (100, 140, 400, 430) and corresponding methods provide fast and reliable results useful for detecting an influence of mind and hidden or classically non-inferable information. An anomalous effect detector (100) includes a source (104) of non-deterministic random numbers (110), a converter (114) to convert a property of numbers, a processor to accept converter output (118) and to produce an output signal (124) representative of an influence of mind. The processor output signal (124) contains fewer numbers than the input (110).