Fourier Patents (Class 708/403)

Patent number: 10387118Abstract: An arithmetic operation unit includes: a first multiplier configured to multiply two first input data to calculate first arithmetic data; a second multiplier configured to multiply two second input data to calculate second arithmetic data; a first adder configured to add the first arithmetic data and the second arithmetic data to calculate third arithmetic data; a first arithmetic selector configured to select one of the first arithmetic data and the third arithmetic data; a second arithmetic selector configured to select one of the second arithmetic data and the third arithmetic data; a second adder configured to add third input data and arithmetic data selected by the first arithmetic selector to calculate first arithmetic result data; and a third adder configured to add input fourth data and arithmetic data selected by the second arithmetic selector to calculate second arithmetic result data.Type: GrantFiled: January 24, 2018Date of Patent: August 20, 2019Assignee: FUJITSU LIMITEDInventor: Masaki Ukai

Patent number: 10135599Abstract: Frequency domain compression of fronthaul interface for transporting frequency domain data over Ethernet includes applying Inverse Discrete Fourier Transform to frequency domain data contained in a frequency bandwidth to generate a time domain output signal in a time domain. The time domain output signal is compressed to generate a compressed time domain output signal. The compressed time domain output signal is transmitted over a fronthaul interface to a remote unit. The compressed time domain output signal is decompressable at the remote unit to generate a decompressed time domain output signal. Discreet Fourier Transform is applied to the decompressed time domain output signal at the remote unit to recover the frequency domain data.Type: GrantFiled: August 5, 2016Date of Patent: November 20, 2018Assignee: Nokia Technologies OyInventors: Gunter Wolff, Roy Yang

Patent number: 9880975Abstract: Provided is a digital filter device that causes the last data of an immediately precedent input block to overlap with the input block of a time domain and generates an overlap block. The overlap block and the immediately precedent input block are each converted into a frequency domain block, subjected to filter processing, and converted into first and second time domain blocks. Among the overlap section of the first time domain block and the second time domain block, the frontend data of the first time domain block and the rearend data of the temporal axis of the second time domain block are removed as a section of data that is to be removed, and output data is generated. An overlap amount is controlled on the basis of a distortion amount that is determined by comparing the removed section of the data of the first time region domain with the output section of the data of the overlap section of the second time domain block other than the removed section of said overlap section.Type: GrantFiled: November 19, 2014Date of Patent: January 30, 2018Assignee: NEC CORPORATIONInventor: Atsufumi Shibayama

Patent number: 9875084Abstract: A circuit is disclosed that uses a four element dot product circuit (DP4) to approximate an argument t=x/pi for an input x. The argument is then input to a trigonometric function such as Sin Pi( ) or Cos Pi( ). The DP4 circuit calculates x times a representation of the reciprocal of pi. The bits of the reciprocal of pi that are used are selected based on the magnitude of the exponent of x. The DP4 circuit includes four multipliers, two intermediate adders, and a final adder. The outputs of the multipliers, intermediate adders, and final adder are adjusted such that the output of the final adder is a value of the argument t that will provide an accurate output when input to the trigonometric function.Type: GrantFiled: April 28, 2016Date of Patent: January 23, 2018Assignee: Vivante CorporationInventors: Lefan Zhong, Guosong Li, Zhenyu Wang, Rui Zhao

Patent number: 9820074Abstract: A processor can be associated with a memory for storing convolution data. A plurality of M filters from a corresponding plurality of M input channels to a selected one output channel can be provided, wherein each filter can be represented by a corresponding index, m. Each of the M filters can be partitioned into K respective filter partitions, wherein each respective filter partition can be represented by a corresponding index, k. A frequencydomain representation of each filter partition can be provided, wherein each frequencydomain representation of a filter partition comprises N frequency bins and a corresponding frequencydomain filter coefficient, wherein each respective frequency bin can be represented by a corresponding index, n. The memory can store such information in an arrangement suitable for the processor to concurrently receive sufficient information to concurrently convolve a frame of each input signal with the respective filters.Type: GrantFiled: March 14, 2014Date of Patent: November 14, 2017Assignee: Apple Inc.Inventors: Joshua Atkins, Adam Strauss

Patent number: 9806789Abstract: An apparatus and method for fullduplex millimeter wave mobile wireless communication are provided. The apparatus includes a Spatial Division Duple (SDD) mobile communication system using millimeter waves, the SDD mobile communication system including a first wireless terminal having a first transmit antenna array having a plurality of first transmit antennas for transmitting a spatially beamformed first transmit beam, and a first receive antenna array having a plurality of first receive antennas for forming a spatially beamformed first receive beam and a second wireless terminal including a second transmit antenna array having a plurality of second transmit antennas for transmitting a spatially beamformed second transmit beam directed towards a receive beam of the first wireless terminal, and a second receive antenna array having a plurality of second receive antennas for forming a spatially beamformed second receive beam directed toward the transmit beam of the first terminal.Type: GrantFiled: April 1, 2011Date of Patent: October 31, 2017Assignee: Samsung Electronics Co., Ltd.Inventors: Farooq Khan, Zhouyue Pi

Patent number: 9310307Abstract: Highspeed data processing is achieved by measuring spectral data using a multivariate analysis. This is accomplished by a determining sampling intervals or sampling data to be used in the multivariate analysis, obtaining a spectral data group of the determined sampling intervals, and carrying out the multivariate analysis using the obtained spectral data group.Type: GrantFiled: May 29, 2014Date of Patent: April 12, 2016Assignee: Canon Kabushiki KaishaInventor: Koichi Tanji

Patent number: 9229909Abstract: A method for designing a discrete Fourier transform (DFT) unit in a system on a target device includes identifying a number of DFT engines to implement in the DFT unit in response to a data throughput rate, a clock rate of the system, a size of a DFT, and radix of each of the DFT engines.Type: GrantFiled: November 2, 2012Date of Patent: January 5, 2016Assignee: Altera CorporationInventor: Steven Perry

Patent number: 8984038Abstract: Aspects of a method and system for unconstrained frequency domain adaptive filtering include one or more circuits that are operable to select one or more time domain coefficients in a current filter partition. A value may be computed for each of the selected one or more time domain coefficients based on a corresponding plurality of frequency domain coefficients. The corresponding plurality of frequency domain coefficients may be adjusted based on the computed values. A subsequent plurality of frequency domain coefficients in a subsequent filter partition may be adjusted based on the computed values. Input signals may be processed in the current filter partition based on the adjusted corresponding plurality of frequency domain coefficients. A timeadjusted version of the input signals may be processed in a subsequent filter partition based on the adjusted subsequent plurality of frequency domain coefficients.Type: GrantFiled: November 22, 2013Date of Patent: March 17, 2015Assignee: Broadcom CorporationInventors: Kuoruey (Ray) Han, Peiqing Wang, Linghsiao Wang, Kishore Kota, Arash Farhoodfar

Patent number: 8917588Abstract: An FFT/IFFT operating core capable of minimizing a required memory depth during operation is disclosed. The FFT/IFFT operating core includes an inputting buffer, a first multiplexer, an operating module, and a controlling module. The inputting buffer stores and outputs a first FFT input sequence. The first multiplexer is utilized to multiplex the first FFT input sequence and a third input sequence. The controlling module generates a process indicating signal and a bypass indicating signal. The operating module has a plurality of operating stages in series. The operating module transforms the first and third FFT input sequences into a first and third FFT output sequences, respectively, and it transforms a second IFFT input sequence into a second IFFT output sequence.Type: GrantFiled: June 8, 2009Date of Patent: December 23, 2014Assignees: Silicon Motion, Inc., FCI Inc.Inventor: Changik Hwang

Patent number: 8909686Abstract: A discrete Fourier calculation device includes a twiddle factor table storage unit that stores therein a twiddle factor table that associates twiddle factors with phases of the corresponding twiddle factors; a correction value specifying unit that specifies first and second correction values for correcting a phase of an input signal in accordance with an amplitude of the input signal; a generating unit that corrects the phase of the input signal by using the specified first and second correction values to generate first and second phases; an addition unit that adds an arbitrary phase corresponding to an arbitrary twiddle factor stored in the twiddle factor table, to each of the generated first and second phases; and a rotation calculation unit that acquires, from the twiddle factor table, first and second twiddle factors corresponding to the first and second phases and sums the acquired first and second twiddle factors.Type: GrantFiled: June 27, 2012Date of Patent: December 9, 2014Assignee: Fujitsu LimitedInventor: Jun Kameya

Patent number: 8898212Abstract: A data reordering system for determining addresses associated with a vector of transformed data and corresponding method of reordering transformed data, where the data reordering system includes: a first transform function coupled to a data vector and operable to provide the vector of transformed data; a reordering function, including a plurality of counters, that is operable to determine a plurality of offset addresses, with a, respective, offset address for each element in the vector of transformed data; and an adder operable to add a base address that corresponds to the first address to the each, respective, offset address to provide a sequence of addresses suitable for accessing the vector of transformed data to provide a resequenced vector of transformed data.Type: GrantFiled: October 24, 2008Date of Patent: November 25, 2014Assignee: Freescale Semiconductor, IncInventors: Ning Chen, Christopher J. Daniels, Leo G. Dehner, Gregory C. Ng, Wendy F. Reed

Publication number: 20140330879Abstract: A signal is decomposed into different components using a transform, with the components then being separately presented to a person in a manner that produces a different cognitive experience than would have resulted from either (a) presentation of the original signal, or (b) presentation of a fully synthesized (inverse transformed) signal.Type: ApplicationFiled: July 21, 2014Publication date: November 6, 2014Inventors: Don Wayne Estes, Randall Joseph Stack

Patent number: 8861649Abstract: Implementations related to power reduction in physical layer wireless communications are disclosed.Type: GrantFiled: February 23, 2009Date of Patent: October 14, 2014Assignee: Empire Technology Development LLCInventor: Thomas M. Conte

Patent number: 8819097Abstract: An apparatus for performing a Fast Fourier Transform (FFT) is provided. The apparatus comprises a reorder matrix, symmetrical butterflies, and a memory. The reorder matrix is configured to have a constant geometry, and the butterflies are coupled in parallel to the reorder matrix. The memory is also coupled to the reorder matrix and each butterfly. The reorder matrix, the butterflies, and the memory can then execute a split radix algorithm.Type: GrantFiled: September 9, 2011Date of Patent: August 26, 2014Assignee: Texas Instruments IncorporatedInventors: Joyce Y. Kwong, Manish Goel

Patent number: 8788558Abstract: A method of operating a dataprocessing unit to produce a transform comprises calculating first and second output data values based at least on first and second input data values. The method comprises reading the first and second input data values from locations of a first buffer, the locations being determined by first and second read addresses based on first and second read indices. The method also comprises writing the first and second output data values to adjacent memory locations of a second buffer during a single write cycle. Furthermore, the method comprises reading third and fourth input data values from locations of the second buffer, the locations being determined by third and fourth read addresses determined by swapping at least two of the bits of the first and second read indices respectively. A dataprocessing unit for producing a transform, a transformcomputation unit and an electronic apparatus are also described.Type: GrantFiled: June 26, 2008Date of Patent: July 22, 2014Assignee: Telefonaktiebolaget L M Ericsson (Publ)Inventor: Per Persson

Publication number: 20140164460Abstract: A digital signal processing apparatus and a digital signal processing method are provided. The digital signal processing apparatus includes a memory, a control logic unit, a butterfly arithmetic unit, a selector, a first twiddle factor generator, a second twiddle factor generator and a twiddle factor latch. The first twiddle factor generator and the second twiddle factor respectively provide a first subtwiddle factor and a second subtwiddle factor. A weight value (twiddle factor) is produced by the butterfly arithmetic unit through performing a complex multiplication operation on the first subtwiddle factor and the second subtwiddle factor.Type: ApplicationFiled: February 26, 2013Publication date: June 12, 2014Applicant: NUVOTON TECHNOLOGY CORPORATIONInventor: TsungHsien Hsieh

Publication number: 20140164455Abstract: A signal is decomposed into different components using a transform, with the components then being separately presented to a person in a manner that produces a different cognitive experience than would have resulted from either (a) presentation of the original signal, or (b) presentation of a fully synthesized (inverse transformed) signal.Type: ApplicationFiled: June 5, 2013Publication date: June 12, 2014Inventors: Don Wayne Estes, Randall Joseph Stack

Patent number: 8738680Abstract: An improved processing engine for performing Fourier transforms includes an instruction processor configured to process sequential instruction software commands and a Fourier transform engine coupled to the instruction processor. The Fourier transform engine is configured to perform Fourier transforms on a serial stream of data. The Fourier transform engine is configured to receive configuration information and operational data from the instruction processor via a set of software tasks.Type: GrantFiled: March 26, 2009Date of Patent: May 27, 2014Assignee: Qualcomm IncorporatedInventors: Arunava Chaudhuri, Hemanth Sampath, Iwen Yao, Jeremy H. Lin, Raghu N. Challa, Min Wu

Patent number: 8718153Abstract: The present invention relates to a signal transmitting apparatus, a method thereof, and an inverse fast Fourier transform (IFFT) apparatus for a signal transmitting apparatus. A signal transmitting apparatus according to an embodiment of the present invention receives data, and performs inverse fast Fourier transform (IFFT) on the data on the basis of a twiddle factor for shifting output data by the size of a cyclic prefix. In addition, the signal transmitting apparatus sequentially stores data corresponding to the size of the cyclic prefix starting with initial data among the transformed data, and generates an OFDM symbol on the basis of the stored data and the transformed data. According to the embodiment of the present invention, it is possible to efficiently reduce a time delay and a memory use amount when a cyclic prefix is added at a transmitting end, without changing the size of hardware and power consumption.Type: GrantFiled: April 17, 2008Date of Patent: May 6, 2014Assignees: Samsung Electronics Co., Ltd., Electronics and Telecommunications Research InstituteInventors: JunWoo Kim, DaeHo Kim, YoungHa Lee, YounOk Park

Publication number: 20140122553Abstract: A method and apparatus may be used to generate complex exponentials for either frequency domain or time domain applications by programming input parameter values into a complex exponential vector generator (260) having a frequency generator stage (281) and a vector phase accumulator stage (282) arranged with a vector element multiplier stage (283) to generate complex exponential phase index values (?0, ?1, . . . ?v1) that are processed by a complex exponential generator stage (284) to output a plurality of complex exponential values (e.g., ej2??0, ej2??1, . . . ej2??v1) that may be rearranged by a permutation unit (286) for use by vector data path.Type: ApplicationFiled: November 1, 2012Publication date: May 1, 2014Inventors: Leo G. Dehner, Oded Yishay

Publication number: 20140101219Abstract: Fourier transform computation for distributed processing environments is disclosed. Example methods disclosed herein to compute a Fourier transform of an input data sequence include performing first processing on the input data sequence using a plurality of processors, the first processing resulting in an output data sequence having more data elements than the input data sequence Such example methods also include performing second processing on the output data sequence using the plurality of processors, the output data sequence being permutated among the plurality of processors, each of the processors performing the second processing on a respective permutated portion of the output data sequence to determine a respective, ordered segment of the Fourier transform of the input data sequence.Type: ApplicationFiled: October 10, 2012Publication date: April 10, 2014Inventors: Ping Tak Peter Tang, Jong Soo Park, Vladimir Petrov

Patent number: 8694570Abstract: A device and method for evaluating multidimensional discrete Fourier transforms (DFT) by eliminating transpose operations by transforming every dimension concurrently. At least one computing node is enabled to evaluate a DFT of one of a multidimensional input data set and a subgroup of the input data set, wherein the subgroup comprises groupings of elements taken from a plurality of selected dimensions of the input data set for subsequent multidimensional DFT operations.Type: GrantFiled: January 27, 2010Date of Patent: April 8, 2014Inventors: Arun Mohanlal Patel, Paul Chow

Publication number: 20140089365Abstract: Object detection receives an input image to detect an object of interest. It determines feature matrices based on the received image, wherein each matrix represents a feature of the received image. The plurality of matrices are Fourier transformed to Fourier feature matrices. Fourier filter matrices are provided, each representing a feature of an object transformed in Fourier space. Each filter matrix is pointwise multiplied with one of the feature matrices corresponding to the same feature. The plurality of matrices are summed, resulting by pointwise multiplying each Fourier filter matrix with the corresponding Fourier feature matrix to obtain a Fourier score matrix. An inverse Fourier transform of the Fourier score matrix is performed, resulting in a score matrix, which is used to detect the object in the input image.Type: ApplicationFiled: September 21, 2012Publication date: March 27, 2014Applicant: FONDATION DE I'INSTITUT DE RECHERCHE IDIAPInventors: Charles DUBOUT, Francois FLEURET

Publication number: 20140052766Abstract: Based at least in part on one or more characteristics relating to a measurement system, a polygonal space in a Fourier domain is determined. A representation of a function that is bandlimited within the polygonal space is computed.Type: ApplicationFiled: August 13, 2013Publication date: February 20, 2014Applicant: WESTERNGECO L.L.C.Inventors: CAN EVREN YARMAN, RYAN DEAN LEWIS, LUCAS MONZON

Patent number: 8649255Abstract: A device and a method for Fast Fourier Transform (FFT) are disclosed. The device includes a data receiving module, an address translation module, a data storage module, a FFT module, a data extraction module and a data output module. The data receiving module is configured to receive the input data. The address translation module is configured to duplicate M/N copies of the received data and then send them to the data storage module. The data storage module is configured to store the received data sent by the address translation module to M/N different addresses. The FFT module is configured to perform Mpoint FFT on the stored data. The data extraction module is configured to extract one point in every several points of the transformed data, and send the extracted data to the data output module. The data output module is configured to output the received data.Type: GrantFiled: April 13, 2010Date of Patent: February 11, 2014Assignee: ZTE CorporationInventors: Zhi Huang, Daibing Zeng, Xiaolei Sun

Patent number: 8639736Abstract: A method and apparatus for detecting a signal using a cyclostationary characteristic value is provided. A method of detecting a signal using a cyclostationary characteristic value includes: calculating cyclostationary characteristic values with respect to a cyclic frequency domain of an input signal; multiplying the calculated cyclostationary characteristic values with each other; and detecting the signal from the input signal based on the result of the multiplication.Type: GrantFiled: August 21, 2008Date of Patent: January 28, 2014Assignee: Electronics and Telecommunications Research InstituteInventors: Sunmin Lim, SangWon Kim, Changhyun Park, Myung Sun Song, Gwangzeen Ko, ChangJoo Kim

Patent number: 8634486Abstract: A signal receiving apparatus includes: a processing unit configured to carry out Fourier transform on Fouriertransform data serving as a Fouriertransform object and carry out Fourier transform on inverseFouriertransform data serving as an inverseFouriertransform object; and a control unit configured to output pieces of data obtained as a result of the Fourier transform carried out on the Fouriertransform data in an order, in which the pieces of data have been obtained, in a process of outputting the pieces of data and output other pieces of data obtained as a result of the Fourier transform carried out on the inverseFourier transform data by rearranging the other pieces of data in a process of outputting the other pieces of data.Type: GrantFiled: September 19, 2011Date of Patent: January 21, 2014Assignee: Sony CorporationInventors: Ryoji Ikegaya, Hidetoshi Kawauchi, Suguru Houchi, Naoki Yoshimochi

Patent number: 8612499Abstract: We describe a method for using a classical computer to generate a sequence of elementary operations (SEO) that can be used to operate a quantum computer. A quantum computer operating under such a SEO can be used to evaluate certain quantum operator averages.Type: GrantFiled: November 1, 2010Date of Patent: December 17, 2013Inventor: Robert R. Tucci

Patent number: 8606839Abstract: A method for computing a fast Fourier transform (FFT) in a parallel processing structure uses an interleaved computation process. In particular, the interleaved FFT computation process intertwines the output of two different shifted Fourier matrices to obtain a Fourier transform of an input vector. Next, an evenodd extension process is applied to the transformed input vector, whereupon various terms are grouped in a computational tree. As such, the resulting segmentation of the computation allows the fast Fourier transform to be computed in a parallel manner.Type: GrantFiled: August 21, 2008Date of Patent: December 10, 2013Assignee: The University of AkronInventors: Dale H. Mugler, Nilimb Misal

Patent number: 8601046Abstract: Described embodiments provide an apparatus for calculating an Npoint discrete Fourier transform of an input signal having multiple sample values. The apparatus includes at least one input configured to receive the sample values and a counter to count sample periods. Also included are at least two parallel multipliers to multiply each sample value, with each of the multipliers having a corresponding multiplication factor. There is at least one multiplexer to select one of the at least two parallel multipliers. An adder sums the scaled sample values and an accumulator accumulates the summed sample values. N is an integer and the at least two parallel multipliers are selectable based upon the value of N and the value of the sample period count.Type: GrantFiled: February 15, 2013Date of Patent: December 3, 2013Assignee: LSI CorporationInventor: David Noeldner

Patent number: 8601044Abstract: Circuitry performing Discrete Fourier Transforms. The circuitry can be provided in a fixed logic device, or can be configured into a programmable integrated circuit device such as a programmable logic device. The circuitry includes a floatingpoint addition stage for adding mantissas of input values of the Discrete Fourier Transform operation, and a fixedpoint stage for multiplying outputs of the floatingpoint addition stage by twiddle factors. The fixedpoint stage includes memory for storing a plurality of sets of twiddle factors, each of those sets including copies of a respective twiddle factor shifted by different amounts, and circuitry for determining a difference between exponents of the outputs of the floatingpoint stage, and for using that difference as an index to select from among those copies of that respective twiddle factor in each of the sets.Type: GrantFiled: March 2, 2010Date of Patent: December 3, 2013Assignee: Altera CorporationInventor: Martin Langhammer

Patent number: 8595278Abstract: Aspects of a method and system for unconstrained frequency domain adaptive filtering include one or more circuits that are operable to select one or more time domain coefficients in a current filter partition. A value may be computed for each of the selected one or more time domain coefficients based on a corresponding plurality of frequency domain coefficients. The corresponding plurality of frequency domain coefficients may be adjusted based on the computed values. A subsequent plurality of frequency domain coefficients in a subsequent filter partition may be adjusted based on the computed values. Input signals may be processed in the current filter partition based on the adjusted corresponding plurality of frequency domain coefficients. A timeadjusted version of the input signals may be processed in a subsequent filter partition based on the adjusted subsequent plurality of frequency domain coefficients.Type: GrantFiled: June 23, 2009Date of Patent: November 26, 2013Assignee: Broadcom CorporationInventors: Kuoruey Han, Peiqing Wang, Linghsiao Wang, Kishore Kota, Arash Farhoodfar

Patent number: 8577946Abstract: There is provided a signal receiving apparatus including first to pth stage computers configured to apply, in a stepbystep manner, butterfly operations to 2N input values; and 2N registers configured to store values obtained by a p?1th stage computer wherein the pth stage computer includes (a) 2L butterfly operation circuits configured to transmit, from corresponding 2M output ports, values obtained by the butterfly operations based on values provided to 2M input ports and (b) 2L selecting circuits arranged corresponding to the butterfly operation circuits, each selecting circuit providing a value of a register corresponding to different one of 2L BFInOrder_i(j,t) (wherein, BFInOrder_i(j,t) denotes values obtained by converting BFOutOrder_i(j,t)=t+j*2(N?M)+i*2N?(M+L) or (2(N?(M+L))?1?t)+j*2(N?M)+i*2(N?(M+L)) expressed by base H to base 2M of (log2M 2N)?1 words, wordreversing the values converted to base 2M, and converting the wordreversed values to the base H).Type: GrantFiled: January 30, 2012Date of Patent: November 5, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Seiichiro Horikawa, Koichiro Ban

Patent number: 8572149Abstract: Disclosed are apparatus and methods for dynamic databased scaling of data. The disclosed methods and apparatus involve storing one or more input data samples, which are to be scaled and input to a processing function such as a Fast Fourier Transform. A scaling value operable for scaling the one or more data samples is determined based on the one or more input data samples, and then the stored data samples are scaled based on the computed scaling value when read out of storage prior to the processing function. The scaling of data based on the input data allows the data to be scaled dynamically, not statically, and ensures that the data fits within a desired bit width constraint of the processing function thereby economizing processing resources.Type: GrantFiled: March 25, 2010Date of Patent: October 29, 2013Assignee: QUALCOMM IncorporatedInventors: Brian C. Banister, Surendra Boppana

Patent number: 8572148Abstract: A data reorganizer for Fourier Transforms, both forward and inverse, of multiple parallel data streams input to an integrated circuit, and method for use thereof, are described. The data reorganizer has a k input commutator, for k a positive integer greater than zero; an address generator; memory buffers; and an output commutator.Type: GrantFiled: February 23, 2009Date of Patent: October 29, 2013Assignee: Xilinx, Inc.Inventors: Gabor Szedo, Hemang Parekh

Patent number: 8566382Abstract: Apparatus and methods for storing data in a block to provide improved accessibility of the stored data in two or more dimensions. The data is loaded into memory macros constituting a row of the block such that sequential values in the data are loaded into sequential memory macros. The data loaded in the row is circularly shifted a predetermined number of columns relative to the preceding row. The circularly shifted row of data is stored, and the process is repeated until a predetermined number of rows of data are stored. A two dimensional (2D) data block is thereby formed. Each memory macro is a predetermined number of bits wide and each column is one memory macro wide.Type: GrantFiled: September 8, 2009Date of Patent: October 22, 2013Assignee: Advanced Micro Devices, Inc.Inventors: Larry Pearlstein, Richard K. Sita

Patent number: 8549060Abstract: An apparatus for simulating a signal composed of a plurality of individual signals from respective signal locations at a simulation location, having a provider for providing the plurality of individual signals in the time domain, a transformer for transforming the individual signals to the frequency domain, a processor for processing the individual signals transformed to the frequency domain each depending on a signal channel existing between the simulation location and the respective signal location, a combiner for combining the processed individual signals transformed to the frequency domain to a combined signal, and a transformer for transforming the combined signal to the time domain for generating the simulated combined signal at the simulation location.Type: GrantFiled: August 30, 2007Date of Patent: October 1, 2013Assignee: Innovationszentrum fuer Telekommunikationstechnik GmbH IZTInventors: Uwe Gruener, Anreas Klose, Rainer Perthold, Roland Zimmermann

Patent number: 8504601Abstract: A finite impulse response (FIR) filter having a differential output and capable of having negative coefficients, and a method of designing the filter, is disclosed. In contrast to the prior art, in which two output signals requires the use of two identical sets of impedance devices corresponding to the Fourier coefficients that create the desired response of the filter, the described method and system uses only a single set of impedance devices, and thus approximately onehalf of the number of impedance devices used in the prior art. This is accomplished by appropriately selecting which resistors contribute to which output, so that a differential output may be obtained that is substantially the same as if impedance devices corresponding to all of the coefficients were used for each signal.Type: GrantFiled: March 20, 2012Date of Patent: August 6, 2013Assignee: ESS Technology, Inc.Inventor: A. Martin Mallinson

Patent number: 8484275Abstract: There is provided a method for generating a table for reordering the output of a Fourier transform, the Fourier transform being performed on a predefined number of input samples, the method comprising performing one or more decomposition stages on a sequence corresponding in number to the predefined number of input samples to form a representation of the output of the Fourier transform; wherein at least one of the decomposition stages comprises a composite operation that is equivalent to two or more operations; and rearranging the representation of the output of the Fourier transform to generate a reordering table.Type: GrantFiled: December 7, 2007Date of Patent: July 9, 2013Assignee: Altera CorporationInventors: Martin Langhammer, Neil Kenneth Thorne

Patent number: 8484277Abstract: Passive signal combiners are employed to transform at least one signal from one domain to another. In some aspects the transformation comprises an FFT, an IFFT, a DFT, or an IDFT. In some implementations the passive signal combiners comprise a set of planar waveguides (e.g., which may be referred to as beamformers or Rotman lenses) that have multiple inputs and outputs and are configured to provide orthogonal output signals. In some implementations an electrical signal (e.g., received via an antenna element) is coupled to passive beamformers that transform the electrical signal from one domain to another domain. Here, a transformation of the electrical signal by a given passive beamformer may have a first resolution, and outputs from the passive beamformers may correspond to orthogonal groups. A combiner circuit may be used to combine the outputs from the passive beamformers and produce a combined output having a second resolution and an associated error.Type: GrantFiled: December 5, 2008Date of Patent: July 9, 2013Assignee: Rambus Inc.Inventors: Mahdieh B. Shemirani, Farshid Aryanfar

Patent number: 8484276Abstract: Techniques are disclosed for converting data into a format tailored for efficient multidimensional fast Fourier transforms (FFTS) on single instruction, multiple data (SIMD) multicore processor architectures. The technique includes converting data from a multidimensional array stored in a conventional rowmajor order into SIMD format. Converted data in SIMD format consists of a sequence of blocks, where each block interleaves s rows such that SIMD vector processors may operate on s rows simultaneously. As a result, the converted data in SIMD format enables smallersized 1D FFTs to be optimized in SIMD multicore processor architectures.Type: GrantFiled: March 18, 2009Date of Patent: July 9, 2013Assignee: International Business Machines CorporationInventors: David G. Carlson, Travis M. Drucker, Timothy J. Mullins, Jeffrey S. McAllister, Nelson Ramirez

Patent number: 8473536Abstract: A method for providing an adiabatic RF pulse that is an inversion or refocusing pulse for a RF pulse sequence is provided. A linear phase frequency profile (Flp(?)) is determined for the adiabatic RF pulse. A quadratic phase is applied to the linear phase frequency profile for the adiabatic RF pulse to obtain F(?), wherein the applying the quadratic phase comprises setting F(?)=Flp(?)eik?2. A polynomial ? is set to equal a Fourier Transform (F(?)). A corresponding minimum phase ? polynomial is determined for the ? polynomial. (?,?) are set as inputs to an inverse Shinnar LeRoux transform to generate an adiabatic RF waveform. The adiabatic RF waveform is truncated to produce the adiabatic RF pulse, wherein k>0.03?/(?5??p)/(N+1) and k<kmax, where kmax is a value at which the adiabatic RF pulse is truncated at 25% of a maximum RF amplitude.Type: GrantFiled: June 22, 2009Date of Patent: June 25, 2013Assignee: The Board of Trustees of the Leland Stanford Junior UniversityInventors: Priti Balchandani, John M. Pauly, Daniel M. Spielman

Publication number: 20130159368Abstract: Described embodiments provide an apparatus for calculating an Npoint discrete Fourier transform of an input signal having multiple sample values. The apparatus includes at least one input configured to receive the sample values and a counter to count sample periods. Also included are at least two parallel multipliers to multiply each sample value, with each of the multipliers having a corresponding multiplication factor. There is at least one multiplexer to select one of the at least two parallel multipliers. An adder sums the scaled sample values and an accumulator accumulates the summed sample values. N is an integer and the at least two parallel multipliers are selectable based upon the value of N and the value of the sample period count.Type: ApplicationFiled: February 15, 2013Publication date: June 20, 2013Applicant: LSI CORPORATIONInventor: LSI CORPORATION

Patent number: 8386552Abstract: In a data processing system, having a twiddle factor unit, a method for performing a mixedradix discrete Fourier transform (DFT) having a block size, N, and a maximum block size, Nmax, wherein the maximum block size includes a radix that is not a power of 2 is provided. The method includes receiving a delta value at an input of the twiddle factor unit, the delta value representing a ratio of a modified maximum bock size to the block size, wherein the modified maximum block size is a power of 2. The method further includes using the delta value to obtain a step size for generating indices of a lookup table stored within the twiddle factor unit, wherein the lookup table stores real and imaginary components of twiddle factors corresponding to a set of block sizes of the DFT.Type: GrantFiled: September 17, 2008Date of Patent: February 26, 2013Assignee: Freescale Semiconductor, Inc.Inventors: Ning Chen, Jayakrishnan C. Mundarath, Pornchai Pawawongsak

Patent number: 8380331Abstract: Methods and apparatus for relative pitch tracking of multiple arbitrary sounds. A probabilistic method for pitch tracking may be implemented as or in a pitch tracking module. A constantQ transform of an input signal may be decomposed to estimate one or more kernel distributions and one or more impulse distributions. Each kernel distribution represents a spectrum of a particular source, and each impulse distribution represents a relative pitch track for a particular source. The decomposition of the constantQ transform may be performed according to shiftinvariant probabilistic latent component analysis, and may include applying an expectation maximization algorithm to estimate the kernel distributions and the impulse distributions. When decomposing, a prior, e.g. a slidingGaussian Dirichlet prior or an entropic prior, and/or a temporal continuity constraint may be imposed on each impulse distribution.Type: GrantFiled: October 30, 2008Date of Patent: February 19, 2013Assignee: Adobe Systems IncorporatedInventors: Paris Smaragdis, Gautham J. Mysore

Patent number: 8375075Abstract: Provided are a highspeed Discrete Fourier Transform (DFT) apparatus and a method thereof. The highspeed DFT apparatus includes a zero padding unit, a Fast Fourier Transform (FFT) unit, and a preamble index decision unit. The zero padding unit receives a first input signal having a length of a prime number and changes the first input signal into a second input signal having a length of an exponentiation of 2. The FFT unit performs a FFT on the second input signal outputted from the zero padding unit. The preamble index decision unit detects a preamble index from an output signal from the FFT unit.Type: GrantFiled: September 30, 2009Date of Patent: February 12, 2013Assignee: Electronics and Telecommunications Research InstituteInventors: Hyung Jin Kim, Seong Chul Cho, Dae Ho Kim, Yeong Jin Kim

Patent number: 8365104Abstract: A twodimensional transmission cross coefficient is obtained based on a function representing a light intensity distribution formed by an illumination apparatus on a pupil plane of the projection optical system and a pupil function of the projection optical system. Based on the twodimensional transmission cross coefficient and data of a pattern on an object plane of the projection optical system, an approximate aerial image is calculated by using at least one of plural components of an aerial image on an image plane of the projection optical system. Data of a pattern of an original is produced based on the approximate aerial image.Type: GrantFiled: July 10, 2007Date of Patent: January 29, 2013Assignee: Canon Kabushiki KaishaInventor: Kenji Yamazoe

Patent number: 8363540Abstract: A method for generating a transmit sequence in a single carrier frequency division multiple access (SCFDMA) transmitter is disclosed. In one embodiment, the method includes generating a first time domain sequence, transforming the first time domain sequence to a first frequency domain sequence according to a first transform, distributing the first frequency domain sequence among a subset of subcarriers among a plurality of subcarriers in a second frequency domain sequence, transforming the second frequency domain sequence to a second time domain sequence, and adding a cyclic prefix to the second time domain sequence to form a transmit sequence. In one exemplary embodiment, the first time domain sequence is a plurality of pilot symbols that have known properties e.g., a constant amplitude, and zero autocorrelation (CAZAC).Type: GrantFiled: August 15, 2011Date of Patent: January 29, 2013Assignee: Apple Inc.Inventor: James W. McCoy

Patent number: RE44105Abstract: A subscriber station for use in a wireless network capable of communicating according to a multicarrier protocol, such as OFDM or OFDMA. The subscriber station comprises a size M Fourier Transform (FFT or DFT) block for receiving input symbols and generating M FT precoded outputs and a size N inverse Fourier Transform (IFFT or IDFT) block capable of receiving N inputs, where the N inputs include the M FT precoded outputs from the size M FT block. The size N IFT block generates N outputs to be transmitted to a base station of the wireless network. The input symbols comprise user data traffic to be transmitted to the base station. The size N IFT block also receives signaling and control information on at least some of NM inputs. The FT precoding generates a timedomain signal that has a relatively lower peaktoaverage power ratio (PAPR).Type: GrantFiled: January 21, 2011Date of Patent: March 26, 2013Assignee: Samsung Electronics Co., Ltd.Inventor: Farooq Khan