Abstract: A system is described for disseminating media information. An operations center transmits at least a primary stream on a first network connection and a backup stream on a second network connection to a media device (such as a set-top box). The media device identifies whether the primary stream includes any missing information, and, if so, supplies the missing information from the backup stream. The primary stream and the backup stream can have the same or different bit rates. The operations center can send the backup stream as a component of a multiplexed stream, including at least one other stream. Through these provisions, the system provides a streaming mechanism that is both reliable and scalable.

Abstract: The present invention provides for a system comprising a DMA queue configured to receive a DMA command comprising a tag, wherein the tag belongs to one of a plurality of tag groups. A counter couples to the DMA queue and is configured to increment a tag group count of the tag group to which the tag belongs upon receipt of the DMA command by the DMA queue and to decrement the tag group count upon execution of the DMA command. A tag group count status register couples to the counter and is configured to store the tag group count for each of the plurality of tag groups. And the tag group count status register is further configured to receive a request for a tag group status and to respond to the request for the tag group status.

Abstract: When a subject of access of a transaction from an IO device is not any resource allocated to a logical partition to which the device having issued the transaction belongs, a report as an error is sent to a CPU, while the transaction is finished on the IO bus. To prevent a transaction between IO devices from gaining access to any resource in another logical partition, one access permission bit is provided for each combination of all the IO devices, and the access is permitted only when the bit has a predetermined value. A reset signal is provided by IO slot so that only an IO slot allocated to a specific logical partition can be reset without affecting any other logical partition. A transaction issued from an IO device in one logical partition is prevented from gaining access to a resource in another logical partition, while proper error handling can be performed.

Abstract: A disk control device stores write requests from a cache memory or reads commands from a host in a queue for a disk drive in chronological order. When the number of write requests stored in the queue for the disk drive is greater than a predetermined value, the storage location of write requests is changed to a queue for an extra disk drive, and the write requests are stored in the queue for the extra disk drive. When the number of write requests stored in the queue for the disk drive becomes smaller than a predetermined threshold, the write requests stored in the extra disk drive are written back to the disk drive.

Abstract: In accordance with certain aspects of the automatic protocol determination for portable devices supporting multiple protocols, a portable device detects which one of the multiple protocols is being used by the host device for subsequent communication with the portable device. This detection is based on the content of a command received from a host device. The detected protocol is then used by the portable device for subsequent communication with the host device. The host device may also send, to the portable device, a notification of which of the multiple protocols is being used by the host device.

Abstract: A display device (panel) is made recognizable by an application (11) in an electronic apparatus. This enables the application to use otherwise dummy lines (L1 . . . L22) during start up to be used to program configuration parameters (parameters like display length and width, TFT-driving parameters like pulse widths etc.).

Abstract: A method, system, and storage medium for the InfiniBand™ Poll verb to support a multi-threaded environment without the use of kernel services to provide serialization for mainline Poll logic. Poll is the verb, which allows a consumer to determine which of its work requests have completed, and provides ending status. In addition to multiple concurrent threads using Poll against a single Completion Queue, Poll is serialized with Destroy Queue Pair and Destroy Completion Queue. Completion Queues are used to maintain completion status for work requests. Queue Pairs are used to submit work requests and are related to a Completion Queue at the time they are created.

Abstract: A message tracker having a transfer monitor, a set of registers, and at least one arithmetic unit increases performance and reliability when transmitting or receiving messages within a computer system. A set of message parameters such as a current address, a remaining length, and a communicated length are stored within the set of registers. The transfer monitor observes data transfers on a multi-tenant bus in order to detect data transfers related to the message and provide an update signal. The message parameters within the registers are updated in response to the update signal. The process of detecting and updating is repeated until the entire message is transferred, and the message tracker then informs a control processor or process that communication of the message has occurred. To facilitate message coalescing, several message trackers may share a message queue that is configured to store message parameters corresponding to completed messages.

Abstract: An existing disk drive storage enclosure is converted into a standalone network storage system by removing one or more input/output (I/O) modules from the enclosure and installing in place thereof one or more server modules (“heads”), each implemented on a single circuit board. Each head contains the electronics, firmware and software along with built-in I/O connections to allow the disks in the enclosure to be used as a Network-Attached file Server (NAS) or a Storage Area Network (SAN) storage device. An end user can also remove the built-in head and replace it with a standard I/O module to convert the enclosure back into a standard disk drive storage enclosure. Two internal heads can communicate over a passive backplane in the enclosure to provide full cluster failover (CFO) capability.

Abstract: The snapshot capability moving into the SAN fabric and being provided as a snapshot service. A well-known address is utilized to receive snapshot commands. Each switch in the fabric connected to a host contains a front end or service interface to receive the snapshot command. Each switch of the fabric connected to a storage device used in the snapshot process contains a write interceptor module which cooperates with hardware in the switch to capture any write operations which would occur to the snapshot data area. The write interceptor then holds these particular write operations until the original blocks are transferred to a snapshot or separate area so that the original read data is maintained. Should a read operation occur to the snapshot device and the original data from requested location has been relocated, a snapshot server captures these commands and redirects the read operation to occur from the snapshot area.

Abstract: I/O measurement data for channels attached to logical control unit queues is obtained related to a plurality of logical control unit queues. A store secondary queue measurement data instruction specifies a range of queues for which extended secondary measurement blocks derived from the I/O measurement data are stored at a memory address specified by the store secondary queue measurement data instruction.

Abstract: A data transfer method is executed to transit a three-state transmitting circuit from a high-impedance state into a data output state, transmit a preamble (dummy data) onto a bus, and sequentially transmit the essential data. The shortening of a waveform caused in the first data piece after the transition from the high-impedance state into the data output state is executed against the preamble and no shortening of a waveform is not brought about in the essential data subsequent to the preamble. This makes it possible to exclude the limitation on speeding up the data transfer imposed by the shortening of the waveform.

Abstract: An informational-signal-processing apparatus has a plurality of functional blocks and a control block that controls operations of the functional blocks. Each of the functional blocks performs a series of items of processing. The control block or a predetermined block among the control block and the functional blocks distributes a global command. Each of the functional blocks receives the global command and operates adaptively based on the received global command. The functional blocks output a block-to-block synchronizing signal at an output timing of a processed informational signal that has been performed on the basis of the global command.

Abstract: A system and method operable to automatically disable input/output signal processing based on the required data format is provided. The need for an input/output module, such as an encoder, required to process input signal having a first data format (i.e. multimedia format) and produce an output signal having a second format (i.e. multimedia format) is determined. When the input/output module is not required to produce the output signal in the second format, the input/output module is disabled.

Abstract: An invention is disclosed for a computer software timeout algorithm that reduces the amount of list manipulation needed to satisfy system or network requirements for scheduling and cancelling timeout requests to determine whether the expiration time has been reached for execution of an input/output (I/O) request, thereby requiring action to cancel the I/O operation if it has not yet been completed.

Abstract: Methods and apparatus that allow recovery in the event that sequence counts used on receive and transmit sides of a communications link become out of sync are provided. In response to receiving a packet with an expected sequence count from a receiving device, a transmitting device may adjust pointers into a transmit buffer allowing the transmitting device to begin transmitting packets with the sequence count expected by the receiving device.

Abstract: A method and system for data redundancy, wherein method comprises storing an object in an object storage device, storing a duplicate of the object in a second object storage device, converting the object into any of a grouped object Redundant Array of Independent Disks (RAID) layout and an individual RAID layout upon growth of the object, and discarding the duplicate object. The step of converting further comprises determining which of the grouped object RAID or individual RAID layout to convert the object into based on a size of the object being converted. Moreover, the step of converting into a grouped object RAID layout further comprises selecting a group based on whether the group comprises other objects similarly sized to the object, wherein the similarly sized objects comprise variably sized objects.

Abstract: The present invention relates to a system and methodology to mitigate memory current requirements in an industrial controller and to facilitate efficient on-line editing, storage and retrieval of user programs and data. A segmented memory architecture is provided, wherein a first memory segment is loaded with programmed instructions and other data that is relatively static in nature. A second memory segment is provided for storage of dynamic information such as controller data table variables that change frequently and/or rapidly during program execution of the controller. An execution memory is concurrently loaded with the user program to facilitate high performance program execution and to enable on-line edits of the user program during operation of the controller.

Abstract: A device may include an upstream port and several downstream ports configured to transfer data at a different data transfer rate than the upstream port. The device may also include several downstream data handlers, each coupled to a respective one of the downstream ports, and an upstream data handler coupled to the upstream port. The data handlers are configured to implement a USB protocol. The upstream data handler is configured to provide data received via the upstream port to each of the downstream data handlers. Accordingly, the upstream data handler is shared between the various downstream data handlers.

Abstract: To be able to transmit a response packet to a target, which is the original request source node, even if, after issuing a request from a node to another, a bus ID/a device ID is replaced in the PCI-Express switch before said another node makes a response to the request source node in a PCI-Express communication system, which uses a PCI-Express switch. For that purpose, a unique node ID for indicating each node is set to the nodes, a channel ID is set to each channel used for data transfer, and the node ID of the transfer destination module, the channel ID of a channel used for the data transfer, and the packet type indicating that the packet is a request or a response are set in an address field of a packet of data transfer. For the data transfer, only a memory write request packet routed by address routing is used.

Abstract: A task queue manager manages the task queues corresponding to virtual devices. When a virtual device function is requested, the task queue manager determines whether an SPU is currently assigned to the virtual device task. If an SPU is already assigned, the request is queued in a task queue being read by the SPU. If an SPU has not been assigned, the task queue manager assigns one of the SPUs to the task queue. The queue manager assigns the task based upon which SPU is least busy as well as whether one of the SPUs recently performed the virtual device function. If an SPU recently performed the virtual device function, it is more likely that the code used to perform the function is still in the SPU's local memory and will not have to be retrieved from shared common memory using DMA operations.

Abstract: A lightweight messaging method and apparatus that includes creating a temporary receive data area, and if a receive operation is seen first, then creating an operational receive data area, and waiting for a corresponding send operation to fill the operational receive data area with sent data; and if the send operation is seen first, then filling the temporary receive data area with sent data, when the corresponding receive operation is seen, creating the operational receive data area, and moving the sent data from the temporary receive data area to the operational receive data area.

Abstract: A method and a device for displaying information pertaining to an installation part of an industrial installation on a mobile display device. Each installation part of the industrial installation has a transmitter, which transmits a signal that identifies the installation part. This transmitted signal is received by a receiver of the mobile display device and is relayed to a central analysis station, which makes available information pertaining to the installation part and transmits such information back to the mobile display device, where video signals corresponding to the information sent back are displayed on a display. Preferably, all the aforementioned processes take place automatically as soon as the mobile display device is brought into the vicinity of the installation part.

Abstract: A gateway between client manager applications and an enterprise manager may be provided to manage various networked objects. In one embodiment, CORBA-based TMN manager applications may be communicatively coupled to a CORBA Object Request Broker (ORB) and may be operable to send Interface Definition Language (IDL) requests to, and receive IDL responses and CORBA events from, managed objects through the CORBA ORB. The client manager may first be authenticated to the gateway by username and password, or other validation information associated with the client manager, which may be represented in a user profile. Once the initial client authentication is accomplished, the gateway may provide object-level access control between manager applications and managed objects at an individual object level so that one of the managers is granted access to one of the managed objects while being prevented from interfacing with a different one of the managed objects.

Abstract: A data-processing/interface method and apparatus in a mobile terminal that is connected to an external audio visual (AV) device using a standard interface, such as Universal Serial Bus (USB). The method includes determining whether an external AV device is connected according to a predetermined interface standard in an external device connection mode, decoding a multimedia file stored in a storage medium and transmitting the decoded multimedia signal to the external AV device according to the predetermined interface standard, and in an external device non-connection mode decoding a multimedia file stored in the storage medium and performing a digital-to-analog conversion of the decoded multimedia signal.

Abstract: Provided are a method, system, and program for initializing a processor of a computer system, to enumerate a remote bus and remote devices coupled to the remote bus, as operating components of the computer system. In another embodiment, a controller stores a message containing a directive in a memory shared by a processor of a computer system and the controller which may be operated independently of the state of said processor and said operating system. The processor may read a message stored in the shared memory by the controller and process the message. In addition, the processor may store a message intended for the controller to provide, for example, status information to be forwarded to another computer system. Other embodiments are described and claimed.

Abstract: A Gigabit Media Independent Interface (RGMII), which is adapted to also implement a ten bit interface (RTBI) that is intended to be an alternative to both the IEEE 802.3z GMII and the TBI is disclosed. The interface has a reduced number of input and output pins, i.e., pin-count, that can implement the above GMII and TBI standards. More particularly, the interface reduces the number of pins required to interconnect the MAC and the PHY from a maximum of 28 pins (TBI) to 13 pins in a cost effective and technology independent manner. The RGMII maps pins to transfer data at the same data rate with control functionality with a minimum number of input and output pins, and does so by utilizing both the rising and falling edges of the clock signal and complies with existing interface specifications set forth in the IEEE standards.

Abstract: An integrated multimedia system having a multimedia processor is disposed in an integrated circuit having a first host processor system coupled to the multimedia processor and a second local processor disposed within the multimedia processor for controlling the operation of the multimedia processor. A data transfer switch is coupled to the second processor for transferring data to various modules of the processor, at least one of which is a data cache. The data transfer switch transfers data in either direction between the cache and a module within the processor. A data streamer schedules simultaneous data transfers among the various-modules disposed within the multimedia processor in accordance with corresponding channel allocations. An interface unit is coupled to the data streamer and has a plurality of input/output (I/O) device driver units. A plurality of external I/O devices are coupled to the plurality of I/O device driver units via a multiplexer.

Abstract: Techniques are provided for processing data in real-time or near real-time using a processor. The processor passes the real-time input data directly to functional units via a bypass multiplexer without storing the data in memory. The functional units process the input data and provide output data. The output data of the functional units is transmitted outside the processor without being stored in memory. Alternatively, the output data of the functional units can be stored in memory in the processor. Input data that needs to be maintained in the processor for a period of time is stored in memory.

Abstract: One embodiment of the present invention provides a system that asynchronously controls the sending of data items from a sender to a receiver. The system includes a data path between the sender and the receiver, a first control path between the sender and the receiver, and a second control path between the sender and the receiver. The first control path and the second control path alternately control the asynchronous transmission of consecutive data items on the data path between the sender and the receiver.

Abstract: In an AV-data transfer system, AV data stored in a RAID embedded in an AV server is supplied to a client personal computer connected to a network such as the Internet or an intranet by way of the network, and AV data output by the client personal computer is transmitted to the AV server through the network to be stored in the RAID. The AV server makes accesses to the RAID to write and read out data into and from the RAID. In addition to the AV server, the AV-data transfer system also includes another personal computer for exchanging AV data with the client personal computer and receiving a variety of commands from the client personal computer by way of the network in accordance with an FTP (File Transfer Protocol). As a result, it is possible to fast handle access requests made by a larger number of client personal computers.

Abstract: A method and computer system for implementing, in a multithreaded environment, an almost non-blocking linked list allow a lock-free access provided that certain conditions are met. The approach involves: associating a pointer and an auxiliary data structure with each linked list, using a compare-and-swap (CAS) operation, and making a slight modification of values associated with nodes under certain conditions. The CAS operation guards against setting the pointers incorrectly during insertion and removal operations. The auxiliary data structure, also referred to as the ‘black list,’ holds a dynamic list of values, typically pointer values, associated with nodes that are in the process of being removed by a thread.

Abstract: A method and apparatus for invalidating cache lines during direct memory access (DMA) write operations are disclosed. Initially, a multi-cache line DMA request is issued by a peripheral device. The multi-cache line DMA request is snooped by a cache memory. A determination is then made as to whether or not the cache memory includes a copy of data stored in the system memory locations to which the multi-cache line DMA request are directed. In response to a determination that the cache memory includes a copy of data stored in the system memory locations to which the multi-cache line DMA request are directed, multiple cache lines within the cache memory are consecutively invalidated.

Abstract: A system on a chip for network devices. In one implementation, the system on a chip may include (integrated onto a single integrated circuit), a processor and one or more I/O devices for networking applications. For example, the I/O devices may include one or more network interface circuits for coupling to a network interface. In one embodiment, coherency may be enforced within the boundaries of the system on a chip but not enforced outside of the boundaries.

Abstract: A buffer chip having a first data interface for receiving a data item which is to be written and for sending a data item which has been read, having a conversion unit for parallelizing the received data item and for serializing the data item which is to be sent, having a second data interface for writing the parallelized data item to a memory arrangement via a memory data bus and for receiving the data item read from the memory arrangement via the memory data bus; having a write buffer storage for buffer-storing the data item which is to be written, having a control unit in order, after reception of a data item which is to be written via the first data interface in line with a write command, to interrupt the data from being written from the write buffer storage via the second data interface upon a subsequent read command.

Abstract: An improved high performance scheme is provided with a serial peripheral interface (SPI) to enable microcontroller-based products and other components and devices to achieve a higher serial transmit and receive data rate.

Abstract: The present invention provides a system and method for controlling tracing functions on a remote device. The system includes means for receiving a diagnostic signal from a host device on the remote device and means for associating the diagnostic signal with a tracing state of the remote device. In addition, the system includes means for performing a tracing function indicated by the diagnostic signal. The present invention can also be viewed as a method for controlling tracing functions on a remote device. The method operates by receiving a diagnostic signal from a host device on the remote device and associating the diagnostic signal with a tracing state of the remote device.

Abstract: Techniques are provided for implementing channel alignment for a data transmission interface in an HIP block on a programmable logic integrated circuit. The HIP block channel alignment logic can be run using a reduced number of parallel data paths, which consumes substantially less logic resources. Also, the HIP block channel alignment logic circuits can be processed at the higher HIP core clock rate in serial, decreasing lock latency time. Techniques are provided for implementing error handling for transmitted data in programmable logic circuits. The programmable logic circuits can be configured to implement error generation and error monitoring functions that are tailored for any application. Alternatively, the logic elements can be configured to perform other functions for applications that do not require error handling. The phase skew between data and clock signals on an integrated circuit are reduced by routing clock signals along with the data signals to each circuit block.

Abstract: A vehicle computer system has an audio entertainment system implemented in a logic unit and audio digital signal processor (DSP) independent from the host CPU. The audio entertainment system employs a set of ping/pong buffers and direct memory access (DMA) circuits to transfer data between different audio devices. Audio data is exchanged using a mapping overlay technique, in which the DMA circuits for two audio devices read and write to the same memory buffer. The computer system provides an audio manager API (application program interface) to enable applications running on the computer to control the various audio sources without knowing the hardware and implementation details of the underlying sound system. Different audio devices and their drivers control different functionality of the audio system, such as equalization, volume controls and surround sound decoding. The audio manager API transfers calls made by the applications to the appropriate device driver(s).

Abstract: A device and a method for reading out adaptation values of self-adapting functions from a motor vehicle control unit to an external readout unit are provided. The device consists of a motor vehicle control unit, an external readout unit, and a communication interface between the external readout unit and the motor vehicle control unit, the motor vehicle control unit including a nonvolatile memory for storing adapted parameters or parameter sets of the self-adapting functions. The motor vehicle control unit additionally includes a receiver for receiving at least one test value set transmitted by the external readout unit, a calculation unit for calculating at least one adaptation value as a function of the test value set and the adapted parameters or parameter sets, and a transmitter for transmitting the at least one calculated adaptation value to the external readout unit.

Abstract: A system and method of operation are provided for using a network interface to process incoming messages sent by a client device to a network server. The network interface includes a First-In-First-Out (FIFO) buffer for assembling the incoming messages from a serial to a parallel form and a regular-expression pattern matching circuit connected to the FIFO buffer. The regular-expression pattern matching circuit is adapted to, concurrent with the assembly of the incoming messages from a serial to a parallel form, perform HTTP message header recognition and parsing, and provide to the server parsed HTTP message headers in a compact form. The regular-expression pattern matching circuit generates client response messages automatically based on a content of the parsed HTTP message headers. The system performance and quality of service of the network server is improved.

Abstract: A processor has a central processing unit and a first interface. The central processing unit sets a communication parameter in a configuration register in the communication interface. A direct memory access controller or a data transfer controller then sets the same parameter in a register in a communication setup interface or an output port controller, which transmits the parameter to an external device with which the processor communicates through the communication interface. Alternately, the central processing unit sets the communication parameter in the communication setup interface or output port controller, and the direct memory access controller or data transfer controller sets the same parameters in the configuration register in the communication interface. Either scheme reduces the load on the central processing unit.

Abstract: A network system having a plurality of processing partitions which includes a network interface unit coupled to a plurality of processing entities is disclosed. The network interface unit includes a plurality of memory access channels. The plurality of memory access channels is virtualized. The network interface unit is shared among the plurality of processing partitions.

Abstract: A method for providing access to a network interface having a plurality of memory access channels is disclosed. The network interface provides access to a plurality of processing entities. The method includes providing a network interface software hierarchy wherein the network interface software hierarchy provides access to the network interface, and associating various memory access channels with corresponding processing entities via the network interface software hierarchy so as to provide a virtualized network interface.

Abstract: A device communicatively coupled to a host in a Serial Advanced Technology Attachment (SATA) format. The device includes a processor to control operations in the device and a serial interface to control serial communication with the host in accordance with the SATA format. The serial interface, after the transmission of a continued primitive, inserts pass-through information to the host within or outside of a frame information structure (FIS). If the host is not pass-through enabled, the host ignores the pass-through information. However, if the host is pass-through enabled, the host recognizes the pass-through information.

Abstract: A shared I/O subsystem for a plurality of computer systems. The shared I/O subsystem includes a plurality of physical I/O interfaces and a plurality of virtual I/O interfaces where each of the computer systems is communicatively coupled to one or more of the virtual I/O interfaces. The shared I/O subsystem also includes a forwarding function having a forwarding table that logically arranges the shared I/O subsystem into one or more logical LAN switches. Each of the logical LAN switches communicatively couples one or more of the virtual I/O interfaces to at least one of the physical I/O interfaces. For each of the logical LAN switches, the forwarding function receives a data packet from any one from the group of the physical I/O interfaces and the virtual I/O interfaces, and directs the data packet to at least one from the group of the physical I/O interfaces and the virtual I/O interfaces.

Abstract: A system and method operable to automatically disable input/output signal processing based on the required data format is provided. The need for an input/output module, such as an encoder, required to process input signal having a first data format (i.e. multimedia format) and produce an output signal having a second format (i.e. multimedia format) is determined. When the input/output module is not required to produce the output signal in the second format, the input/output module is disabled.

Abstract: A system and method for transmitting data packets from a memory hub to a memory controller is disclosed. The system includes an upstream reception port coupled to an upstream link. The upstream reception port receives the data packets from downstream memory hubs. The system further includes a bypass bus coupled to the upstream reception port. The bypass bus transports the data packets from the upstream reception port. The system further includes a temporary storage coupled to the upstream reception port and configured to receive the data packets from the upstream reception port. The system further includes a bypass multiplexer for selectively coupling an upstream transmission port to either one of a core logic circuit, the temporary storage, or the bypass bus.

Abstract: The snapshot capability moving into the SAN fabric and being provided as a snapshot service. A well-known address is utilized to receive snapshot commands. Each switch in the fabric connected to a host contains a front end or service interface to receive the snapshot command. Each switch of the fabric connected to a storage device used in the snapshot process contains a write interceptor module which cooperates with hardware in the switch to capture any write operations which would occur to the snapshot data area. The write interceptor then holds these particular write operations until the original blocks are transferred to a snapshot or separate area so that the original read data is maintained. Should a read operation occur to the snapshot device and the original data from requested location has been relocated, a snapshot server captures these commands and redirects the read operation to occur from the snapshot area.

Abstract: A message processing scheme capable of realizing both a portability and a unified way of handling and managing e-mails of a given user is disclosed. The collective message processing and the unified message accesses are realized by storing and managing messages from a plurality of message delivery servers in the message processing device that is unique to the user. All mails destined to the user are collected at the message processing device regardless of a current location of the user, so that the user only needs to view mails on this message processing device.