Abstract: In an environment in which plural external storage devices having different function control interfaces are intermixed, when a function of a storage device is controlled from a computer, a common interface for controlling the function of the storage device is provided. A device that provides the common interface manages an interrelationship between a storage area recognized by a host computer and a storage area provided by the storage device and associates a storage area which becomes a target of a function control instruction with the storage device that provides the storage area. A type of the storage device that provides the storage area which becomes the target of the function control instruction is identified and function control is ordered through a function control interface unique to the device.

Abstract: An integrated receiver with dual channel transport stream decoding and delivery substantially implemented on a single CMOS integrated circuit is described. For multiple channel transfers to hard disk drive storage, a multiplexed IDE host interface is provided with shared pins for data, address, and chip-select lines of the IDE interface so that multiple hard drives may be interfaced using the common pins of the integrated circuit.

Abstract: The performance of a given task is optimized by utilizing an intelligent agent having a plurality of program modules suited to perform the computer task but having varied degrees of domain knowledge. Based upon an objective criteria that may be determined for a given situation, one or more of the program modules in the intelligent agent may be selected to perform the task, thereby optimizing the performance of the computer task for a wide variety of situations.

Abstract: Provided are an optical pointing device and a data transmission method thereof. The optical pointing apparatus includes: an optical pointing sensing part for receiving an image of a subject to output digital image data and a motion value; an input signal analysis part for receiving a command from the host computer and analyzing the type of the command to output first and second operation control signals; a data input/output controller for outputting the motion value in response to the first operation control signal and outputting the digital image data in response to the second operation control signal; and a computer interface for receiving the motion value and the digital image data having different data transmission protocols to directly transmit the value and the data to the host computer.

Abstract: A mechanism is provided for locking an end device for the period of time that the device is needed, thus disabling access by any other application or process. Having the device locked, rather than the bus, allows other applications to use the bus to access other devices at the same time. This is achieved by providing a virtual bus arbitration, which arbitrates applications' use of the physical bus. The virtual bus arbitration algorithms allow bus operations from different applications to overlap on the physical bus as long as their target devices and associated bus locks are on different end devices.

Abstract: Disclosed is storage system, that is, an array-type disk apparatus which is provided with an error monitor section which monitors the status of error occurrence in a disk drive and instructs initiation of mirroring between the disk drive and a spare disk drive when the number of errors occurred of the disk drive exceeds a specified value, and a mirror section which performs mirroring between the disk drive and spare disk drive. Storage system, that is, the array-type disk apparatus may be provided with an error monitor section which monitors the status of error occurrence in a disk drive and gives such an instruction as to set the status of the disk drive in a temporary blocked state, and a data restoring section which executes data restoration by reading data from the temporary blocked disk drive when reading from another disk drive constituting a disk array group is not possible during data restoration.

Abstract: The computational load imposed by communications software executed on a general purpose processor can be significantly reduced by exploiting periods during an active connection when no data is being received. In particular, execution of many receive path signal processing algorithms can be disabled when no data is being received. The transmit path continues output modulation as with a normal connection, so as to trick a remote communications device into believing the connection is still normal. However, substantial portions of the local receive path can be disabled, thereby reducing computational load on the general purpose processor and freeing additional compute cycles for application and/or operating system program use.

Abstract: A Multi-Media Card/Secure Digital (MMC/SD) single-chip flash device contains a MMC/SD flash microcontroller and flash mass storage blocks containing flash memory arrays that are block-addressable rather than randomly-addressable. MMC/SD transactions from a host MMC/SD bus are read by a bus transceiver on the MMC/SD flash microcontroller. Various routines that execute on a CPU in the MMC/SD flash microcontroller are activated in response to commands in the MMC/SD transactions. A flash-memory controller in the MMC/SD flash microcontroller transfers data from the bus transceiver to the flash mass storage blocks for storage. Rather than boot from an internal ROM coupled to the CPU, a boot loader is transferred by DMA from the first page of the flash mass storage block to an internal RAM. The flash memory is automatically read from the first page at power-on. The CPU then executes the boot loader from the internal RAM to load the control program.

Abstract: A data management system includes a data gathering device and a host device. The data gathering device is configured to gather data regarding a target object and to transmit the data to the host device. The host device operates on the data to produce an output and transmits the output back to the data gathering device. Subsequent action, including the gathering of further data, may be taken on the target object in response to and upon receipt of the output. The data gathering device and host device may communicate via wire or wirelessly. The host device may also exchange information with a network.

Abstract: An apparatus and an associated method of operation is provided for performing device communication in accordance with a standard protocol, while enabling deviation from the device communication without termination or corruption of the device communication. The apparatus incorporates a pair of state machines configured to provide standard protocol communication with interrupt capability. A first state machine functions to perform the communication process in accordance with the standard protocol. The first state machine is also configured to deviate from the communication process in order to perform another requested task. A second state machine functions to monitor the communication process being performed by the first state machine. Upon completion of the other requested task by the first state machine, a state of the communication process is provided by the second state machine to enable the communication process to be continued by the first state machine.

Abstract: A descriptor queue composed of descriptors containing input address information that represents an address for storing data to be processed and output address information that represents an address for storing processed data is constructed and stored in a memory. A stream processor for performing a plurality of processes parallel to each other on the data to be processed acquires a descriptor from the memory, reads data to be processed from the memory according to the input address information contained in the descriptor, processes the data, and stores the processed data back into the memory according to the output address information contained in the descriptor.

Abstract: A system with a first random access memory (RAM), a second RAM, a first processor coupled to the first RAM and a second processor coupled to the second RAM. The first RAM is configured to store input/output (I/O) completions from at least two engines. The second RAM is also configured to store I/O completions from at least two engines. When all engines are active, the system writes I/O completions from the engines to the first and second RAMs. The first processor processes I/O completions stored in the first RAM. The second processor processes I/O completions stored in the second RAM.

Abstract: The present invention provides a system and a method for filtering a plurality of frames sent between devices coupled to a fabric by Fiber Channel connections. Frames are reviewed against a set of individual frame filters. Each frame filter is associated with an action, and actions selected by filter matches are prioritized. Groups of devices are “zoned” together and frame filtering ensures that restrictions placed upon communications between devices within the same zone are enforced. Zone group filtering is also used to prevent devices not within the same zone from communicating. Zoning may also be used to create LUN-level and extent-level zones, protocol zones, and access control zones. In addition, individual frame filters may be created that reference selected portions of frame header or frame payload fields.

Abstract: The present invention discloses a method, apparatus and program storage device for providing non-blocking, minimum threaded two-way messaging. A Performance Monitor Daemon provides one non-blocked thread pair per processor to support a large number of connections. The thread pair includes an outbound thread for outbound communication and an inbound thread for inbound communication. The outbound thread and the inbound thread operate asynchronously.

Abstract: It is an object of this invention to expand an SBP-3 protocol such that two data buffers can be independently controlled. To achieve this object, a target sends responses to status blocks corresponding to two commands included in one ORB in the SBP-3, and an initiator receives these responses to the commands independently of each other. The number of times of execution and time interval are designated for each command. The target repeats a command the designated number of times at the designated time interval.

Abstract: A clustered storage array consists of several nodes coupled to one or more storage systems. The nodes provide a LUN-device for access by a client, the LUN-device mapping to a source logical unit corresponding to areas of storage on the one or more storage systems. A target logical unit corresponds to different areas of storage on the one or more storage systems. The source logical unit is migrated in parallel by the several nodes to the target logical unit.

Abstract: A method for processing network traffic data includes receiving network traffic data, and passing the network traffic data to one of a plurality of worker modules for processing the network traffic data, wherein the step of passing is performed based at least in part on a quantity of the worker modules, and/or a number associated with a first IP address. A system for processing network traffic data includes a first IO module, a second IO module, a first worker module coupled to the first and second IO modules, a second worker module coupled to the first and second IO modules, and a switch module coupled to the first IO module, the second IO module, the first worker module, and the second worker module.

Abstract: Decimation of data from a fixed length queue retaining a representative sample of the old data. Exponential decimation removes every nth sample. Dithered exponential decimation offsets the exponential decimation approach by a probabilistic amount. Recursive decimation selects a portion of the queue and removes elements.

Abstract: An information terminal disclosed herein includes a data storage in which data is stored; an internal controller which accesses the data storage by a request from inside the information terminal; and an external controller which accesses the data storage by a request from outside the information terminal. If a request that the internal controller access the data storage is generated while the external controller is accessing the data storage, then the external controller repeatedly transmits a negative reply that data has not been properly received in response to access from the outside and the internal controller accesses the data storage while the external controller repeatedly transmits the negative reply.

Abstract: The invention relates to a method for processing consistent data sets by asynchronous application of a subscriber in an isochronous, cyclical communication system. According to the invention, by connecting a communication memory and a consistency, transmission and reception buffer, copying processes leading ti delay can be kept to a minimum.

Abstract: A system for servicing packet data transactions and input/output transactions includes an input port, an output port, a node controller, a packet manager, and a switching module. The input port is receives communications from a communicatively coupled processing device that include packet data transactions and input/output transactions. The output port transmits communications to a communicatively coupled processing device that include packet data transactions and input/output transactions. The node controller communicatively couples to a system bus of the processing device and services input/output transactions. The packet manager communicatively couples to the system bus of the processing device and services packet data transactions. A switching module communicatively couples to the input port, the output port, the node controller, and the packet manager and services the exchange of transaction cells among the input port, the output port, the node controller, and the packet manager.

Abstract: A reordering priority to grant higher priority for a request over a response when a predetermined condition is detected for live-lock prevention is discussed. Specifically. A a circuit and flowchart for preventing a live lock situation is discussed without a need for a bus converter. In one example, a detection of a PRETRY response in a response queue is analyzed.

Abstract: Methods and systems consistent with this invention comprise a control circuit for reading data from a memory comprising a plurality of data channels. Such control circuits comprise at least one multiplexer, wherein the at least one multiplexer is configured to route a data strobe signal to a first number of the plurality of data channels for reading the data from the memory when the at least one multiplexer is in a first selected state, and wherein the at least one multiplexer is configured to route the data strobe signal to a second number of the plurality of data channels, wherein the second number is greater than the first number, for reading the data from the memory when the at least one multiplexer is in a second selected state. Such methods and systems may also comprise a clock for generating a data strobe signal, and a flip-flop for latching the data from the memory into the control circuit with the data strobe signal, wherein the data strobe signal does not leave the control circuit.

Abstract: The present invention provides a method and apparatus for data processing and virtualization. The method and apparatus are configured to receive communications, separate a command communication from a data communication, parallel process the command communication and the data communication, generate at least one virtual command based on the command communication, and generate virtual data according to the at least one virtual command. The apparatus can comprise a parallel virtualization subsystem configured to separate data communications from command communications and to parallel process the command communications and the data communications, to generate virtual commands and to generate virtual data according to a virtual command, and a physical volume driver coupled with the parallel virtualization subsystem, wherein the physical volume driver receives the virtual data and configures the virtual data.

Abstract: A disclosed information processing apparatus is equipped with a built-in display unit and a built-in input unit. A display signal supplied from an external information processing apparatus connected to the information processing apparatus is combined with a display signal supplied from a core processing unit in a part of a screen of the display unit displaying the signal supplied from the core processing unit. An input signal received from the input unit is output only to the external information processing apparatus or only to the information processing apparatus depending on whether the part is determined as being activated or inactivated.

Abstract: A method and system for data redundancy, wherein method comprises storing an object in an object storage device, storing a duplicate of the object in a second object storage device, converting the object into any of a grouped object Redundant Array of Independent Disks (RAID) layout and an individual RAID layout upon growth of the object, and discarding the duplicate object. The step of converting further comprises determining which of the grouped object RAID or individual RAID layout to convert the object into based on a size of the object being converted. Moreover, the step of converting into a grouped object RAID layout further comprises selecting a group based on whether the group comprises other objects similarly sized to the object, wherein the similarly sized objects comprise variably sized objects.

Abstract: In one aspect, a method to store data includes transferring a configuration file including a state machine and data to a programmable logic device (PLD). Transferring the configuration file includes programming the state machine based on the state machine configuration and transferring the data from the PLD to a memory connected to the PLD using the state machine.

Abstract: Remotely obtaining exclusive control of a device by remotely establishing communication with the device over a network, requesting to obtain remote exclusive control of the device's capabilities, and determining whether remote exclusive control of the device's capabilities can be obtained based on whether or not another user already has exclusive control of the device's capabilities. In a first case where it is determined that remote exclusive control can be obtained, authenticating a user requesting to obtain remote exclusive control of the device's capabilities, providing the user remote exclusive control of the device's capabilities after the user has been authenticated, and temporarily deferring requests by users other than the user who has obtained remote exclusive control to perform operations utilizing the device's capabilities during a period in which the user maintains remote exclusive control of the device's capabilities.

Abstract: A storage management device includes a plurality of I/O processing modules for accessing units of storage by specifying an address and a time. The I/O processing modules receive I/O requests, classify I/O requests, and extract I/O control information associated with the I/O requests. The extracted I/O control information is processed and at least one physical store is communicated with in response to the processed I/O control information.

Abstract: An integrated multimedia system has a multimedia processor disposed in an integrated circuit. A processor is disposed within the multimedia processor which controls the operation of the multimedia processor. A data transfer switch is disposed within the multimedia processor and coupled to the processor which transfers data to various modules of the multimedia processor. A fixed function unit is disposed within the multimedia processor, coupled to the processor and the data transfer switch. A data streamer is coupled to the data transfer switch, and configured to schedule simultaneous data transfers among a plurality of modules disposed within the multimedia processor in accordance with the corresponding channel allocations. As interface unit is coupled to the data streamer and has a plurality of I/O device driver units. A multiplexer coupled to the interface unit provides access between a selected number of I/O device driver units and external I/O devices via output pins.

Abstract: An automated method of establishing a filesystem utilizing the establishment of a first filesystem that interfaces with devices by loading software, including a first set of drivers, into memory and initializing the first set of drivers with the devices. The first filesystem is then mounted on a root directory that comprises a single storage device. The method allows input/output functionality within the first filesystem and, while input/output functionality is available to the first filesystem, the method accesses the single storage device to obtain software, including a second set of drivers. The method loads the software into the memory and initializes the second set of drivers with the devices to establish a second filesystem. The second filesystem is mounted on a root directory comprising the single storage device and another storage device and the first filesystem is then rendered inactive.

Abstract: A data transfer device is disclosed for writing data to and reading data from a disk drive system through a plurality of ports of the data transfer device. The data transfer device includes a first buffer for serially receiving, from a host system, control portions of data read requests and data write transfers; a second buffer for serially receiving, from the host system, data portions of data write transfers received by the first buffer; and N temporary storage devices, wherein N is a positive integer, coupled to the first buffer and the second buffer, the N temporary storage devices for parallelly receiving and temporarily storing consecutive control portions of the data read transfers and data write transfers from the first buffer. Up to N of the data read transfers and data write transfers are transferred to the disk drive system through the plurality of ports simultaneously.

Abstract: Systems, devices, and methods for a double data rate memory device includes a storage element, a first pipeline, and a second pipeline. The pipelines are connected to the storage unit to pass or output data on rising and falling edges of an external clock signal. The device permits data transferring at dual data rates. Another memory device includes a storage element and a plurality of pipelines for transferring data. The plurality of pipelines each pass data on different events.

Abstract: A PRECOPY command identifies source and destination devices. Data begins to transfer from the source device to the destination device in a background mode under the control of a copy program that transfers the data on a track-by-track basis. Changes to the data tracks are monitored in three lists. The copy program monitors the first two lists to determine when a data track in a source device has been written and needs to be retransferred to the destination device to provide the most up to date data. Procedures assure that any data access to a particular track in either the source by any application prior to the activation of a formal transfer are accommodated to maintain data integrity. An ACTIVATE command makes the destination device available to another application and activates another copy operation. Procedures assure that any data access to a particular track in either of the source or destination devices by any application prior to the transfer of that track are accommodated to maintain data integrity.

Abstract: The present invention is a system and method for forwarding packets in order. A first packet may be received for forwarding. Subsequently, a second packet may be received for forwarding. A first memory request corresponding to the first packet is sent. A second memory request corresponding to the second packet may be sent prior to receiving a first memory reply corresponding to the first memory request. The first packet is forwarded prior to forwarding the second packet. In this novel manner, bandwidth in a network apparatus may be utilized with greater efficiency while maintaining packet ordering.

Abstract: Methods and apparatuses for archiving data processed by digital sender and other like devices are provided. By way of example, a removable data storage media device can be added to a digital sender device. Then the digital sender device will be able to optically scan an object to form corresponding scanned object data, provide recipient address data, generate an outgoing message data using the recipient address data, output the message data, and also store the message data using the removable data storage device.

Abstract: An RF tag 25 is incorporated in a mouse 20, and an RF tag reader 15 is mounted on the main body side of a computer 10. When using the mouse 20 to a specified computer 10, a user moves the mouse close to the reader 15 to read identification information (ID) of the mouse 20, which is included in the RF tag 25. On the main body side of the computer 10, the mouse 20 is designated in accordance with the read ID and communication with the mouse 20 is set. There may be a case where a plurality of computers and peripheral equipment intermingle, but, by making joint use of the ID reader 15 in a short-range, a corresponding relationship between the main body of the computer 10 and the wireless equipment 20 is made clear.

Abstract: Image data scanned by way of a scanner controller is transferred from a memory controller to a memory by way of a G bus. A CPU reduces the image data stored in the memory by thinning processing or the like, and displays the image data on an operation panel by way of a B bus and interface. In this manner, an image can be input using the first bus while data transferred by way of the first bus is output by way of the second bus. This enables processing using image data which is being input, such as processing of immediately displaying an input image.

Abstract: A memory 1 performs its internal operation in response to access requests (200, 201 and 202) of a CPU 2 in synchronism with the oscillated output of a self-excited oscillator 102 incorporated therein and according to said access requests, and outputs a response request 103 for said access requests to said CPU in synchronism with its internal operation. The CPU performs the access requests for the memory, and fetches data from the outside or outputs the data to the outside in response to and in synchronism with the response request 103 from the accessed memory and according to the kinds of said access requests.

Abstract: The present invention provides for asynchronous DMA command completion notification in a computer system. A command tag, associated with a plurality DMA command is generated. A DMA data movement command having the command tag is grouped with another DMA data movement command having the command tag. DMA commands belonging to the same tag group are monitored to see whether all DMA commands of the same tag group are completed.

Abstract: Method and apparatus for playing analog audio in an electronic audio system having multiple audio codecs, only one of which has a direct hardware connection to the analog audio source. First analog audio data is received from the analog audio source at a first audio codec, and converted to digital audio data using the first audio codec. The digital audio data is stored in a memory, and read back from the memory, transferred to a second audio codec. The digital audio data is then converted to second analog audio data using the second audio codec, and output from the second audio codec. An audio controller may be used to store the digital audio data in a loopback buffer within the memory, read the digital audio data from the loopback buffer, and may further be programmed to operate in a prepare loopback state, a loopback running state, and a recording state.

Abstract: Various embodiments of a method and apparatus for implementing multiple transaction translators that share a single memory in a serial hub are disclosed. For example, in one embodiment, a USB (Universal Serial Bus) hub may include a shared memory device, at least one faster data handler coupled to transfer data between the shared memory device and a faster port, and several slower handlers each coupled to transfer data between the shared memory device and a respective one of several slower ports.

Abstract: A data processing apparatus comprises a master device 150, 160, 170, 180, a slave device 110, 120, 130 and a communication bus 140 via which transaction requests are passed from master to slave. A transaction annotator of the master device generates transaction identifiers having a master identifier portion and a priority request portion. The slave device determines an order of servicing of transaction requests in dependence upon transaction ordering requests at least partially derived from the master identifier portions and in dependence upon priority values specified in the priority request portions.

Abstract: I/O measurement data associated with the performance of an I/O operation process is gathered during the I/O process. The I/O measurement data is saved in an IRB memory location specified by a test subchannel instruction. An I/O interrupt signals the completion of the I/O operation process.

Abstract: One embodiment of the present invention provides an object-addressed memory hierarchy that is able to access objects stored outside of main memory. During operation, the system receives a request to access an object, wherein the request includes an object identifier for the object that is used to reference the object within the object-addressed memory hierarchy. Next, the system uses the object identifier to retrieve an object table entry associated with the object. The system then examines a valid bit within the object table entry. If the valid bit indicates the object is located in main memory, the system uses a physical address in the object table entry to access the object in main memory. On the other hand, if the valid bit indicates that the object is not located in main memory, the system relocates the object into memory from a location outside of memory, and then accesses the object in main memory.

Abstract: A network switch architected using multiple processor engines includes a method and system for ensuring temporal consistency of data and resources as packet traffic flows through the switch. Upon receiving a connection request, the switch internally associates a semaphore with the connection. The semaphore is distributed and stored at the processing engines. Each of the processing engines performs specific operations relating to incoming packets associated with the connection. Internal messages are passed between the processing engines to coordinate and control these operations. Some of these messages can include a semaphore value. Upon receiving such a message, a processing engine compares the semaphore value to a stored semaphore. Packets relating to the connection identified by the message are processed if there is a match between the semaphores. Also, the semaphore value can be moved from one processing engine to another in order to control the allocation and de-allocation of resources.

Abstract: Memory apparatus and methods accumulate data between a data path and a memory device. A memory agent may have a data accumulator between a redrive circuit and a memory device or interface. The data accumulator may accumulate data to or from the redrive circuit. Other embodiments are described and claimed.

Abstract: A dual serial port data acquisition interface assembly including a printed circuit board for supporting additional components of the dual serial port assembly, a personal computer peripheral component interconnect connector secured to the printed circuit board for passing data between the printed circuit board and a personal computer. A first serial port connector mounted on the printed circuit transferring communication data and synchronization data between the personal computer and the data storage device through a programmed universal asynchronous receiver/transmitter microchip, and a second serial port connector mounted on the printed circuit board passing a performance data of the servo control circuit from the data storage device through a serial-to-parallel converter to the personal computer.

Abstract: The snapshot capability moving into the SAN fabric and being provided as a snapshot service. A well-known address is utilized to receive snapshot commands. Each switch in the fabric connected to a host contains a front end or service interface to receive the snapshot command. Each switch of the fabric connected to a storage device used in the snapshot process contains a write interceptor module which cooperates with hardware in the switch to capture any write operations which would occur to the snapshot data area. The write interceptor then holds these particular write operations until the original blocks are transferred to a snapshot or separate area so that the original read data is maintained. Should a read operation occur to the snapshot device and the original data from requested location has been relocated, a snapshot server captures these commands and redirects the read operation to occur from the snapshot area.

Abstract: A parallel processing system includes a plurality of stages operatively coupled in parallel and operating simultaneously. Each stage including a process unit generating a predetermined function and a buffer coupled via a slow output and a slow input ports to the process unit. The buffer also includes a fast input port and a fast output port. A controller drives the buffer to operate in a Slow Read Phase when data is written from the buffer into the process unit, a Slow Write Phase when data is written into the buffer from the process unit, a Fast Write Phase when data is written at a fast rate into the buffer and a Fast Read Phase when data is read from the buffer.