Abstract: In a dynamic mode, firmware sets a threshold of errors that may occur within a predetermined period of time. If the threshold is exceeded, the firmware queries the front-side bus performance counters to determine whether the front-side bus is operating at its maximum data rate. If the front-side bus is not running at the maximum data rate, then the firmware bumps the data rate settings for the endpoint that exceeds the threshold by one step. If the front-side bus is running at its maximum data rate, then the firmware queries all the endpoints to determine which endpoints are active. The firmware then determines whether there are any active endpoints that are lower priority than the complaining endpoint. The mechanism drops the lower priority endpoints by one step and raises the complaining endpoint by one step.

Abstract: A fault-tolerant computer is capable of performing a data flow control process in a short period of time. The fault-tolerant computer includes a pair of duplicate systems each having a CPU subsystem and an IO subsystem. The IO subsystems of the duplicate systems are connected to each other through a cross link. The CPU system has an inbound reception buffer which receives data sent from the IO subsystem, and when the amount of the received data reaches a first threshold value, sends a first signal to the IO subsystem, and when the amount of the received data reaches a second threshold value greater than the first threshold value, sends a second signal to the IO subsystem. The IO subsystem has an IO I/F controller to stop sending data to the CPU subsystem when the IO I/F controller receives the first signal and the second signal, and a flow controller to send the second signal to the IO I/F controller of the paired IO subsystem through the cross link after the flow controller receives the second signal.

Abstract: A method for preventing oversubscription to a file storage by multiple processes, whether such processes are operating on one node with directly attached storage or on several nodes of a computing cluster sharing a storage area network. Processes or nodes issue requests for bandwidth reservations to a controller daemon. The controller daemon maintains records of all existing bandwidth reservations and ensures that new reservations are granted only if a qualified bandwidth of the file storage will not be exceeded. The qualified bandwidth is empirically determined to take into account installation specific hardware configurations, workloads, and quality of service requirements.

Abstract: Techniques are disclosed to provide I/O handling in generic USB drivers. More particularly, a generic USB device driver architecture is described which enables development through a user-mode USB library that accesses a generic kernel-mode driver. The architecture may be utilized to provide efficient development for I/O handling. In a described implementation, a method includes defining a data structure utilized to access a plugged-in device. A pipe policy of the data structure is defined and utilizing to access the plugged-in device through a plurality of routines provided by a generic user-mode library (e.g., a dynamic link library (DLL)). The generic user-mode library is communicatively coupled to a kernel-mode generic device driver. In another described implementation, a separate generic device driver is loaded for each plugged-in device or for each functionality supported by the device.

Abstract: A communications bus for a digital device includes a credit-based flow control mechanism, in which a sending component maintains a local record of its credits. Credits are returned to the sender by pulsing a single-bit credit return line. A separate mechanism provides a count of available credits from the receiver, the separate mechanism not necessarily being current. The local record is compared to the count of credits from the separate mechanism over a pre-determined time interval, failure of the two values to agree at any time during the interval indicating a probable credit discrepancy. A credit discrepancy is confirmed, preferably by suspending certain bus activity for a sufficiently long period to account for any delay in propagating credit value changes, and re-comparing the values. Preferably, the bus communicates between internal components of an integrated circuit chip.

Abstract: A technique is disclosed for managing in-order-delivery of data traffic in a storage area network which includes at least one host device adapted to communicate with at least one storage device via a fiber channel fabric. When a change in at least one route in the fiber channel fabric is detected, a first zone, flow and/or device in the network which is affected by the route change is identified, and frames associated with the first zone/flow/device are temporarily dropped for a temporary time period T. In one embodiment, the first zone/flow/device includes at least one device which is sensitive to the order in which data traffic is received. According to a specific implementation, a second zone/flow/device in the network which is affected by the route change, and which is not sensitive to the order in which data traffic is received may also be identified, and frames associated with the second zone/flow/device forwarded to their destination address during the temporary time period T.

Abstract: A variable size first in first out (FIFO) memory is disclosed. The variable size FIFO memory may include head and tail FIFO memories operating at a very high data rate and an off chip buffer memory. The off chip buffer memory may be, for example, of a dynamic RAM type. The off chip buffer memory may temporarily store data packets when both head and tail FIFO memories are full. Data blocks of each of the memories may be the same size for efficient transfer of data. After a sudden data burst which causes memory overflow ceases, the head and tail FIFO memories return to their initial functions with the head FIFO memory directly receiving high speed data and transmitting it to various switching element and the tail FIFO memory storing temporary overflows of data from the head FIFO memory.

Abstract: A method and apparatus for improving the performance of Universal Serial Bus mass storage devices is provided wherein a local extender located adjacent to a host computer is used in combination with a remote extender located adjacent to a peripheral device. The local extender and remote extender units jointly implement a protocol that enables bulk data to be transferred efficiently between the units even when the transmission delay between the units exceeds 1 microsecond. No alterations to the host computer or the USB mass storage device are required to achieve the improved performance. An improved method for connecting USB mass storage devices to a host controller is provided.

Abstract: A method and system for directing data transfers between applications residing on different computers or devices using a simplified flow control protocol. The protocol eliminates the need for and use of flow control modes and supports all possible data transfer mechanisms. The protocol also allows source and sink applications to independently set their own local memory threshold over which data transfers are made using remote direct memory access (RDMA) or zero-copy transfers. Through adjusting its threshold value or size, a sink or receiving application or component adapts its behavior to the behavior of a sending or source application or component.

Abstract: Disclosed are a method, upstream processing node, and computer readable medium for dynamically stabilizing a stream processing system. The method includes receiving at least one computing resource allocation target. The method further includes determining that an input data flow rate of at least one upstream processing element varies. The computing resource is dynamically allocated to the upstream processing element in response to the input rate of the upstream processing element varying. Data flow is dynamically controlled between the upstream processing element and at least one downstream processing element.

Abstract: A data processing system and a method for synchronizing data traffic including a conversion unit which converts first data into second data. The first data is controlled by a first scheme for reservation of resources and the second data being controlled by a second scheme for reservation of resources. The conversion unit may be referred to as a network-level bridge (NWB) . For example, the different schemes for reservation of resources may be based on slot tables, in which case, the conversion unit converts the slot assignments for the first data into the slot assignments for the second data.

Abstract: A CD on which only music information specified by the CD-DA is recorded, or a CD on which both music information specified by the CD-DA and music information to be recorded on a CD-ROM are recorded is mounted upon an information processing terminal. When the CD on which only music information specified by the CD-DA is recorded is mounted, the information processing terminal acquires, from a directory server, an ISRC number that identifies the music information recorded on the CD, and distribution server location information that identifies a content distribution server. The information processing terminal acquires content that is the music information compressed according to the MP3 and encrypted, from the content distribution server identified by the acquired distribution server location information, and the decryption key. The information processing terminal then decrypts the acquired content using the acquired decryption key and reproduces music.

Abstract: Disclosed are a method, upstream processing node, and computer readable medium for dynamically stabilizing a stream processing system. The method includes receiving at least one computing resource allocation target. The method further includes determining that an input data flow rate of at least one upstream processing element varies. The computing resource is dynamically allocated to the upstream processing element in response to the input rate of the upstream processing element varying. Data flow is dynamically controlled between the upstream processing element and at least one downstream processing element.

Abstract: A throttling process for throttling communications between software processes, where data streams are sent between a source and one or more destinations. The method first determines if any of the destinations are busy. If one or more of the destinations are busy, the process performs a throttling action before sending the data stream to the busy destinations.

Abstract: An image forming apparatus which is capable of bringing processing devices, such as sheet feed devices and post-processing devices connected respectively to the image forming apparatus, into operable states in timing optimal for carrying out an image forming job, thereby improving productivity and operation rate of the image forming apparatus as well as saving energy. A print job is analyzed to determine at least one sheet feed device and at least one post-processing device to be used in executing the print job, and states of the determined devices are checked to determine at least one of the sheet feed device and the post-processing device to be caused to start a preparatory operation in advance before the print job is executed. Power supply to the at least one of the sheet feed device and the post-processing device is turned on in timing such that the preparatory operation is completed in time for the start of execution of the print job.

Abstract: A method for expanding input/output in an embedded system is described in which no additional strobes or enable lines are necessary from the host controller. By controlling the transitions of the signal levels in a specific way when controlling two existing data or select lines, an expansion input and/or output device can generate a strobe and/or enable signal internally. This internal strobe and/or enable signal is then used to store output data or enable input data. The host controller typically utilizes software or firmware to control the data transitions, but no additional wires are needed, and no changes are needed to existing peripheral devices. Thus, an existing system can be expanded when there are no additional control lines available and no unused states in existing signals.

Abstract: In a system in which individual memory banks may be under individual power control, a subsequent need for a memory bank that is currently in a low power state may be anticipated, so that the memory bank may be powered up in advance of when it is needed, to reduce or eliminate delays caused by waiting for the memory bank to power up and become operational. The anticipation may be based on accessing a predetermined location in another memory bank.

Abstract: A method may include distributing ranges of addresses in a memory among a first set of functions in a first pipeline. The first set of the functions in the first pipeline may operate on data using the ranges of addresses. Different ranges of addresses in the memory may be redistributed among a second set of functions in a second pipeline without waiting for the first set of functions to be flushed of data.

Abstract: An electronic device includes: a data transfer unit that transfers data between a first recording medium and a second recording medium; an indication unit that indicates a communication protocol and a data transfer rate to be used in data transfer to the transfer unit; a judgment unit that judges whether or not the data transfer is successful; a control unit that controls the indication unit to indicate a communication protocol and a data transfer rate to be used in data transfer, after the judgment whether or not the data transfer is successful, based on the communication protocol used in the data transfer, the data transfer rate used in the data transfer, and the judgment whether or not the data transfer is successful.

Abstract: A method and system for configurable drain for two-way handshake system is provided and may comprise coupling a transmitting device to a drain bucket, and draining unwanted data at the transmitting device. The drain bucket may be configurably coupled to the transmitting device via a switch, where the switch may be a crossbar switch. The drain bucket may receive at least one transmitter handshake signal from at least one transmitting device. The drain bucket may transmit at least one receiver handshake signal to the at least one transmitting device. The receiver handshake signal may be asserted at least as long as the received transmitter handshake signal is asserted. The receiver handshake signal may be based on the received transmitter handshake signal. For example, the received transmitter handshake signal may be looped back by the receiver as the receiver handshake signal.

Abstract: System and method of a pace engine for governing the different transmission rates tailored for different connections by rate pacing a plurality of queues are described. Roughly described, the pace engine includes a binning controller for receiving queues from a transmit DMA queue manager and determines the earliest allowed time for a particular queue that is stored and paced in a Work Bin, a Fast Bin, or a Slow Bin. A pace table stores information about the minimum inter-packet-gap for each connection that is coupled to the transmit DMA queue manager. A timer is coupled to the binning controller with a multi-bit continuous counter that increments at a predetermined time unit and wraps around after a predetermined amount of time.

Abstract: In the transfer of AV data flows, especially in a network environment, a delayed transition from one operating mode to the other operating mode will be possible when changing the operating mode from e.g. normal replay to fast forward search. This is due to the fact that—in the transfer from data source to data sink different buffer memory stages must be passed before the transferred data finally come to decoding. When the request for changing the operating mode comes, the data already present in the buffer memories must first be processed before the actually requested new data come to be decoded. For the solution of the problem described, it is suggested according to the invention that—after the request of changing the operating mode—the undesirable data in the buffer memories are quickly eliminated through suitable measures so that the desired data can then be decoded faster. To do that, an identifier for the new operating mode is inserted in the data flow on the part of the data source device.

Abstract: There is disclosed a bus optimization technique. Pursuant to the bus optimization technique, the output buffer and output logic are removed from port units of a switch and are included with a control matrix in the switch. Data units received in a first port unit of a plurality of port units are provided to a control matrix. The control matrix evaluates when to send the data unit to a second port unit. No output decisions are made in the second port unit.

Abstract: A method for preventing oversubscription to a file storage by multiple processes, whether such processes are operating on one node with directly attached storage or on several nodes of a computing cluster sharing a storage area network. Processes or nodes issue requests for bandwidth reservations to a controller daemon. The controller daemon maintains records of all existing bandwidth reservations and ensures that new reservations are granted only if a qualified bandwidth of the file storage will not be exceeded. The qualified bandwidth is empirically determined to take into account installation specific hardware configurations, workloads, and quality of service requirements.

Abstract: Methods and systems are provided for predicting an event's occurrence and notifying one or more interested applications that an event has been predicted to have occurred. The events are associated with media content samples that are to be rendered on a computing device. Multiple filters are provided and define a filter graph. The filter graph is configured to process multiple media content samples and includes one or more render filters that render the media content samples. An event prediction module, associated with the filter graph, receives event notification requests from an application and predicts rendition times associated with the individual events. Event notifications are sent to the application in accordance with the predictions that are made. The event prediction module can be located upstream of the render filters and can include part of one of the filters in the filter graph such as a source filter.

Abstract: Provided are a system and an article of manufacture, wherein a primary storage control unit receives an information unit from a remote host over a fibre channel connection. The primary storage control unit adjusts an information unit pacing parameter included in a response sent from the primary storage control unit to the remote host, wherein the information unit pacing parameter indicates the number of information units that the remote host is allowed to send to the primary storage control unit without waiting for any additional response from the primary storage control unit.

Abstract: A data processing apparatus stops a supply of data to a buffer when the buffer becomes full, and thereafter performs processing such as moving to a low-power mode and switching execution tasks. The data processing apparatus then reverts from the low-power mode and resumes execution of a task for supplying data to the buffer when a predetermined reversion condition is satisfied. The predetermined reversion condition is that, for example, processing with respect to data in a predetermined data cluster is completed, a predetermined time period has elapsed, or a cycle handler notifies an event occurrence.

Abstract: A system, method, and computer readable medium for reducing message flow on a message bus are disclosed. The method includes determining if at least one logical operator in a plurality of logical operators requires processing on a given physical processing node in a group of physical nodes. In response to determining that the logical operator requires processing on the given physical processing node, the logical operator is pinned to the given physical processing node. Each logical operator in the plurality of logical operators is assigned to an initial physical processing node in the group of physical processing nodes on a message bus.

Abstract: A computer program product, an apparatus, and a method for limiting a number of open exchanges at a channel subsystem of an I/O processing system using data from a control unit. The computer program product includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method that includes sending a command message to the control unit, and receiving a transport response information unit message in response. The method further includes extracting a maximum control unit exchange parameter from the transport response information unit message, and determining a limit value for a maximum number of open exchanges between the channel subsystem and the control unit as a function of the extracted maximum control unit exchange parameter. The method additionally includes applying the limit value to prevent opening of a new exchange.

Abstract: A single-wire communication bus couples a transmitting device to a UART in a receiving device. Flow control circuitry in the UART fills a transmit memory buffer with remote data. The UART supplies a remote start bit onto the single-wire bus for each byte of remote data written into the transmit memory buffer. After detecting a remote start bit on the single-wire bus, the transmitting device supplies initial data bits and a stop bit, which together form an RS232 character. Data flow is controlled when the UART supplies a subsequent remote start bit only after data has been read out of the UART freeing up bytes in a receive memory buffer. After the transmitting device detects the subsequent remote start bit, the transmitting device supplies subsequent data bits onto the single-wire bus. In another embodiment, flow control circuitry functionality is performed by flow control code in the receiving device operating system.

Abstract: A flow-based FIFO sub-system for a disk formatter in a data processing system that performs data width conversion. The sub-system has a first FIFO unit having a first width interfacing to a first bursting channel, and a second FIFO unit having a second width interfacing to a second bursting channel, the second width not being a multiple of the first width and the first width not being a multiple of the second width. Data width conversion is performed between the first FIFO unit and the second FIFO unit to convert data moving from the first FIFO unit to the second FIFO unit from the first width to the second width, and to convert data moving from the second FIFO unit to the first FIFO unit from the second width to the first width. The sub-system also includes an Error Correcting Code interface between the first FIFO unit and the second FIFO unit for performing in-line correction.

Abstract: There is provided several embodiments of the present invention, the invention being an automatic detection unit allowing for coupling of an external device with a host. The unit may connect to an external device either via wired or wireless means. The host may be activated from a standby mode by the external device and the external device may be identifiable by the host (or a verifier). Identification of the external device by the host allows identification of at least one data format type transmitted by the external device when data is transferred from the external device to the host. This may enable processing of the data by the host, such as, for example, storage, playback or both of the aforementioned.

Abstract: A method, apparatus, and computer instructions for controlling data flow. A control message is formed for the data flow in response to an event while the data flow is occurring. The control message includes a data type, an action, and a duration. The control message is sent to a receiver data processing system, wherein the receiver data processing system modifies the data flow to the data processing system using the control message.

Abstract: A system, method and apparatus for aligning data sequentially received on multiple single-byte data paths are provided. A sufficient number of bytes received in each channel may be stored (e.g., buffered) and examined to properly match data from each single-byte path. Once matched, the data may be output in a proper order on the multi-byte interface, for example, via some type of multiplexor arrangement. Furthermore, alignment operations may be performed in such a way so as to reduce the latencies involved in aligning data.

Abstract: In some embodiments, a USB host controller interface interfaces with a USB device at a device level by presenting a pipe of the USB device as a work queue to system software. Other embodiments are described and claimed.

Abstract: The present invention provides a method and apparatus for data processing and virtualization. The method and apparatus are configured to receive communications, separate a command communication from a data communication, parallel process the command communication and the data communication, generate at least one virtual command based on the command communication, and generate virtual data according to the at least one virtual command. The apparatus can comprise a parallel virtualization subsystem configured to separate data communications from command communications and to parallel process the command communications and the data communications, to generate virtual commands and to generate virtual data according to a virtual command, and a physical volume driver coupled with the parallel virtualization subsystem, wherein the physical volume driver receives the virtual data and configures the virtual data.

Abstract: An information terminal disclosed herein includes a data storage in which data is stored; an internal controller which accesses the data storage by a request from inside the information terminal; and an external controller which accesses the data storage by a request from outside the information terminal. If a request that the internal controller access the data storage is generated while the external controller is accessing the data storage, then the external controller repeatedly transmits a negative reply that data has not been properly received in response to access from the outside and the internal controller accesses the data storage while the external controller repeatedly transmits the negative reply.

Abstract: A method and apparatus for a multiprocessor system to simultaneously process multiple data write command issued from one or more peripheral component interface (PCI) devices by controlling and limiting notification of invalidated address information issued by one memory controller managing one group of multiprocessors in a plurality of multiprocessor groups. The method and apparatus permits a multiprocessor system to almost completely process a subsequently issued write command from a PCI device or other type of computer peripheral device before a previous write command has been completely processed by the system. The disclosure is particularly applicable to multiprocessor computer systems which utilize non-uniform memory access (NUMA).

Abstract: A method and apparatus for providing file system operation locks at a database server is provided. A database server may employ database locks and file system operation locks in servicing requests from consistent requestors and inconsistent requesters. A database lock is a lock that is obtained in response to performing a database operation, and the database lock is released when the database operation has successfully completed. A file system operation lock is a lock that is obtained in response to performing an OPEN file system operation, and the file system operation lock is released when a CLOSE file system operation is performed. The database server may use a temporary copy of the resource, which reflects all the current changes that have been made to the resource by database operations, in servicing consistent requestors, and may use the original version of the resource in servicing inconsistent requesters.

Abstract: A system for controlling the transfer of a signal sequence in a first clock domain to a plurality of other clock domains. The system comprising: detecting circuitry for detecting receipt of the signals from the clock domains and setting an update signal when all of the signals received from the clock domains have a common state; and gating circuitry for receiving the update signal and operable, when the update signal is set, to allow a next signal in the sequence to be received at the input of the first circuitry.

Abstract: Data packet buffering system comprising a data buffer for buffering data packets, a first counter (24) preloaded with the data packet size (32) and decremented at each read clock signal of a number of logical units corresponding to the width of the output bus (18), a second counter (28) preloaded with the data packet size and decremented at each write clock signal of a number of logical units corresponding to the width of the input bus (14), the decrementation of the second counter being started at the same time as the decrementation of the first counter by a start counter signal (38), and a threshold unit (52) for determining the minimum threshold from the contents of the second counter when the first counter has reached zero and providing the minimum threshold to a buffer management logic unit a buffer management logic unit (22) providing write grant signals when data may be read from the data buffer and sent to an output device.

Abstract: Keeping track of potential receive window positions in a communication system can prevent the receive window from moving from the proper potential positions, thereby reducing the probability of incorrect positions of the receive window. For example, a receive window can be updated by comparing the block number of a received block to a receive window; if the block number of the received block is outside the receive window, discarding the received block; if the block number of the received block is inside the receive window, retaining the received block; and determining an updated receive window that has a reduced size that excludes received blocks having block numbers that are not permitted according to the sequence of block numbers.

Abstract: A control mechanism for data bus communications employs channels to which bus transactions are assigned, each channel having independent flow control. The control mechanism enforces an ordering algorithm among channels, whereby at least some transactions may pass other transactions. Channel attributes are programmable to vary the ordering conditions. Preferably, each channel is allocated its own programmable buffer area. The control mechanism independently determines, for each channel, whether buffer space is available and enforces flow control independently for each channel accordingly. Flow control is preferably credit-based, credits representing buffer space or some other capacity of a receiver to receive data. Preferably, the flow control mechanism comprises a central interconnect module controlling internal communications of an integrated circuit chip.

Abstract: The invention provides a method and apparatus for providing a synchronized multichannel universal serial bus, the method in one aspect comprising supplementing the signal channels in the USB specification to provide synchronization information from an external source, and in another aspect comprising observing USB traffic and locking a local clock signal of a USB device to a periodic signal contained in USB data traffic, wherein the locking is in respect of phase and/or frequency.

Abstract: A DMA controller includes at least one peripheral DMA channel for handling DMA transfers on a peripheral access bus; at least one memory DMA stream, including a memory destination channel and a memory source channel, for handling DMA transfers on first and second memory access buses; first and second address computation units for computing updated memory addresses for DMA transfers; first and second memory pipelines for supplying memory addresses to the first and second memory access buses, respectively, and for transferring data on the first and second memory access buses; and a multiplexer configured to supply first and second current memory addresses to selected ones of the first and second memory pipelines in response to a control signal.

Abstract: The invention provides a task scheduling method which can prevent overflowing of a buffer on a host system or a data encoding/decoding apparatus even when the transfer rate falls in case the compressed data and the non-compressed data are simultaneously transferred between the host system and the data encoding/decoding apparatus. In a task scheduling method, the compressed audio/video data is transferred from the buffer of the host system to an external device with a first transfer priority. The non-compressed audio/video data is transferred from the buffer to the external device with a second transfer priority lower than the first transfer priority.

Abstract: A system and method for processing input/output (I/O) requests in a virtualized computer system. I/O requests are received from a virtual machine. A set of virtual I/O channels that may be interfaced with a host I/O stack and/or a virtual machine I/O stack adaptively queues requested data using a variety of I/O queue management modules. In one embodiment, the virtual I/O channels include an entropy detection module and a queue storage. The entropy detection module determines an entropy value of specified I/O request data and encodes the specified I/O request data with the entropy value within the queue storage.

Abstract: A memory controller for a wireless communication system comprises a packet buffer write system and a packet buffer read system. The packet buffer write system places packets including packet header and packet data into a packet buffer. The packet buffer read system removes packets including a packet header and packet data from a packet buffer. The packet buffer is arranged into a plurality of packet buffer memory slots, each slot comprising a descriptor status array location including an availability bit set to “used” or “free”, and a packet buffer memory location comprising a descriptor memory slot and a data segment memory slot. The descriptor memory slot includes header information for each packet, and the data segment memory slot includes packet data. The memory controller operates on one or more queues of data, and data is placed into a particular queue in packet memory determined by priority information derived from incoming packet header or packet data.

Abstract: A system, method, and computer readable medium for reducing message flow on a message bus are disclosed. The method includes determining if at least one logical operator in a plurality of logical operators requires processing on a given physical processing node in a group of physical nodes. In response to determining that the logical operator requires processing on the given physical processing node, the logical operator is pinned to the given physical processing node. Each logical operator in the plurality of logical operators is assigned to an initial physical processing node in the group of physical processing nodes on a message bus.

Abstract: A CPU of an image forming apparatus, such as a color electrophotographic copying apparatus, reads print step information from a memory, such as a USB memory, that stores print image data and print step information relating to a plurality of print steps for producing a print of the print image data and a progress state of the print steps. The CPU updates the progress state of the print steps stored in the memory subsequent to the print step being performed by a printer in the image forming apparatus, displays a next print step to perform based on the read print step information, and controls the printer. The image forming apparatus thus avoids leaks of the print data, and prevents useless printing and erratic job processing. Thus, even an inexperienced operator can provide sophisticated high quality print service using the image forming apparatus.