Abstract: A logically-partitioned computer system provides support for multiple logical partitions to access a single file system, thereby allowing the logical partitions to share a file without the overhead of communicating over a VLAN. An area of shared memory is defined that multiple logical partitions may access. One or more file control blocks that control access to the files in the file system are then created in the shared memory. Existing mechanisms for locking a file system between processes may then be used across logical partitions to serialize access to the file system by all processes in all logical partitions that share the file system. In this manner the sharing of files in a file system is enabled by leveraging existing technology that is used within a single logical partition to extend across multiple logical partitions.

Abstract: A computing system contains and uses a partitioning microkernel (PMK) or equivalent means for imposing memory partitioning and isolation prior to exposing data to a target operating system or process, and conducts continuing memory management whereby data is validated by security checks before or between sequential processing steps. The PMK may be used in conjunction with an Object Request Broker.

Abstract: A method for allocating memory in a computer system is disclosed. The method includes creating a kernel memory class, the kernel memory class acting as a logical container for at least a first kernel memory resource group. The method further includes processing a kernel client's request for additional memory by ascertaining whether there is sufficient free memory in the first kernel memory resource group to accommodate the kernel client's request. The method additionally includes denying the kernel client's request if there is insufficient free memory in the first kernel memory resource group to accommodate the kernel client's request.

Abstract: Systems, methods, apparatus and software can utilize storage resource locks to prevent modification (including relocation) of data in the storage resource while a third-party copy operation directed at the storage resource is occurring. A data transport mechanism such as a data restore application requests that a relevant portion of the storage resource be locked. Once locked, the data transport mechanism requests a data mover to perform a third-party copy operation whereby data is moved from a data source to the locked portion of the storage resource. When the third party-copy operation is complete, the data transport mechanism requests release of the lock on the portion of the storage resource.

Abstract: A method, apparatus, system and computer program product that provide a virtual worldwide name (vWWN) nameservice in a Fiber Channel storage area network (SAN) are provided. Embodiments of the vWWN nameservice can receive a request for a vWWN from a node in the SAN, where the request includes a identifier associated with resources in the SAN, then determine if the identifier matches contents of a field in one or more entries in a vWWN table or database, and provide the vWWN associated with a matching entry to the requesting node.

Abstract: In one embodiment, the present invention includes a method for determining if an isolation driver is present and a processor supports virtualization, launching the isolation driver in a first privilege level different than a system privilege level and user privilege level, creating a 1:1 virtual mapping between a virtual address and a physical address, using the isolation driver, and controlling access to a memory page using the isolation driver. Other embodiments are described and claimed.

Abstract: In a data-processing method, first result data may be obtained using a plurality of configurable coarse-granular elements, the first result data may be written into a memory that includes spatially separate first and second memory areas and that is connected via a bus to the plurality of configurable coarse-granular elements, the first result data may be subsequently read out from the memory, and the first result data may be subsequently processed using the plurality of configurable coarse-granular elements. In a first configuration, the first memory area may be configured as a write memory, and the second memory area may be configured as a read memory. Subsequent to writing to and reading from the memory in accordance with the first configuration, the first memory area may be configured as a read memory, and the second memory area may be configured as a write memory.

Abstract: Receiving a request for canceling setting, a control circuit erases data stored in a corresponding block, changes a value of a protection flag, and cancels protection setting. When an overall protection is set for any block, the control circuit prohibits access to all blocks, except when it is an operation mode for activating a memory program contained in the microcomputer. Further, control circuit permits an access to a block M only when partial protection is set, CPU is in the mode for activating a memory program contained in the microcomputer and the access is for reading an instruction code in accordance with an instruction fetch.

Abstract: A processor capable of secure execution. The processor contains an execution unit and secure partition logic that secures a partition in memory. The processor also contains cryptographic logic coupled to the execution unit that encrypts and decrypts secure data and code.

Abstract: A data storage system comprising a storage device comprising at least one nonvolatile memory, and a controller connected to the storage device through a channel. The memory controller sends part or all of a command, address and data for a next operation to the nonvolatile memory while the nonvolatile memory device is in a busy state. The memory controller then performs a background operation while the nonvolatile memory device remains in the busy state.

Abstract: A method, system and computer program product for modifying data elements in a shared data element group that must be updated atomically for the benefit of readers requiring group integrity. A global generation number is associated with the data element group and each member receives a copy of this number when it is created. Each time an update is performed, the global generation number is incremented and the updated element's copy of this number is set to the same value. For each updated data element, a link is maintained from the new version to the pre-update version thereof, either directly or using pointer-forwarding entities. When a search is initiated, the current global generation number is referenced at the commencement of the search. As data elements in the group are traversed, the reader traverses the links between new and old data element versions to find a version having a matching generation number, if any.

Abstract: Shared storage architectures are provided. A particular shared storage architecture includes an Enterprise Service Bus (ESB) system. The ESB system includes shared storage including data and file system metadata separated from the data. The file system metadata includes location data specifying storage location information related to the data. An infrastructure function of the ESB system is provided to enable messaging between providers and consumers through the shared storage.

Abstract: Systems and methods for increasing the yield of devices incorporating set-associative cache memories by selectively avoiding the use of cache entries that include defects. In one embodiment, a cache replacement manager determines in which of n possible entries data will be replaced. The cache replacement manager is configured to take into account whether each cache entry is defective when determining whether to select that entry as the destination entry for new data. The cache manager unit may implement a least-recently-used policy in selecting the cache entry in which the new data will be replaced. The cache replacement manager then treats any defective entries as if they hold the most recently used data, and thereby avoids selecting defective entries as the destination for new data. In one embodiment, the cache performs index translation before indexing into each set of cache entries in order to effectively redistribute defective entries among the indices.

Abstract: A compare, swap and store facility is provided that does not require external serialization. A compare and swap operation is performed using an interlocked update operation. If the comparison indicates equality, a store operation is performed. The compare, swap and store operations are performed as a single unit of operation.

Abstract: A system and method for detecting mirror inconsistencies in a distributed storage environment. Inconsistencies between mirrors may be detected by comparing session tags among individual storage devices. Each data write may include a tag and storage devices may calculate session tags from the write tags. Additionally, a storage device may keep a history including tags from recent writes. When a client sessions ends, a metadata server may compare the respective session tags from different storage devices to determine whether the mirrors are synchronized. If the session tags do not match, the metadata server may examine the metadata histories from the storage devices to determine a cause for the discrepancy in the session tags. If examining the session histories fails to reveal the discrepancy's source, a metadata server may request individual data block checksums from storage devices to attempt a re-synchronization of the mirrored storage devices.

Abstract: Shared storage architectures and methods are provided. A particular shared storage architecture is a system including shared storage including data and file system metadata separated from the data. The file system metadata includes location data specifying storage location information related to the data. Services are provided from service providers to service consumers through the shared storage.

Abstract: An apparatus includes: a memory; a management memory for storing first virtual addresses used by the first program, second virtual addresses used by the second program and management information indicative of association between first and second virtual addresses and physical addresses of the memory; and a processor for executing the first, the second and a management programs, the management program including: receiving a request to assign a shared area to be shared by the first and second programs from the second program; determining a physical address of the shared area corresponding to one of the first and one of the second virtual addresses; transmitting a notification of data writing by the first program to the second program; locking the shared area so as to prevent the second program from writing data after the notification; and unlocking the shared area after the second program has read data from the shared area.

Abstract: A method of declaring and using variables includes; determining whether variables are independent variables or common variables, declaring and storing the independent variables in a plurality of data structures respectively corresponding to the plurality of processors, declaring and storing the common variables in a shared memory area, allowing each one of the plurality of processors to simultaneously use the independent variables in a corresponding one of the plurality of data structures, and allowing only one of the plurality of processors at a time to use the common variables in the shared memory area.

Abstract: Embodiments may comprise logic such as hardware and/or code within a heterogeneous multi-core processor or the like to coordinate reading from and writing to buffers substantially simultaneously. Many embodiments include multi-buffering logic for implementing a procedure for a processing unit of a specialized processing element. The multi-buffering logic may instruct a direct memory access controller of the specialized processing element to read data from some memory location and store the data in a first buffer. The specialized processing element can then process data in the second buffer and, thereafter, the multi-buffering logic can block read access to the first buffer until the direct memory access controller indicates that the read from the memory location is complete. In such embodiments, the multi-buffering logic may then instruct the direct memory access controller to write the processed data to other memory.

Abstract: A data processor apparatus and memory interface comprises a memory, a plurality of memories, an interface for controlling access to the memories by a device, and an identifier identifying at least a memory location in one memory and a memory location in another memory. The interface is responsive to the identifier to condition the memory locations for receiving data and/or for transferring data therefrom. This arrangement eliminates the need for a dedicated broadcast bus from the array controller to each processor unit (PU), which thereby enables the area/space required to accommodate the data processor to be significantly reduced.

Abstract: A port queue includes a first memory portion having a first memory access time and a second memory portion having a second memory access time. The first memory portion includes a cache row. The cache row includes a plurality of queue entries. A packet pointer is enqueued in the port queue by writing the packet pointer in a queue entry in the cache row in the first memory. The cache row is transferred to a packet vector in the second memory. A packet pointer is dequeued from the port queue by reading a queue entry from the packet vector stored in the second memory.

Abstract: Object-based conflict detection is described in the context of software transactional memory. In one example, a pointer is received for a block of instructions, the block of instructions having allocated objects. The lower bits of the pointer are masked if the pointer is in a small object space to obtain a block header for the block, and a size of the allocated objects is determined using the block header.

Abstract: A system and method for managing space availability in a distributed striped file system is provided. A master data server is configured to send space availability detection messages to a plurality of data volumes servers hosting constituent volumes of a striped volume set. If one of the constituent volumes in the striped volume set has a low-in-space flag set, then the master data volume instructs all of the constituent volumes to set a low-in-space required flag, and no further writes are accepted for the striped volume set. The low-in-space and low-in-space required flags represent two states, and these states are returned in response to subsequent space availability detection messages from the master data server. A procedure for utilizing reserved space to complete an accepted cross stripe write operation is also provided.

Abstract: A hybrid Single-Compare-Single-Store (SCSS) operation may exploit best-effort hardware transactional memory (HTM) for good performance in the case that it succeeds, and may transparently resort to software-mediated transactions if the hardware transactional mechanisms fail. The SCSS operation may compare a value in a control location to a specified expected value, and if they match, may store a new value in a separate data location. The control value may include a global lock, a transaction status indicator, and/or a portion of an ownership record, in different embodiments. If another transaction in progress owns the data location, the SCSS operation may abort the other transaction or may help it complete by copying the other transactions' write set into its own right set before acquiring ownership. A hybrid SCSS operation, which is usually nonblocking, may be applied to building software transactional memories (STMs) and/or hybrid transactional memories (HyTMs), in some embodiments.

Abstract: An embodiment of the present invention is directed to an apparatus for sharing memory among a plurality of compute nodes. The apparatus includes a memory, a plurality of interfaces for coupling the apparatus with the compute nodes, a switching fabric coupled with the interfaces, and a processor coupled with the switching fabric and the memory. The processor is operable to assign a portion of the memory to a particular compute node for exclusive access by the particular compute node.

Abstract: Disclosed as a system and method for providing enhanced security to processes running on a data processing system. The disclosed system and method selectively revokes execute privileges from memory pages being used for stacks of susceptible processes running on the data processing system. By selectively resetting execute privileges on a per page and per process basis, the system and method maintains system performance and provides enhanced security to processes running on the data processing system.

Abstract: In a data processing apparatus that switches between a secure mode and a normal mode during execution, the secure mode allowing access to secure resources to be protected, the normal mode not allowing access to the secure resources, when the secure resources increase in the secure mode, the load on a protection mechanism for protecting the resources becomes large. Thus, there is a demand for data processing apparatuses that are able to reduce secure resources. The present invention relates to a data processing apparatus that stores therein a secure program including one or more processing procedures which use secure resources and a call instruction for calling a normal program to be executed in a normal mode. While executing the secure program, the data processing apparatus calls the normal program with the call instruction and operates according to the called normal program.

Abstract: A diskless host computer is automatically configured upon adding it to storage-area network (SAN). Upon physically connecting the diskless host computer to the network, the host computer alerts the network and a control station of its presence. A suitable identifier provided by the host, such as a Fibre Channel World Wide Name, is used to look up a configuration corresponding to a host of its type. Configurations corresponding to all types of hosts expected to be connected to the network are pre-stored in the SAN data storage system. Each configuration includes an operating system and can include any other software related to configuring or installing a new host. The control station then provides access to a storage device on which the operating system is stored so that the host can boot from it or access it for any other purposes.

Abstract: A weakly-ordered processing system implements an execution synchronization bus transaction, or “memory barrier” bus transaction, to enforce strongly-ordered data transfer bus transactions. A slave device that ensures global observability may “opt out” of the memory barrier protocol. In various embodiments, the opt-out decision may be made dynamically by each slave device asserting a signal, may be set system-wide during a Power-On Self Test (POST) by polling the slave devices and setting corresponding bits in a global observability register, or it may be hardwired by system designers so that only slave devices capable of performing out-of-order data transfer operations participate in the memory barrier protocol.

Abstract: An arbitration device arbitrates among master devices such that each master device is allowed to access a shared memory at a predetermined bandwidth, and the arbitration device permits an access request in a first period that a designer has set as desired if the access request has been made by a specific master device beyond a bandwidth that has been allocated in advance. The arbitration device masks an access request from the specific master device in a second period that follows the first period.

Abstract: The storage virtualization switch is capable of correctly designating a virtual target when a host computer accesses the virtual target. A dummy virtual target, which corresponds to a virtual target, is put into an effective state after the virtual target is put into the ineffective state when the virtual target is put into the ineffective state, and the virtual target is put into an effective state after the dummy virtual target, which corresponds to the virtual target, is put into the ineffective state when the virtual target is put into the effective state.

Abstract: A cached memory system that can handle high-rate input data and ensure that an embedded DSP can meet real-time constraints is described. The cached memory system includes a cache memory located close to a processor core, an on-chip memory at the next higher memory level, and an external main memory at the topmost memory level. A cache controller handles paging of instructions and data between the cache memory and the on-chip memory for cache misses. A direct memory exchange (DME) controller handles user-controlled paging between the on-chip memory and the external memory. A user/programmer can arrange to have the instructions and data required by the processor core to be present in the on-chip memory well in advance of when they are actually needed by the processor core.

Abstract: In one embodiment, the present invention includes a method for associating a first identifier with a first pointer that points to a first object in a memory. The first identifier may correspond to a value in a segment of a map array for a location of the first object in the memory. Other embodiments are described and claimed.

Abstract: A multiple computer environment is disclosed in which an application program executes simultaneously on a plurality of computers (M1, M2, . . . Mn) interconnected by a communications network (53) and in which the local memory of each computer is maintained substantially the same by updating in due course. A lock mechanism is provided to permit exclusive access to an asset, object, or structure (ie memory location) by acquisition and release of the lock. In particular, before a new lock can be acquired by any other computer on a memory location previously locked by one computer, any re-written content(s) for the previously locked memory location are transmitted to all the other computers and their corresponding memory locations (before the in due course updating). Thus when the new lock is acquired all the corresponding memory locations of all computers have been updated.

Abstract: A method, apparatus and computer program product are provided for implementing feedback directed deferral on nonessential direct access storage device (DASD) operations. A kernel DASD I/O manager maintains a queue depth count value for a DASD unit and maintains a busy flag that indicates when the queue depth count value is greater than a predefined threshold. The kernel DASD I/O manager defers optional operations responsive to the busy flag being set for the DASD unit.

Abstract: In a storage subsystem which is connected to an IP network, by excluding an improper packet, security is heightened, and a performance of communication to a logical unit of storage subsystem is maintained and secured. In the storage subsystem, a function which carries out filtering of a packet other than an iSCSI packet is provided. With respect to only the packet passed through the function, its accessibility to the logical unit is filtered. Also, traffic of all received packets, and a traffic lob of a packet judged to be discarded by the above filtering is recorded. By using this information, controlling such as a cut-off process of improper communication, QoS securement for normal communication and so on, are carried out.

Abstract: The invention provides a method for ensuring that data stored on rewritable storage is immutable. The method includes initializing selected user-addressable blocks of storage to a writable state. In addition, the method includes accepting data to be stored in specified user-addressable blocks. Also, the method includes determining if the specified block(s) is writable. Also, the method includes storing the accepted data to the rewritable storage. Moreover, the method includes setting the state of the specified block(s) to non-writable. In one embodiment, the writable/non-writable state associated with each block is encoded and stored in the contents of the corresponding block. In another embodiment, the steps of determining whether the specified block(s) is writable, storing the accepted data to the rewritable storage, and setting the state of the specified block(s) to non-writable, are integrated and indivisible.

Abstract: In traditional transactional locking systems, such as TLRW, threads may frequently update lock metadata, causing system performance degradation. A system and method for implementing transactional locking using reader-lists (TLRL) may associate a respective reader-list with each stripe of data in a shared memory system. Before reading a given stripe as part of a transaction, a thread may add itself to the stripe's reader-list, if the thread is not already on the reader-list. A thread may leave itself on a reader-list after finishing the transaction. Before a thread modifies a stripe, the modifying thread may acquire a write-lock for the stripe. The writer thread may indicate to each reader thread on the stripe's reader-list that if the reader thread is executing a transaction, the reader thread should abort. The indication may include setting an invalidation flag for the reader. The writer thread may clear the reader-list of a stripe it modified.

Abstract: Embodiments of the present invention address deficiencies of the art in respect to nested transaction rollback and provide a method, system and computer program product for dynamic nest level determination for nested transaction rollback. In an embodiment of the invention, a nested transaction rollback method can be provided. The method can include detecting a violation of a block of memory accessed within a set of nested transactions, retrieving a tentative rollback level for the violation, discarding a speculative state for the block of memory at each level of the set of nested transactions up to and including the tentative rollback level, refining the tentative rollback level to a lower level in the set of nested transactions, and additionally discarding a speculative state for the block of memory at additional levels in the set of nested transactions up to and including the refined rollback level.

Abstract: Administration of locks for critical sections of computer programs in a computer that supports a multiplicity of logical partitions that include determining by a thread executing on a virtual processor executing in a time slice on a physical processor whether an expected lock time for a critical section of the thread exceeds a remaining entitlement of the virtual processor in the time slice and deferring acquisition of a lock if the expected lock time exceeds the remaining entitlement.

Abstract: Disclosed is an information processing apparatus that has an update procedure semaphore, and a generation management information as management information of a shared data area that requires exclusion control. The generation management information specifies one item of generation information of the shared data area. As generation information provided for every generation, the apparatus has a reference-count measuring counter, a semaphore for updating generation information, a pointer for pointing to old generation information, and a pointer for pointing to the substance of the shared data area. In a case where the latest shared data is updated, a duplicate of the latest shared data area is created, new generation information corresponding to the duplicated shared data area is generated, data in the duplicated shared data area is updated and generation information, which corresponds to the shared data area after the updating thereof, is registered as the latest generation information.

Abstract: A method for erasing and writing desktop management interface (DMI) data under a Linux system is provided. The method constructs a virtual 8086 mode in the Linux system for executes a PnP calling routine. The method then erase and/or write the DMI data from a management information format database (MIFD) of a basic input/output system (BIOS) in a computer using the PnP calling routine.

Abstract: A method of controlling concurrent users of a distributed resource on a network is disclosed. In one aspect, there are one or more local lock managers executing on corresponding hosts and cooperating as a distributed lock manager. The resource is limited to a maximum number of concurrent users. A user identification for each user is associated with one host. In response to a request associated with a particular user associated with a first host, a lock is requested from a first local lock manager process executing on the first host. A related method of handling a request for a count-limited resource includes receiving a request from a client process for the computer resource. If it is determined that the request exceeds a maximum count for the resource, then it is determined whether a current time is within a retry time period of the client's first request.

Abstract: In the data protection system for controlling a data entry point, a storage unit for storing data includes a data entry point area and a data area for storing the physical data, in which the data entry points inside the data entry point area are pointed to specific sectors inside the data area, respectively. Therefore, if an authorized user does not know where the data entry point is, he or she cannot obtain the data from the data area. The system is to provide a corresponding data entry point only when a RFID TAG, similar to a key, is to disable locking, so that a corresponding computing apparatus can then read or write data to and from the storage unit inside the system. On the contrary, data cannot be read or written after the locking is enabled, so that data protection is achieved.

Abstract: A method for managing a memory in a computer system is disclosed. A mapping of a virtual page to physical page is locked in response to receiving a request to make the page immutable. According to an aspect of an embodiment of the invention, locking the mapping of the virtual page to the physical page includes preventing mapping of the virtual page to another physical page. Other embodiments are described and claimed.

Abstract: An image forming apparatus includes a plurality of hardware resources provided to carry out image formation. A plurality of application programs perform respective processing of the plurality of hardware resources related to the image formation. A storage device stores rewritable shared data which is used by the application programs in common. A shared-data control unit suspends one of a write-lock request or a read-lock request that is received from one of the application programs when acquisition and/or updating of the shared data is inhibited, and after the acquisition and/or updating of the shared data is allowed, inhibits the acquisition and/or updating of the shared data by other application programs in accordance with the suspended request for the one of the plurality of application programs.

Abstract: An apparatus and method for containerization of multiple data objects within a block of a single container. The apparatus and method may pack multiple data objects together in a block of a logical container in a file system. The method may include receiving data in the form of multiple data objects to be stored in a file system, and collectively data packing the multiple data objects together in at least one block of a logical container in the file system. The block is a fundamental unit of storage space of the file system, and each block of the logical container includes multiple extents to store data from at least one data object of the multiple objects. The apparatus may include a plurality of storage devices coupled to a storage server. The storage server is configured to store the multiple data objects in at least one block of the logical container in the file system. Some data objects may be stored in multiple extents of one or more blocks depending on the size of the data object.

Abstract: Described are techniques for controlling performance of a data storage system. A performance goal specifying a limit for an I/O class is received. A number of requests of the I/O class to be processed concurrently to achieve the performance goal so that an observed performance value for the I/O class does not exceed the performance goal is determined. If the limit is a upper bound, the observed performance value falls within a range of one or more values equal to or less than the limit, and if the limit is a minimum value, the observed performance value falls within a range of one or more values equal to or greater than the limit.

Abstract: A processor includes a cache hierarchy including a level-1 cache and a higher-level cache. The processor maps a portion of physical memory space to a portion of the higher-level cache, executes instructions, at least some of which comprise microcode, allows microcode to access the portion of the higher-level cache, and prevents instructions that do not comprise microcode from accessing the portion of the higher-level cache. The first portion of the physical memory space can be permanently allocated for use by microcode. The processor can move one or more cache lines of the first portion of the higher-level cache from the higher-level cache to a first portion of the level-1 cache, allow microcode to access the first portion of the first level-1 cache, and prevent instructions that do not comprise microcode from accessing the first portion of the first level-1 cache.

Abstract: A method of arbitrating access to a storage medium that is shared by M first computers operating on a Windows™ operating comprising (1) determining if the SCSI PR-flag has been set; (2) if yes, preventing the N second computers from writing to the storage medium; and (3) setting the SCSI MC-flag for each of said M first computers after one of the second computers writes to the storage medium to notify the M first computers that the contents of the storage medium may have changed.