Abstract: A computer data storage system is described. A processor maintains a striped volume set by striping a data container over a plurality of storage nodes. A storage node determines whether space available on that node is below a predetermined threshold, the predetermined threshold indicating a low-in-space state. The storage node sends a message indicating that the storage node is in a low-in-space state. The processor accepts no further write messages to the data container as long as the storage node is in a low-in-space state.

Abstract: Access to a memory area by a first processor that executes a first processor program and a second processor that executes a second processor program is granted to one of the first processor and the second processor at a time. Access to the memory area by the first processor and the second processor are cyclically uniquely allocated (e.g., t?[(ad mod m)=o]) between the first and the second processor by the first and second processor programs.

Abstract: A data processing system includes an interconnect fabric, a system memory coupled to the interconnect fabric and including a virtual barrier synchronization region allocated to storage of virtual barrier synchronization registers (VBSRs), and a plurality of processing units coupled to the interconnect fabric and operable to access the virtual barrier synchronization region. Each of the plurality of processing units includes a processor core and a cache memory including a cache controller and a cache array that caches VBSR lines from the virtual barrier synchronization region of the system memory. The cache controller of a first processing unit, responsive to a memory access request from its processor core that targets a first VBSR line, transfers responsibility for writing back to the virtual barrier synchronization region a second VBSR line contemporaneously held in the cache arrays of first, second and third processing units.

Abstract: Methods and systems for running multiple operating systems in a single embedded or mobile device (include PDA, cellular phone and other devices) are disclosed. The invention allows a mobile device that normally can only run a single operating system to run another operating system while preserving the state and data of the original operating system. Guest OS is packaged into special format recognizable by the host OS that still can be executed in place by the system. The Methods include: Change the memory protection bits for the original OS; Fake a reduced physical memory space for guest OS; Use special memory device driver to claim memories of host OS; Backup whole image of the current OS and data to external memory card.

Abstract: Some aspects include reception of a command from one of a chassis management module and a BIOS specifying a data region to be updated and a locking policy, determination of whether the data region is locked, implementation of the locking policy and returning of a session lock handle if it is determined that the data region is not locked, reception, from the one of the chassis management module and the BIOS, of data for updating the data region, the session lock handle, and an offset, determination that the session lock handle is associated with the data region, writing of the data to the data region at the offset, reception of a request for data of the updated data region from the other one of the chassis management module and the BIOS, determination of whether the updated data region is locked, and if it is determined that the updated data region is not locked, providing of the data of the updated data region to the other one of the chassis management module and the BIOS.

Abstract: A mountable apparatus, which is adapted for installation in a liquid jetting device when delivering a liquid contained in a liquid container that contains a liquid to the liquid jetting device via a liquid delivery tube connected to the liquid container, includes an installation status notifier portion. In an installed state wherein the mountable apparatus is installed in the liquid jetting device, the installation status notifier portion is able to make the liquid jetting device determine that there exists the installed state, and alternatively to make the liquid jetting device determine, even in the installed state, that there exists a non-installed state wherein the mountable apparatus is not installed in the liquid jetting device.

Abstract: A mechanism for automatic reallocation of shared external storage structures is provided. The shared external storage divides the dynamically allocable storage into fixed sized blocks referred to as allocation units. To create an object of a specific type, the shared external storage uses some number of allocation units. If the object will fit in one allocation unit, then it is placed in one allocation unit. If the object is larger than one allocation unit, then the appropriate number of allocation units is obtained and chained together to contain all of the information of the required object. When an object so allocated is no longer needed, the shared external storage breaks the object down to a set of one or more fixed sized allocation units. The shared external storage then returns the allocation units to the pool of available objects.

Abstract: One embodiment of the present application includes a microcontroller (30) that has an embedded memory (46), a programmable processor (32), and a test interface (34). The memory (46) is accessible through the test interface (34). In response to resetting this microcontroller (30), a counter is started and the test interface (34) is initially set to a disabled state while an initiation program is executed. The test interface (34) is changed to an enabled state—such that access to the embedded memory (46) is permitted through it—when the counter reaches a predefined value unless the microcontroller (30) executes programming code before the predefined value is reached to provide the disabled state during subsequent microcontroller (30) operation.

Abstract: A method and apparatus for providing optimized strong atomicity operations for non-transactional writes is herein described. Locks are acquired upon initial non-transactional writes to memory locations. The locks are maintained until an event is detected resulting in the release of the locks. As a result, in the intermediary period between acquiring and releasing the locks, any subsequent writes to memory locations that are locked are accelerated through non-execution of lock acquire operations.

Abstract: In accordance with some embodiments, software transactional memory may be used for both managed and unmanaged environments. If a cache line is resident in a cache and this is not the first time that the cache line has been read since the last write, then the data may be read directly from the cache line, improving performance. Otherwise, a normal read may be utilized to read the information. Similarly, write performance can be accelerated in some instances to improve performance.

Abstract: A programmable electronic device (10) stores a number of cipher-text software modules (14) to which access is granted after evaluating a user's token (55, 80, 82), a software-restriction class (58) for a requested software module (14), and/or a currently active access-control model (60). Access-control models (60) span a range from uncontrolled to highly restrictive. Models (60) become automatically activated and deactivated as users are added to and deleted from the device (10). A virtual internal user proxy that does not require users to provide tokens (80, 82) is used to enable access to modules (16) classified in a global software-restriction class (62) or when an uncontrolled-access-control model (68) is active. Both licensed modules (76) and unlicensed modules (18,78) may be loaded in the device (10). However, no keys are provided to enable decryption of unlicensed modules (18,78).

Abstract: A system and method for locking and unlocking access to a shared memory for atomic operations provides immediate feedback indicating whether or not the lock was successful. Read data is returned to the requestor with the lock status. The lock status may be changed concurrently when locking during a read or unlocking during a write. Therefore, it is not necessary to check the lock status as a separate transaction prior to or during a read-modify-write operation. Additionally, a lock or unlock may be explicitly specified for each atomic memory operation. Therefore, lock operations are not performed for operations that do not modify the contents of a memory location.

Abstract: File difference is managed. Group data and difference detection data tables are stored. A previous difference detection file, which is an original file of a difference management object file, is searched, and a difference between the previous difference detection file and the difference management object file is detected. Difference detection data is used to detect the difference, and is recorded on the difference detection data table. A group to which the difference management object file belongs is selected based on a group condition registered in the group data table. The difference is detected based on comparing extracted difference detection data and file data of the difference management object file. A set of the file data and the group is recorded as a new difference detection data on the difference detection data table, when the difference is detected.

Abstract: A method, device, and system are disclosed. In one embodiment the method includes grouping multiple memory requests into multiple of memory rank queues. Each rank queue contains the memory requests that target addresses within the corresponding memory rank. The method also schedules a minimum burst number of memory requests within one of the memory rank queues to be serviced when the burst number has been reached in the one of the plurality of memory rank queues. Finally, if a memory request exceeds an aging threshold, then that memory request will be serviced.

Abstract: Mechanisms are disclosed for detecting protocols independently of the ports used by streams associated with the protocols or applications that may send out such streams. The detecting may entail using a content filter that is hosted on a networking stack, where the content filter may be composed of a stream buffer and handlers for detecting the protocols. The handlers may be further used to modify streams incoming to a port or streams outgoing from an application. The handlers can modify the streams in a variety of ways, including reading, inserting, replacing, deleting, and completing data in the streams according to some policy criteria, such as those set by parental controls. Individual handlers may be selected from a plurality or set of handlers so that they can be matched up to the appropriate streams.

Abstract: The present invention provides a storage system for migrating a storage apparatus. The storage system comprises the steps of: defining a logical volume on a storage apparatus to be migrated coupled to a first controller as a local volume coupled to a second controller; setting to receive an access targeted to the logical volume through an input/output port of the storage apparatus to be migrated, as the local volume coupled to the second controller; blocking the input/output port of the storage apparatus to be migrated; connecting the other input/output port of the storage apparatus to the second control apparatus.

Abstract: One embodiment includes a personal computer device comprising at least one machine configured to execute a primary user operating system and at least one appliance operating system independent from the primary user operating system. The personal computer device also including a system memory including a first portion of the system memory configured to be used by the primary user operating system; and a second portion of the system memory configured to be sequestered from the primary user operating system.

Abstract: A system, method, and computer program product for handling shared cache lines to allow forward progress among processors in a multi-processor environment is provided. A counter and a threshold are provided a processor of the multi-processor environment, such that the counter is incremented for every exclusive cross interrogate (XI) reject that is followed by an instruction completion, and reset on an exclusive XI acknowledgement. If the XI reject counter reaches a preset threshold value, the processor's pipeline is drained by blocking instruction issue and prefetching attempts, creating a window for an exclusive XI from another processor to be honored, after which normal instruction processing is resumed. Configuring the preset threshold value as a programmable value allows for fine-tuning of system performance.

Abstract: Machine-readable media, methods, apparatus and system for detecting a data access violation are described. In some embodiments, current memory access information related to a current memory access to a memory address by a current user thread may be obtained. It may be determined whether a cache includes a cache entry associated with the memory address. If the cache includes the cache entry associated with the memory address, then, an access history stored in the cache entry and the current memory access information may be analyzed to detect if there is at least one of an actual violation and a potential violation of accessing the memory address.

Abstract: A multiprocessor system includes first and second processors and a multi-path accessible semiconductor memory device including a shared memory area and a pseudo operation execution unit. The shared memory area is accessible by the first and second processors according to a page open policy. The pseudo operation execution unit responds to a virtual active command from one of the first and second processors to close a last-opened page. The virtual active command is generated with a row address not corresponding to any row of the shared memory area. For example, bit-lines of a last accessed row are pre-charged for closing the last-opened page.

Abstract: A memory module having reduced access granularity. The memory module includes a substrate having signal lines thereon that form a control path and first and second data paths, and further includes first and second memory devices coupled in common to the control path and coupled respectively to the first and second data paths. The first and second memory devices include control circuitry to receive respective first and second memory access commands via the control path and to effect concurrent data transfer on the first and second data paths in response to the first and second memory access commands.

Abstract: The present disclosure describes a unique way for each of multiple processes to operate in parallel and use the same shared data without causing corruption to the shared data. For example, during a commit phase, a corresponding transaction can attempt to increment a globally accessible version information variable and store a current value of the globally accessible version information variable for updating version information associated with modified data regardless of whether an associated attempt by the corresponding transaction to modify the globally accessible version information variable was successful. As an alternative mode, a corresponding transaction can merely read and store a current value of the globally accessible version information variable without attempting to update the globally accessible version information variable before such use.

Abstract: Secure erase of files and unallocated sectors on storage media such that any previous data is non-recoverable. The database contains sets of data patterns used to overwrite the data on different physical media. The software programs manage the overwriting process automatically when a file has been deleted. When de-allocated sectors in the file system are pruned from a file or escaped the file deletion process also finds them. Data will never be found on deleted sectors or on pruned sectors is overwritten.

Abstract: A method for erasing and writing desktop management interface (DMI) data under a Linux system is provided. The method constructs a virtual 8086 mode in the Linux system for executes a PnP calling routine. The method then erase and/or write the DMI data from a management information format database (MIFD) of a basic input/output system (BIOS) in a computer using the PnP calling routine.

Abstract: A method, system, apparatus, and signal-bearing media for finding a logical unit data structure associated with a command and a logical unit of a device, selecting a command table based on the logical unit data structure and a host that issued the command, indexing the command into the command table, and performing a routine indicated by the command table in response to the indexing. The command table may be a normal command table if no other host has reserved the logical unit or a reserved command table if another host has reserved the logical unit.

Abstract: Memory apparatus and methods utilizing multiple bit lanes may redirect one or more signals on the bit lanes. A memory agent may include a redrive circuit having a plurality of bit lanes, a memory device or interface, and a fail-over circuit coupled between the plurality of bit lanes and the memory device or interface.

Abstract: An embodiment of the invention provides an apparatus and a method of dynamically controlling the number of busy waiters in for a synchronization object. The apparatus and method perform the steps of increasing a number of allowed busy waiters if there is a waiter in a sleep state and there are no current busy waiters when a requester releases the synchronization object, and decreasing the number of allowed busy waiters if a busy waiter moves from a busy waiting state to the sleep state.

Abstract: A method is presented of erasing, in a document data processing device, a stored information pattern on a rewritable data carrier that is accessible by a data processing facility of the document data processing device. The document data processing device includes primary processes for processing document data, wherein data may be stored on the data carrier, and secondary processes for erasing stored data, through overwriting a selected storage area of the carrier by a shredding pattern. According to the method, the primary and secondary processes are run asynchronously, e.g., the secondary processes are run in background, in order not to hinder the primary processes. In a particular embodiment, an initial shredding run is made directly after a file is no longer used, and additional shredding runs are made in background.

Abstract: A wake-and-go mechanism is configured to issue a look-ahead load command on a system bus to read a data value from a target address and perform a comparison operation to determine whether the data value at the target address indicates that an event for which a thread is waiting has occurred. In response to the comparison resulting in a determination that the event has not occurred, the wake-and-go engine populates the wake-and-go storage array with the target address. In response to the comparison resulting in a determination that the event has occurred, the wake-and-go engine issues a load command on the system bus to read the data value from the target address with data exclusivity and determines whether the wake-and-go engine obtains a lock for the target address. Responsive to obtaining the lock for the target address, the wake-and-go engine holds the lock for the thread.

Abstract: Apparatus and method are disclosed for managing lock state information in a distributed file system. A set of data containers storing data is maintained. The data containers are striped across a plurality of volumes, where each volume includes one or more data storage devices. A metadata volume is maintained with the plurality of volumes, the metadata volume configured to include a lock state database that stores lock state information for the plurality of volumes. The lock state information is communicated between the metadata volume and the plurality of volumes.

Abstract: The invention relates to a system and method for controlling implementation of a command to a NAND memory device. The method comprises: monitoring an input/output (I/O) bus connected to the NAND memory device for an assertion of a write command for the NAND memory device. Upon detection of the write command, the method evaluates a destination address associated with the write command. If the destination address is not a restricted address for the NAND memory device, then the method allows the write command to modify the contents; and if the destination address is a restricted address for the NAND memory device, then the method prevents assertion of the write command on the contents.

Abstract: A method for accessing memory by a first processor of a plurality of processors in a multi-processor system includes, responsive to a memory access instruction within a speculative region of a program, accessing contents of a memory location using a transactional memory access to the memory access instruction unless the memory access instruction indicates a non-transactional memory access. The method may include accessing contents of the memory location using a non-transactional memory access by the first processor according to the memory access instruction responsive to the instruction not being in the speculative region of the program. The method may include updating contents of the memory location responsive to the speculative region of the program executing successfully and the memory access instruction not being annotated to be a non-transactional memory access.

Abstract: In a virtualized system using memory page sharing, a method is provided for maintaining sharing when Guest code attempts to write to the shared memory. In one embodiment, virtualization logic uses a pattern matcher to recognize and intercept page zeroing code in the Guest OS. When the page zeroing code is about to run against a page that is already zeroed, i.e., contains all zeros, and is being shared, the memory writes in the page zeroing code have no effect. The virtualization logic skips over the writes, providing an appearance that the Guest OS page zeroing code has run to completion but without performing any of the writes that would have caused a loss of page sharing. The pattern matcher can be part of a binary translator that inspects code before it executes.

Abstract: System and method for authenticating data or program code via a configurable signature. Configuration information is retrieved from a protected first memory, e.g., an on-chip register, where the configuration information specifies a plurality of non-contiguous memory locations that store the signature, e.g., in an on-chip memory trailer. The signature is retrieved from the plurality of non-contiguous memory locations based on the configuration information, where the signature is useable to verify security for a system. The signature corresponds to specified data and/or program code stored in a second memory, e.g., in off-chip ROM. The specified data and/or program code may be copied from the second memory to a third memory, and a signature for the specified data and/or program code calculated based on the configuration information. The calculated signature may be compared with the retrieved signature to verify the specified data and/or program code.

Abstract: Methods and apparatus provide for: entering a secure mode in which a given processor may initiate a transfer of information into or out of said processor, but no external device may initiate a transfer of information into or out of said processor; and programming at least one trusted data storage location using a direct memory access (DMA) command to be one of read-only, write-only, readable and writeable, limited access, and reset, where said at least one trusted data storage location is located external to said processor.

Abstract: A method to qualify access to a block storage device via augmentation of the device's controller and firmware flow. The method employs one or more block exclusion vectors (BEVs) that include attributes specifying allowed access operations for corresponding block address ranges. Logic in accordance with the BEVs is programmed into the controller for the block storage device, such as a disk drive controller for a disk drive. In response to an access request, a block address range corresponding to the storage block(s) requested to be accessed is determined. Based on the BEV entries, a determination is made to whether the determined logical block address range is covered by a corresponding BEV entry. If so, the attributes of the BEV are used to determine whether the access operation is allowed. The method may be used to secure access to firmware stored on a disk drive, thus enabling a system configuration that does not require a conventional firmware storage device.

Abstract: A method, computer program product and computer system for allocating shared address translation tables for memory regions of multiple I/O adaptors, which includes allocating an address translation table to be shared between the memory regions, creating a hardware context for each memory region, and sharing the address translation table across multiple adaptors.

Abstract: A method for detecting race conditions involving heap memory access including a plurality of threads being tracked. At runtime a plurality of APIs utilized to create and destroy thread synchronization objects are intercepted, and each synchronization object created via the APIs is tracked. A bit field is created that contains a unique bit for each synchronization object. Heap memory allocations and deallocations are intercepted and tracked. The heap memory access is intercepted, and at that time, the ID of the accessing thread is compared with the last thread ID associated with that memory block when it was last accessed. If the thread IDs do not match, then the current thread synchronization object bit field is compared with the last synchronization object bit field associated with thread memory block. Provided the bit fields are different, a race condition warning is reported that is displayable to the user having the call chains.

Abstract: Various technologies and techniques are disclosed for providing type stability techniques to enhance contention management. A reference counting mechanism is provided that enables transactions to safely examine states of other transactions. Contention management is facilitated using the reference counting mechanism. When a conflict is detected between two transactions, owning transaction information is obtained. A reference count of the owning transaction is incremented. The system ensures that the correct transaction was incremented. If the owning transaction is still a conflicting transaction, then a contention management decision is made to determine proper resolution. When the decision is made, the reference count on the owning transaction is decremented by the conflicting transaction. When each transaction completes, the reference counts it holds to itself is decremented. Data structures cannot be deallocated until their reference count is zero.

Abstract: A system and method for controlling access to a shared storage device in a computing cluster having at least two nodes configured as cluster members provide fencing and quorum features without using the device controller hardware/firmware so fencing can be provided with storage devices that do not support disk reservation operations, such as with non-SCSI compliant disks. A polling thread on each node periodically reads a designated storage space on the shared storage device at a polling interval to determine if its corresponding node registration key is present, and halts the node if the key has been removed. A cluster membership agent removes a corresponding node registration key from the designated storage space of the shared storage device and publishes new membership information indicating that the corresponding node has departed the cluster only after delaying for a time period greater than the polling interval.

Abstract: The apparatus and method described herein are for handling shared memory accesses between multiple processors utilizing lock-free synchronization through transactional-execution. A transaction demarcated in software is speculatively executed. During execution invalidating remote accesses/requests to addresses loaded from and to be written to shared memory are track by a transaction buffer. If an invalidating access is encountered, the transaction is re-executed. After a pre-determined number of times re-executing the transaction, the transaction may be re-executed non-speculatively with locks/semaphores.

Abstract: A data processing system includes a plurality of requestors and a memory controller for a system memory. In response to receiving from the requestor a read-type request targeting a memory block in the system memory, the memory controller protects the memory block from modification, and in response to an indication that the memory controller is responsible for servicing the read-type request, the memory controller transmits the memory block to the requestor. Prior to receipt of the memory block by the requestor, the memory controller ends protection of the memory block from modification, and the requestor begins protection of the memory block from modification. In response to receipt of the memory block, the requestor ends its protection of the memory block from modification.

Abstract: A lock implementation has properties of both backoff locks and queue locks. Such a “composite” lock is abortable and is provided with a constant number of preallocated nodes. A thread requesting the lock selects one of the nodes, attempts to acquire the selected node, and, if successful, inserts the selected node in a wait-queue for the lock. Because there is only a constant number of nodes for the wait-queue, all requesting threads may not be queued. Requesting threads unable to successfully acquire a selected node may backoff and retry selecting and acquiring a node. A node at the front of the wait-queue holds the lock.

Abstract: A servo controller for a disk drive controller comprising a storage device that stores communication information for a plurality of devices and a serial port controller located on the servo controller that communicates with the storage device, that receives a request to communicate with one of the plurality of devices, and that allows communication between at least one processor and the one of the plurality of devices according to the stored communication information and the request, wherein each of the plurality of devices uses a different protocol.

Abstract: One embodiment includes a personal computer device comprising at least one machine to execute a primary user operating system, a first physical memory to be used by the primary user operating system, at least one appliance operating system that is independent from the primary user operating system, a second physical memory to be sequestered from the primary user operating system and an access violation monitor to restrict access from the at least one appliance operating system to the second physical memory, wherein the access violation monitor is to run only when the at least one appliance operating system is invoked and at least one appliance operating system is to be invoked only after the primary user operating system has been suspended to a standby state.

Abstract: Handling parallelism in transactions. One embodiment includes a method that includes beginning a cache resident transaction. The method further includes encountering a nested structured parallelism construct within the cache resident transaction. A determination is made as to whether the transaction would run faster serially in cache resident mode or faster parallel in software transactional memory mode for the overall transaction. In the software transactional memory mode, cache resident mode is used for one or more hierarchically lower nested transactions. The method further includes continuing the transaction in the mode determined.

Abstract: A method and apparatus for accelerating a Software Transactional Memory (STM) system is herein described. A data object and metadata for the data object may each be associated with a filter, such as a hardware monitor or ephemerally held filter information. The filter is in a first, default state when no access, such as a read, from the data object has occurred during a pendancy of a transaction. Upon encountering a first access to the metadata, such as a first read, access barrier operations, such as logging of the metadata; setting a read monitor; or updating ephemeral filter information with an ephemeral/buffered store operation, are performed. Upon a subsequent/redundant access to the metadata, such as a second read, access barrier operations are elided to accelerate the subsequent access based on the filter being set to the second state to indicate a previous access occurred.

Abstract: A system and method is disclosed for fast lock acquisition and release in a lock-based software transactional memory system. The method includes determining that a group of shared memory areas are likely to be accessed together in one or more atomic memory transactions executed by one or more threads of a computer program in a transactional memory system. In response to determining this, the system associates the group of memory areas with a single software lock that is usable by the transactional memory system to coordinate concurrent transactional access to the group of memory areas by the threads of the computer program. Subsequently, a thread of the program may gain access to a plurality of the memory areas of the group by acquiring the single software lock.

Abstract: Embodiments of the present invention provide a resource management mechanism to monitor the availability of resources, detect the cause of a rejection, distinguish between different types of rejections, and manage the different types accordingly. For example, a queue manager in accordance with embodiments of the invention may be able to classify rejected requests, for example, as either a “long reject” or a “short reject” based on the cause of the rejection and the amount of time the rejection conditions are expected to remain valid. A short reject request may be rescheduled in an appropriate service queue, while a long reject request may be suspended in a reject queue. Other features are described and claimed.

Abstract: A computing system having a host device and at least one client device having a lock used to prevent modification of data in the client device. A lock clear signal from the host device causes the client device to clear a lock used to prevent modification of data stored in at least a protected portion of the client device where the client device remains fully operational.