Abstract: Interaction output over a local computer-readable medium (CRM) generated based on user interaction with rendered content input representing a virtualized asset being is received at a virtualized asset local provisioning server. A manner to exploit the virtualized asset is determined from interaction output. The virtualized asset is exploited based on the determined manner to exploit the virtualized asset. A request for a portion of the virtualized asset generated in response to the exploiting the virtualized asset is intercepted. If it is determined that the portion of the virtualized asset is absent from the local storage, a request for the portion of the virtualized asset is sent to a virtualized asset delivery system over a non-local CRM; the portion of the virtualized asset retrieved by the virtualized asset delivery system is received over the non-local CRM; and the received portion of the virtualized asset is used in exploiting the virtualized asset.

Abstract: Systems and methods for coordinated memory-side cache prefetching and dynamic interleaving configuration modification involve modifying one or both of the prefetch distance or the prefetch degree used by prefetcher modules of one or more memory-side caches by modifying interleaving configuration data following detection of an interleaving reconfiguration trigger condition indicative, for example, of low prefetch accuracy, low prefetch coverage, high prefetch lateness, or a combination of these. In response an interleaving reconfiguration trigger condition, a processor modifies the interleaving configuration data for the processing system based on the prefetch performance characteristics associated with the interleaving reconfiguration trigger condition. In some embodiments, the interleaving configuration data is modified by changing which physical memory address indices are used to determine the bits that define the channel identification number to which that physical memory address is to be mapped.

Abstract: Systems and methods are described for avoiding redundant data transfers using delta coding techniques when reliably and opportunistically communicating data to multiple user systems. According to embodiments, user systems track received block sequences for locally stored content blocks. An intermediate server intercepts content requests between user systems and target hosts, and deterministically chucks and fingerprints content data received in response to those requests. A fingerprint of a received content block is communicated to the requesting user system, and the user system determines based on the fingerprint whether the corresponding content block matches a content block that is already locally stored. If so, the user system returns a set of fingerprints representing a sequence of next content blocks that were previously stored after the matching content block.

Abstract: A storage system includes an object storage server and a storage client, the object storage server obtains an object migration policy of a source bucket, where the object migration policy indicates a condition for migrating an object from the source bucket to a destination bucket in a plurality of buckets, and the object storage server migrates a first object in the source bucket to the destination bucket according to the policy migration policy when determining that the first object meets the object migration policy of the source bucket.

Abstract: In some implementations, a data cleaning platform may determine a respective entity key for each data record in a cleansed dataset based on a combination of fields, in each data record, that contain information that uniquely identifies an entity associated with a respective data record. The data cleaning platform may generate a delta dataset based on a set of uncleansed data records related to transactions that occurred after a time when the cleansed dataset was first generated. For example, in some implementations, each uncleansed data record in the delta dataset may be associated with a corresponding entity key based on the combination of fields. The data cleaning platform may perform a data join to update the cleansed dataset to include data records related to the transactions that occurred after the time when the cleansed dataset was first generated.

Abstract: A storage cluster includes a group of data nodes having concurrent access to a shared filesystem. The shared filesystem is assigned to a first TLU of a first storage group. Other filesystems of the data nodes associated with the shared filesystem, such as snapshot copies of the shared filesystems and the root/configuration filesystems of the data nodes are assigned to TLUs of a second set of storage groups. The first storage group and the second set of storage groups are all associated with a Remote Data Replication (RDR) group for the storage cluster. An RDR facility is created between a storage array storing the shared filesystem and a backup storage array. The concurrently accessed shared filesystem and the filesystems of all data nodes accessing shared filesystem are replicated on the RDR facility to the backup storage array to enable failover of the storage cluster between sites.

Abstract: A method of data processing is applied to a communications device including a first sublayer. A physical sublayer is added above a physical coding sublayer (PCS) of a physical layer, and the physical sublayer is connected to media independent interfaces (xMIIs) with different Ethernet rates. Data signals from different media access control clients (MAC) are interleaved using the physical sublayer. Then, a tx_cmd command is used to instruct the PCS to correspondingly encode an xMII signal. Finally, an encoded xMII signal is sent through a port. According to this method, an encoding function of the PCS may continue to be used, to decouple interleaving from encoding and perform the interleaving through an xMII interface. In this case, port channelization can be implemented for ports with multiple rates, and transmission of a high-priority service is ensured when there is an excessively large quantity of service flows in a transmission process.

Abstract: A processor receives, from a requestor, a first request containing a virtual address. Based on the first request, the processor determines a real address corresponding to the virtual address, encrypts at least a portion of the real address to obtain a cryptographic secure real address, and returns the cryptographic secure real address to the requestor. Based on receiving a second request specifying a request address, the processor decrypts the request address to validate the request address as the cryptographic secure real address. Based on validating the request address as the cryptographic secure real address, the processor allows access to a resource of the data processing system identified by the real address.

Abstract: A storage system and method for multiprotocol handling are provided. In one embodiment, a computing device is provided comprising a plurality of communication channels configured to communicate with a storage system, wherein a first communication channel has a faster data transfer speed than a second communication channel. The computing device also comprises a processor configured to determine a priority level of a command; send the command with an indication of its priority level to the storage system; in response to the command being a high-priority command, use the first communication channel for transferring data for the command; and in response to the command being a low-priority command, use the second communication channel for transferring data for the command. Other embodiments are provided.

Abstract: The present disclosure generally relates to effective transport layer packet (TLP) utilization. When the controller of the data storage device generates a request for transferring data to or from the storage device, the request is stored in a merging buffer. The merging buffer may include previously generated requests, where the previously generated requests and the new requests are merged. A timeout counter is initialized for the requests stored in the merging buffer. The timeout counter has a configurable threshold value that corresponds to a weight value, adjusted for latency or bandwidth considerations. When the merged request is greater than the maximum TLP size, the merged request is partitioned, where at least one partition is in the size of the maximum TLP size. The request is sent from the buffer when the request is in the size of the maximum TLP size or when the threshold value is exceeded.

Abstract: Systems and methods for adaptively provisioning a distributed event data store of a multi-tenant architecture are provided. According to one embodiment, a managed security service provider (MSSP) maintains a distributed event data store on behalf of each tenant of the MSSP. For each tenant, the MSSP periodically determines a provisioning status for a current active partition of the distributed event data store of the tenant. Further, when the determining indicates an under-provisioning condition exits, the MSSP dynamically increases number of resource provision units (RPUs) to be used for a new partition to be added to the partitions for the tenant by a first adjustment ratio. While, when the determining indicates an over-provisioning condition exists, the MSSP dynamically decreases the number of RPUs to be used for subsequent partitions added to the partitions for the tenant by a second adjustment ratio.

Abstract: A system, method and apparatus to record a file in a file system that is mounted in a secure section of a memory device. The memory device authenticates a requester to write data into secure section based on whether the requester is in possession of a cryptographic key. Nonprivileged modules of the operation system can write into a nonsecure section of the memory device. Requests to write or change a file can be recorded by nonprivileged modules into the nonsecure section for subsequent committing into the file system. In response to a request to commit the file, a security manager having the cryptographic key is called to identify, based on the records in the nonsecure section, data eligible to be written into the secure section. The security manager can generate commands, signed using the cryptographic key, to write the content of the file into the secure memory section.

Abstract: Each redundancy group is constituted by one active program (storage control software of the active program) and N standby programs (N is an integer of two or more). Each of the N standby programs is associated with a priority to be determined as a failover (FO) destination. In the same redundancy group, FO is performed from the active program to the standby program based on the priority. For the plurality of pieces of storage control software including the active programs and the standby programs that change to be active by FO in the plurality of redundancy groups arranged in the same node, standby storage control software that can set each of the programs as a FO destination are arranged in different nodes.

Abstract: An integrated circuit (IC) includes a memory manager having a plurality of memory ports, each configured to communicate with a corresponding floating memory block. The IC includes a first interconnect for a first domain, wherein the first interconnect has a first set of fixed ports configured to communicate with memory blocks dedicated to the first domain and a first set of floating ports configured to communicate with the memory manager, and a second interconnect for a second domain, wherein the second interconnect has a second set of fixed ports configured to communicate with memory blocks dedicated to the second domain and a second set of floating ports configured to communicate with the memory manager. The memory manager is configured to allocate a first portion of the memory ports to the first set of floating ports and a second portion of the memory ports to the second set of floating ports.

Abstract: This invention provides a storage system enabling it to properly rebuild a storage device involved in failure. In the storage system, a controller repairs data for which an access request has been issued, returns a reply to the source of the access request, and stores the repaired data. As regards data for which access is not requested, the controller executes rebuilding of storage regions corresponding to rebuild management units in priority-based order and changes priority for executing the rebuilding, based on access frequencies for a first period and access frequencies for a second period that is shorter than the first period.

Abstract: A memory controller for use in a memory system includes: a central processing unit configured to generate commands in response to a request received from a host; and a queue controller configured to queue the commands in order of similar operation times.

Abstract: Techniques facilitating hardware-based memory-error mitigation for heap-objects. In one example, a system can comprise a process that executes computer executable components stored in a non-transitory computer readable medium. The computer executable components comprise: an entry component; and a re-purpose component. The entry component can allocate an entry in a table to store bounds-information when an object is allocated in memory. The re-purpose component can re-purpose unused bits of an object address to store an index to the table entry.

Abstract: Techniques for managing storage may comprise: receiving a request for a first amount of free capacity, wherein the request includes a first priority denoting a purpose for which the first amount of free capacity is requested; determining whether a current utilization of storage exceeds a first threshold associated with the first priority; responsive to determining the current utilization of storage is less than the first threshold associated with the first priority, performing first processing including: determining whether there is a sufficient amount of existing free capacity to grant the first amount; and responsive to determining there is a sufficient amount of existing free capacity to grant the first amount, granting the first amount of free capacity; and responsive to determining the current utilization of storage is not less than the first threshold associated with the first priority, rejecting the request and not granting the first amount of free capacity.

Abstract: A method includes obtaining, by a computing device of a storage network, data for storage and interpreting metadata associated with the data to determine data storage requirements. The method further includes selecting a plurality of storage units of the storage network as target storage units based on the data storage requirements and a storage sequence and transmitting a solicitation message to the target storage units. The method further includes receiving favorable responses from at least some of target storage units, selecting storage units from the at least some of the target storage units to produce a set of selected storage units, determining an error coding dispersal storage function, encoding a data segment of the data in accordance with the error coding dispersal storage function to produce a plurality of encoded data slices, and outputting the plurality of encoded data slices to the set of selected storage units for storage therein.

Abstract: Synchronous replication end to end latency reporting is disclosed. In various embodiments, performance data associated with processing and replicating synchronously file system operation requests from a primary storage system to a secondary storage system is received from a data storage system via a communication interface. Performance data associated with an application-level workload is aggregated. A representation of the aggregated performance data for the application-level workload is provided via a user interface.

Abstract: A method and system for storage load balancing based on virtual synthetics metadata. When storing data onto a storage cluster, data submitted thereto may often be distributed unevenly across the constituent storage nodes thereof. To address the issue, some form of load balancing (or re-distribution of data) across the storage nodes may be implemented. Existing load balancing techniques, however, tend to migrate data between storage nodes without consideration for the efficient utilization of available storage space on the storage node where the data ends up (or destination storage node). Accordingly, the disclosed method and system propose a load balancing mechanism whereby the migrated data dedupes well, thereby securing the efficient consumption of storage space on the destination storage node.

Abstract: A memory system includes a plurality of physical memories and a memory controller. The memory controller is configured to configure one or more logical memories used by one or more programs, respectively, to which areas of the plurality of physical memories are allocated. The memory controller is configured to calculate first data indicating a response performance of the plurality of physical memories, calculate second data indicating a degree of influence of waiting for access to the one or more logical memories, the degree of influence being on a processing performance of the one or more programs, and control allocation of the areas of the plurality of physical memories to the one or more logical memories on the basis of the first data and the second data.

Abstract: A configurable logic platform may include a physical interconnect for connecting to a processing system, first and second reconfigurable logic regions, a configuration port for applying configuration data to the first and second reconfigurable logic regions, and a reconfiguration logic function accessible via transactions of the physical interconnect, the reconfiguration logic function providing restricted access to the configuration port from the physical interconnect. The platform may include a first interface function providing an interface to the first reconfigurable logic region and a second interface function providing an interface to the first reconfigurable logic region. The first and second interface functions may allow information to be transmitted over the physical interconnect and prevent the respective reconfigurable logic region from directly accessing the physical interconnect.

Abstract: Embodiments of the present disclosure relate to a method, a device, and a computer program product for managing a storage system. The method for managing a storage system includes: in response to migration of data from a source storage system to a target storage system, if it is determined that a target client terminal that uses the source storage system to back up data generates data to be backed up, determining whether the amount of data stored in the target storage system for the target client terminal exceeds a threshold; and if it is determined that the amount of data exceeds the threshold, storing the data to be backed up into the target storage system. According to the embodiments of the present disclosure, the data to be backed up can be stored into the target storage system before data of a source storage device is completely migrated to a target storage device.

Abstract: Systems, methods, and computer-readable storage media for receiving, at a central server from a first remote data transmission device, first product data for a product at a first location and second product data for the product from a second remote data transmission device at a second location. The respective data is processed sequentially, then determined to contain identical data, such that the system selects a data transmission device as the leader. Then, at a second time, the system receives receiving additional product data from only the selected data transmission device and not from the ignored transmission device, then processes the additional product data as though it had been received from both the first remote data transmission device and the second remote data transmission device.

Abstract: A method, system and computer program product are disclosed for reducing the memory load time for logic simulator. In an embodiment, the method comprises identifying a memory for a program, and selectively loading onto a logic simulator parts of the memory that are pre-determined as parts of the memory that will be accessed by the program when the program is executed on the simulator. In an embodiment, the selectively loading onto a logic simulator parts of the memory includes pre-determining subsets of the memory that will be accessed by the program when the program is executed on the simulator, and loading the pre-determined subsets of the memory on the simulator. In an embodiment, the pre-determining subsets of the memory includes using addresses of the memory that are accessed by the program when the program is executed on a computer system, to create the pre-determined subsets of the memory.

Abstract: A method includes identifying an existing logical storage vault having existing dispersed storage coding properties for vault transformation, where a first set of storage units support the existing logical storage vault, and a data object of first data objects stored within the first set of storage units is stored as a first plurality of sets of encoded data slices in accordance with the existing dispersed storage coding properties. The method includes identifying a new logical storage vault having new dispersed storage coding properties, wherein storage units support the new logical storage vault. The method includes transforming the first data objects from being in accordance with the existing dispersed storage coding properties to being in accordance with the new dispersed storage coding properties to produce transformed first data objects. The method includes storing the transformed first data objects in the new logical storage vault supported by the storage units.

Abstract: Data processing apparatus comprises a data access requesting node; data access circuitry to receive a data access request from the data access requesting node and to route the data access request for fulfilment by one or more data storage nodes selected from a group of two or more data storage nodes; and indication circuitry to provide a source indication to the data access requesting node, to indicate an attribute of the one or more data storage nodes which fulfilled the data access request; the data access requesting node being configured to vary its operation in response to the source indication.

Abstract: A method, a system, and an article are provided for managing a file cache for a client application. An example computer-implemented method can include: storing a plurality of files in a memory on a client device for a client application; identifying a first portion of the files in the memory as having been used during a previous run of the client application; receiving, from at least one server, one or more lists of files to be used during a current run of the client application; identifying a second portion of the files in the memory as not being included in at least one of the first portion and the one or more lists of files from the at least one server; and removing, from the memory, at least a subset of the second portion of the files during the current run of the client application.

Abstract: A method includes obtaining a data, applying an erasure coding procedure to the data to obtain a plurality of data chunks and at least one parity chunk, deduplicating the plurality of data chunks to obtain a plurality of deduplicated data chunks, and storing, across a plurality of nodes, the plurality of deduplicated data chunks and the at least one parity chunk.

Abstract: A method for a transactional commit in a storage unit is provided. The method includes receiving a logical record from a storage node into a transaction engine of a storage unit of the storage node and writing the logical record into a data structure of the transaction engine. The method includes writing, to a command queue of the transaction engine, an indication to perform an atomic update using the logical record and transferring each portion of the logical record from the data structure of the transaction engine to non-persistent memory of the storage unit as a committed transaction. A storage unit for a storage system is also provided.

Abstract: A background operation is internally triggered by firmware of a disk drive. During a training phase defined by a first time period, access latency of host commands is monitored during rotational position sorting command selection. During a sorting phase after the training phase, a sorting threshold is defined based on the access latencies measured during the training phase. The background command is selected for execution in the sorting phase if the seek and rotational latency is less than the sorting threshold.

Abstract: Various embodiments are provided for managing multiport banked memory arrays in a computing system by a processor. One or more conflicts may be eliminated in a multiport banked memory array upon receiving one or more write operations, read operations, or a combination thereof according to a selected priority and access protocol.

Abstract: A method of controlling a first memory controller that controls a non-volatile memory device includes: the first memory controller receiving first data and a first physical address from a second memory controller via a first interface of the first memory controller; the first memory controller storing the first data in a non-volatile memory buffer of the first memory controller; and the first memory controller programming the first data stored in the non-volatile memory buffer in a first physical region of the non-volatile memory device corresponding to the first physical address.

Abstract: A number of promotions that share a common attribute may be grouped into a common promotion collection. A promotion collection may then be analyzed to determine a score for the promotion collection. A number of promotion collections may be compared against each other based on a respective score for each promotion collection, and a number of promotion collections may be selected based on the comparison.

Abstract: Various implementations described herein are related to a device having a bitcell. The device may include horizontal bitlines coupled to the bitcell. The horizontal bitlines may include multiple first read bitlines disposed in a horizontal direction with respect to the bitcell. The device may include vertical bitlines coupled to the bitcell. The vertical bitlines may include multiple second read bitlines disposed in a vertical direction with respect to the bitcell.

Abstract: A storage device, a controller and a method for operating a controller are disclosed. The controller includes a descriptor storage circuit configured to store at least one descriptor corresponding to a command received from a host in one descriptor queue among N (N is a natural number) number of descriptor queues; a descriptor queue selection circuit configured to select one descriptor queue among the descriptor queues, as a target descriptor queue; and a descriptor execution control circuit configured to determine whether an operation indicated by a first descriptor stored in the target descriptor queue is executable, based on information on an available power budget and information on a power consumption amount for the first descriptor, and, when the operation indicated by the first descriptor is executable, control whether to execute an operation indicated by a second descriptor stored together with the first descriptor in the target descriptor queue.

Abstract: Apparatus and methods are disclosed, including identifying inactive data in a group of volatile memory cells of a host device, assembling identified inactive data in an offload unit of the group of volatile memory cells, and writing the offload unit of inactive data to a group of non-volatile memory cells of a storage system when the amount of inactive data in the offload unit reaches a threshold.

Abstract: A processing device is configured to receive a plurality of input-output requests in a storage system, the input-output requests comprising read requests and write requests, to determine priorities of respective ones of the read requests, to place one or more of the read requests each having a relatively low priority in a first one of a plurality of queues in one of a plurality of processing cores of the storage system, to place one or more of the read requests each having a relatively high priority in a second one of the plurality of queues in the processing core, and to place the write requests in the first queue. The storage system services the read requests and the write requests from their corresponding ones of the first and second queues, illustratively resulting in reduced read latency for one or more relatively high priority read requests placed in the second queue.

Abstract: A memory system includes a nonvolatile memory that has a plurality of physical blocks, and a memory controller circuit configured to execute encoding of data to be written in the nonvolatile memory and decoding of data read from the nonvolatile memory, execute garbage collection for the nonvolatile memory, and determine whether or not decoding and encoding is to be executed, for data which is read from a valid cluster of a physical block targeted for garbage collection.

Abstract: A processing device in a memory system provides an execution grant to a first queue of a plurality of queues, the first queue storing a first plurality of memory commands to be executed on the memory component. The processing device further determines whether a number of commands from the first queue that have been executed since the first queue received the execution grant satisfies an executed transaction threshold criterion and whether a number of pending commands in a second queue of the plurality of queues satisfies a promotion threshold criterion, the second queue storing a second plurality of memory commands to be executed on the memory component. Responsive to at least one of the executed transaction threshold criterion or the promotion threshold criterion being satisfied, the processing device provides the execution grant to the second queue.

Abstract: A method and system are provided for implementing virtual machine (VM) memory right-sizing using VM memory compression. VM memory right-sizing includes monitoring VM memory utilization relative to a memory utilization up-size threshold and a memory utilization down-size threshold for the VM, and a current memory compression factor of total effective memory based on compression. When the VM is above the memory utilization up-size threshold and at a maximum memory allocation, a memory compression factor is increased. When the VM is below the memory utilization down-size threshold and the current memory compression factor is greater than one, the memory compression factor is decreased.

Abstract: A memory system may be provided. The memory system may include a memory buffer chip coupled to one or more memory chips. The memory system may include a memory controller configured to control the memory buffer chip to input/output data to/from the one or two or more memory chips. The memory buffer chip may include a first interface configured to transmit/receive a signal to/from the memory controller. The memory buffer chip may include a second interface configured to transmit/receive a signal to/from the memory chip. The memory buffer chip may include a command buffer configured to buffer commands received from the memory controller through the first interface. The memory buffer chip may include a read buffer configured to buffer read data received from the memory chip.

Abstract: For a database accessible by a plurality of separate organizations, a system is provided for predicting entities for database query results. The system includes a multi-layer neural network. The system is configured to receive a query encoding for one or more previous queries made into the database, a user entity view frequency encoding for a frequency of views by one or more users, and an organization encoding for one or more separate organizations accessing the database; and based on the query encoding, the user entity view frequency encoding, and the organization encoding, generate a neural model for predicting entities for results to a present query into the database. In some embodiments, the neural model is global across the separate organizations accessing the database.

Abstract: A data storage device includes a controller including a flash translation layer (FTL) for controlling an operation of a nonvolatile memory device. The FTL may monitor a first read operation on the plurality of data storage regions, collect first read operation information of a first subset of data storage regions on which the first read operation is performed, the first read operation information including read counts of the first subset of data storage regions on which the first read operation is performed, and information of the first subset of data storage regions on whether soft decision has been performed on the data storage regions, change a garbage collection (GC) threshold value based on the collected first read operation information, and control the nonvolatile memory device to perform GC on the plurality of data storage regions based on the changed GC threshold value.

Abstract: Systems, methods, and computer-readable media for migrating an application container between nodes in a network are disclosed. An interest for an application container may be received by an origin node and, in response, the origin node may transfer a copy of the application container over the network and to a destination node. The origin node can then shut down the application container and transmit any remaining container state and received requests to the destination node. The destination node may then update a routing plane for the network to provide delivery of service requests to the migrated application.

Abstract: Memory management is provided which includes a page replacement process managed by a storage manager and a workload manager. The page replacement process swaps out the content associated with a frame of physical memory to an auxiliary storage in order to provide a free frame. The memory management process includes: determining that the physical memory runs out of free frames; providing priority information from the workload manager to the storage manager, the priority information indicating the priority or business relevance of a certain process; selecting one or more pages to be swapped to the auxiliary storage based on the priority information; and swapping out the contents of the one or more selected pages to the auxiliary storage.

Abstract: A method for controlling a web application state in a micro-service architecture may be provided. The method loading a current state of the web application via a server-side state micro-service from a server state store upon a navigation to a website relating to a server-side micro-service of the web application. The method also comprises triggering a state change of the web application by a user interface control of the client user interface component, transmitting the changed state from the server-side micro-service of the web application to the server-side state micro-service, managing the changed state by the server-side state micro-service together with a state identifier in a server state store, transmitting the changed state and the state identifier from the server-side state micro-service to the state client, and notifying the client user interface component about the changed state.

Abstract: Examples of techniques for hardware thread switching for scheduling policy in a processor are described herein. An aspect includes, based on receiving a request from a first software thread to dispatch to a first hardware thread, determining that the first hardware thread is occupied by a second software thread that has a higher priority than the first software thread. Another aspect includes issuing an interrupt to switch the second software thread from the first hardware thread to a second hardware thread. Another aspect includes, based on switching of the second software thread from the first hardware thread to the second hardware thread, dispatching the first software thread to the first hardware thread.

Abstract: A memory device includes a memory array including a plurality of memory components; and a controller coupled to the memory array, the controller configured to: determine a set of transactions to be implemented across two or more memory components according to an initial schedule; calculate a first plurality of power consumption levels corresponding to the initial schedule; and if one or more of the power consumption levels exceed a predetermined threshold, calculate an updated schedule for implementing the set of transactions across the two or more memory components, wherein the updated schedule corresponds to a second plurality of power consumption levels that are all at or below the predetermined threshold.