Based On Component Size Patents (Class 711/172)
  • Patent number: 8935500
    Abstract: Distributed storage resources having multiple storage units are managed based on data collected from online monitoring of workloads on the storage units and performance characteristics of the storage units. The collected data is sampled at discrete time intervals over a time period of interest, such as a congested time period. Normalized load metrics are computed for each storage unit based on time-correlated sums of the workloads running on the storage unit over the time period of interest and the performance characteristic of the storage unit. Workloads that are migration candidates and storage units that are migration destinations are determined from a representative value of the computed normalized load metrics, which may be the 90th percentile value or a weighted sum of two or more different percentile values.
    Type: Grant
    Filed: November 10, 2011
    Date of Patent: January 13, 2015
    Assignee: VMware, Inc.
    Inventors: Ajay Gulati, Irfan Ahmad, Carl A. Waldspurger, Chethan Kumar
  • Patent number: 8924683
    Abstract: The relay unit splits the storage area in the buffer into a plurality of partitioned areas, manages the same and, upon receiving a read request from the access request source, selects and allocates one or more from the plurality of partitioned areas and, on condition that the relevant partitioned areas are allocated, transmits the read request to the memory control unit, wherein the memory control unit reads the data requested in the received read request from the memory, splits the data which is read into a plurality of units, and transmits the same to the relay unit, wherein the relay unit stores each of the data transmitted from the memory control unit in each of the allocated partitioned areas sequentially, on condition that all of the data is stored, reads each of the data from each of the allocated partitioned areas, compiles each of the data which is read into one, transmits the same as read data to the access request source, and releases all of the respective allocated partitioned areas.
    Type: Grant
    Filed: April 21, 2011
    Date of Patent: December 30, 2014
    Assignee: Hitachi, Ltd.
    Inventor: Shuntaro Seno
  • Patent number: 8907964
    Abstract: A system to process a plurality of vertices to model an object. An embodiment of the system includes a processor, a front end unit coupled to the processor, and cache configuration logic coupled to the front end unit and the processor. The processor is configured to process the plurality of vertices. The front end unit is configured to communicate vertex data to the processor. The cache configuration logic is configured to establish a cache line size of a vertex cache based on a vertex size of a drawing command.
    Type: Grant
    Filed: April 10, 2007
    Date of Patent: December 9, 2014
    Assignee: Vivante Corporation
    Inventors: Keith Lee, Mike M. Cai
  • Patent number: 8904144
    Abstract: Methods and systems for determining at risk indexes of a plurality of storage containers in a data storage system are disclosed. The available allocated capacities of the storage containers are determined and converted to respective allocated capacities in time periods. The available unallocated capacities of the storage containers are determined and converted to respective unallocated capacities in time periods. The at risk indexes of the storage containers are determined from the sum of the respective allocated capacity in time periods and the respective unallocated capacity in time periods.
    Type: Grant
    Filed: May 24, 2012
    Date of Patent: December 2, 2014
    Assignee: NetApp, Inc.
    Inventor: Raja S. Chelur
  • Patent number: 8904098
    Abstract: Data stored in a volatile memory subsystem is backed up redundantly into first and second channels of a non-volatile memory subsystem. The data is retrieved from the volatile memory subsystem upon detection of a trigger condition indicative of real or imminent power loss or reduction and multiple copies are stored in dedicated non-volatile memory channels. The stored copies may be error checked and corrected, and re-written if necessary. The redundantly backed up data can be subsequently retrieved from the non-volatile memory subsystem, error-corrected, and an error-free copy communicated to the volatile memory subsystem.
    Type: Grant
    Filed: September 24, 2012
    Date of Patent: December 2, 2014
    Assignee: Netlist, Inc.
    Inventors: Mike Hossein Amidi, Chi-She Chen, Jeffrey C. Solomon, Scott H. Milton, Jayesh Bhakta
  • Patent number: 8904091
    Abstract: A data storage system is disclosed that utilizes high performance media manager transport architecture. In one embodiment, solid-state memory is connected via a bridge interface and media manager transport architecture optimizes the transfer and throughput of data communicated across the bridge. Media transport manager architecture can support reordering and interleaving of storage access commands by using priority and staging mechanisms. Balanced load of solid-state memory, parallel execution of storage access operations, improved concurrency, and increased performance can be attained.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: December 2, 2014
    Assignee: Western Digital Technologies, Inc.
    Inventors: Chandra M. Guda, Gregory B. Thelin
  • Patent number: 8904103
    Abstract: A data processing apparatus includes a calculating unit configured to calculate a compression ratio when a block selected from among the plurality of blocks is compressed; a determining unit configured to determine whether a block is to be compressed by comparing the calculated compression ratio with a threshold; a recording unit configured to record the block on the storage device in a compressed or uncompressed state on a basis of a result of the determination; a management information creating unit configured to create a management information in association with data identification information for identifying the data, state information indicating a compressed or uncompressed state is recorded to the management information in association with each block, when the each block is recorded on the storage device; and a storage processing unit configured to store the management information created by the management information creating unit on a memory.
    Type: Grant
    Filed: November 8, 2011
    Date of Patent: December 2, 2014
    Assignee: Fujitsu Limited
    Inventor: Yukio Taniyama
  • Patent number: 8904099
    Abstract: Certain embodiments described herein include a memory system having a volatile memory subsystem, a non-volatile memory subsystem, a controller coupled to the non-volatile memory subsystem, and a circuit coupled to the volatile memory subsystem, to the controller, and to a host system. In a first mode of operation, the circuit is operable to selectively isolate the controller from the volatile memory subsystem, and to selectively couple the volatile memory subsystem to the host system to allow data to be communicated between the volatile memory subsystem and the host system. In a second mode of operation, the circuit is operable to selectively couple the controller to the volatile memory subsystem to allow data to be communicated between the volatile memory subsystem and the nonvolatile memory subsystem using the controller, and the circuit is operable to selectively isolate the volatile memory subsystem from the host system.
    Type: Grant
    Filed: February 5, 2014
    Date of Patent: December 2, 2014
    Assignee: Netlist, Inc.
    Inventors: Chi-She Chen, Jeffrey C. Solomon, Scott H. Milton, Jayesh Bhakta
  • Patent number: 8904145
    Abstract: Acceptable memory allocation for a partition is determined during and with minimal impact on normal operation of the partitioned system. The approach includes: collecting, by a processor, statistics on a rate at which pages are transferred between uncompressed and compressed memory spaces of the partition's memory; adjusting size of the uncompressed memory space; and subsequent to the adjusting, continuing with collecting of the statistics, and referencing the resultant statistics in determining an acceptable memory allocation for the partition. In one implementation, the adjusting includes stepwise decreasing size of the uncompressed memory space by reallocating uncompressed memory space to compressed memory space, and repeating the collecting of statistics for a defined measurement period for each adjusted uncompressed memory space size until performance of the partition is negatively impacted by the reallocation of uncompressed memory space to compressed memory space.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: December 2, 2014
    Assignee: International Business Machines Corporation
    Inventors: Mark R. Funk, Vernon R. Pahl, Ronald D. Young
  • Patent number: 8904067
    Abstract: An adaptive multi-thread buffer supports multiple writer process and reader processes simultaneously without blocking. Writer processes are assigned a reserved write slot using a writer index that is incremented for each write request. When a reserved write slot is not null, the buffer is resized to make room for new data. Reader processes are assigned a reserved read slot using a reader index that is incremented for each read request. When data is read out to the reader process, the read slot content is set to null. When a writer process attempts to write null data to a write slot, the buffer replaces the null write data with an empty value object so that content of the buffer is null only for empty slots. When an empty value object is read from a slot, the buffer replaces the content with null data to send to the reader process.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: December 2, 2014
    Assignee: Microsoft Corporation
    Inventor: Erwien Saputra
  • Patent number: 8893161
    Abstract: A technique to suppress a remote procedure call from a client by a server is provided. An information processing system is provided that includes a client component and a server component, wherein a program of the client component makes an RPC for a function of the server component. The client component includes a holding unit that holds return value information of the function, and a calling unit that receives an RPC request for the function from the program. The server component includes an execution unit that returns a return value of the function to set return value information. When the return value information has not been set in the holding unit, the calling unit makes an RPC for the function. When the return value information has been set in the holding unit, the calling unit returns the return value included in the return value information without making an RPC.
    Type: Grant
    Filed: February 20, 2013
    Date of Patent: November 18, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventor: Masataro Shiroiwa
  • Patent number: 8880858
    Abstract: Illustrative embodiments include a method, system, and computer program product for estimating boot-time memory requirement of a data processing system. A data processing system identifies, using system configuration information associated with the data processing system, a set of components needed for booting up the data processing system. The data processing system determines a dependency of a component identified in the set of components, the component including a memory estimator program. The data processing system determines an ancestry of the component identified in the set of components. The data processing system receives, using the memory estimator program of the component, a boot-time memory requirement of the component. The data processing system calculates a total boot-time memory requirement. The data processing system determines whether an amount of real memory of the data processing system satisfies the total boot-time memory requirement.
    Type: Grant
    Filed: May 6, 2011
    Date of Patent: November 4, 2014
    Assignee: International Business Machines Corporation
    Inventors: Vishal Chittranjan Aslot, Adekunle Bello, Liang Jiang
  • Patent number: 8880838
    Abstract: A method of allocating data to a storage block included in a storage network may include determining a plurality of characteristics associated with a storage block included in a storage network. The plurality of characteristics may include storage capacity of the storage block, available storage space of the storage block, likelihood of loss of data stored on the storage block, availability of the storage block with respect to the storage network, and use of the storage block. The method may further include allocating data to the storage block based on the plurality of characteristics.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: November 4, 2014
    Assignee: Lyve Minds, Inc.
    Inventors: Christian M. Kaiser, Peter D. Stout, Ain McKendrick, Timothy Bucher, Jeff Ma, Randeep Singh Gakhal, Rick Pasetto, Stephen Sewerynek
  • Patent number: 8880837
    Abstract: Provided are a computer program product, system, and method for preemptively allocating extents to a data set in a storage system. A data set is comprised of a plurality of extents configured in at least one volume in the storage system. A first extent is allocated to the data set in a first volume to extend the data set. A determination is made as to whether a second extent can be allocated to the data set in the first volume in response to the allocating of the first extent. The second extent in a second volume is allocated for the data set in response to determining that the second extent cannot be allocated to the data set in the first volume.
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: November 4, 2014
    Assignee: International Business Machines Corporation
    Inventors: Kyle B. Dudgeon, David C. Reed, Esteban Rios, Max D. Smith
  • Patent number: 8880791
    Abstract: Certain embodiments described herein include a memory system having a register coupled to a host system and operable to receive address and control signals from the host system, a volatile memory subsystem, a non-volatile memory subsystem, a controller coupled to the non-volatile memory subsystem, and a circuit coupled to the register, the volatile memory subsystem, and the controller. In a first mode of operation, the circuit is operable to selectively isolate the controller from the volatile memory subsystem, and to selectively couple the volatile memory subsystem to the register to allow data to be communicated between the volatile memory subsystem and the host system. In a second mode of operation, the circuit is operable to selectively couple the controller to the volatile memory subsystem to allow data to be communicated between the volatile memory subsystem and the non-volatile memory subsystem using the controller, and is operable to selectively isolate the volatile memory subsystem from the register.
    Type: Grant
    Filed: February 5, 2014
    Date of Patent: November 4, 2014
    Assignee: Netlist, Inc.
    Inventors: Chi-She Chen, Jeffrey C. Solomon, Scott H. Milton, Jayesh Bhakta
  • Patent number: 8880792
    Abstract: A method can include receiving memory configuration information that specifies a memory configuration; receiving memory usage information for the memory configuration; analyzing the received memory usage information for a period of time; and, responsive to the analyzing, controlling notification circuitry configured to display a graphical user interface that presents information for physically altering a specified memory configuration. Various other apparatuses, systems, methods, etc., are also disclosed.
    Type: Grant
    Filed: January 13, 2012
    Date of Patent: November 4, 2014
    Assignee: Lenovo (Singapore) Pte. Ltd.
    Inventors: Arnold S. Weksler, Rod D. Waltermann, John Carl Mese, Nathan J. Peterson
  • Patent number: 8868829
    Abstract: A method includes presenting multiple memory circuits to a system as a virtual memory circuit having at least one characteristic that is different from a corresponding characteristic of one of the physical memory circuits; receiving, at an interface circuit, a first command issued from the system to the virtual memory circuit; and in response to receiving the first command, 1) directing a copy of the first command to a first physical memory circuit of the multiple physical memory circuits, and 2) performing a power-saving operation on at least one other physical memory circuit of the multiple physical memory circuits.
    Type: Grant
    Filed: February 6, 2012
    Date of Patent: October 21, 2014
    Assignee: Google Inc.
    Inventors: Suresh Natarajan Rajan, Keith R. Schakel, Michael John Sebastian Smith, David T. Wang, Frederick Daniel Weber
  • Patent number: 8861013
    Abstract: A CPU perform the steps of: (a) causing a compression/decompression processor to decompress the compressed data of one of three bands in the data area except for the first block in the band, and storing decompressed bitmap data in the data area; (b) rasterizing each of the intermediate data blocks in the band and synthesizing the rasterized data and the decompressed bitmap data in the band; and (c) causing the compression/decompression processor to compress the synthesized bitmap data and storing the compressed data in the data area. The CPU performs the steps (a) to (c) in different respective tasks in parallel, and performs the steps (a) to (c) along the order of (a), (b), (c) for each of the intermediate code blocks in each of the bands while using the 1st to the 3rd bitmap data area in turn for each of the steps (a) to (c).
    Type: Grant
    Filed: November 10, 2013
    Date of Patent: October 14, 2014
    Assignee: Kyocera Document Solutions Inc.
    Inventor: Hiroyuki Hara
  • Patent number: 8856293
    Abstract: A network-attached storage (NAS) device comprises an operational state comprising first system settings; a network interface configured to couple to a network and a processor coupled to the network interface. The processor may be configured to identify a NAS configuration image stored on an externally accessible storage device, the NAS configuration image comprising second system settings created from an other NAS device on the network; determine that the NAS configuration image is compatible with the NAS device; receive a copy of the NAS configuration image; compare the second system settings with the first system settings to identify compatible system settings, and modify the first system settings based on the compatible system settings.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: October 7, 2014
    Assignee: Western Digital Technologies, Inc.
    Inventor: Nauzad Sadry
  • Patent number: 8856425
    Abstract: A method for performing meta block management is provided. The method is applied to a controller of a Flash memory having multiple channels, where the Flash memory includes a plurality of blocks respectively corresponding to the channels. The method includes: utilizing a meta block mapping table to store block grouping relationships respectively corresponding to a plurality of meta blocks, where blocks in each meta block respectively correspond to the channels; and when it is detected that a specific block corresponding to a specific channel within a meta block does not have remaining space for programming, according to the meta block mapping table, utilizing at least one blank block corresponding to the specific channel within at least one other meta block as extension of the specific block, for use of further programming. An associated memory device and a controller thereof are also provided.
    Type: Grant
    Filed: July 12, 2011
    Date of Patent: October 7, 2014
    Assignee: Silicon Motion Inc.
    Inventor: Yang-Chih Shen
  • Patent number: 8856484
    Abstract: A storage system and a method for managing a memory capable of storing metadata related to logical volume sets, are disclosed. A memory quota is assigned to a metadata related to a logical volume set. The size of a memory currently consumed by the metadata is monitored. Upon exceeding a threshold by the size of the monitored memory, at least one restraining action related to memory consumption by the metadata is applied.
    Type: Grant
    Filed: August 14, 2012
    Date of Patent: October 7, 2014
    Assignee: Infinidat Ltd.
    Inventors: Ido Ben-Tsion, Efraim Zeidner
  • Patent number: 8856485
    Abstract: A storage method and system where the storage system includes a plurality of servers and a control server configured to select a storage area available to be used by each of the servers from among storage areas of a group of storage devices sharable among the plurality of servers. The system includes, a detecting unit configured to detect an available capacity of a specified storage device other than the storage group, where the specified storage device is designated for use only by a specified server selected from among the servers, a specifying unit configured to specify an available area corresponding to the available capacity detected from the specified storage device through the detecting unit, and a setting unit configured to set the specified available area to a shared storage area that is available to be shared among the server.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: October 7, 2014
    Assignee: Fujitsu Limited
    Inventors: Kosuke Uchida, Yasuo Noguchi
  • Patent number: 8850156
    Abstract: A method for managing Virtual Machine (VM) storage space is provided. In the method, a Storage Balloon Agent (SBA) module deployed in a VM is adopted to directly acquire virtual storage free block information and deliver the acquired virtual storage free block information to a Storage Balloon Daemon (SBD) module deployed in a Virtual Machine Monitor (VMM) layer; and the SBD module releases a part or all of physical storage space corresponding to the virtual storage free block information, and marks virtual storage blocks corresponding to the released physical storage space as unavailable. A corresponding system and a physical host are further provided in the present invention. Through the method of an embodiment of the present invention, use condition of virtual storage space can be acquired in real time, and a large number of read and write operations of a storage system can be avoided.
    Type: Grant
    Filed: December 28, 2011
    Date of Patent: September 30, 2014
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Xiaowei Yang, Zhikun Wang
  • Patent number: 8832161
    Abstract: A flash memory card, including a memory and a wireless modem for downloading remote directory listings and media files and streams over the Internet, and a driver for the flash memory card for managing a system of files and directories in the memory, and for invoking an action directed to the wireless modem, wherein the action is associated by the driver with a designated file system command.
    Type: Grant
    Filed: June 21, 2011
    Date of Patent: September 9, 2014
    Assignee: Google Inc.
    Inventors: Itay Sherman, Yaron Segalov
  • Patent number: 8825980
    Abstract: Embodiments of the present invention provide a system, method, and program product for defragmenting files on a hard disk drive. A computer system identifies a plurality of movable blocks on a hard disk drive. The computer system categorizes each of the movable blocks into a category based on the write count of each movable block, wherein the movable blocks categorized into a first category have higher write counts than the movable blocks categorized into a second category. The computer system relocates the movable blocks of the first category to a first group of one or more adjacent tracks, and the computer system relocates the movable blocks of the second category to a second group of one or more adjacent tracks, wherein the first group of one or more adjacent tracks and the second group of one or more adjacent tracks share, at most, one common track.
    Type: Grant
    Filed: March 21, 2012
    Date of Patent: September 2, 2014
    Assignee: International Business Machines Corporation
    Inventors: Sandeep R. Patil, Sriram Ramanathan, Riyazahamad M. Shiraguppi, Matthew B. Trevathan
  • Patent number: 8819366
    Abstract: A data processing device has a processing unit configured to copy data stored in a first memory unit into a second memory unit on a block-by-block basis into which the data is divided by a specific size, a time measuring unit configured to measure an amount of time that the processing unit spends on copying the block and a controller configured to change the size of the block to a size smaller than the current size if the measured amount of time runs up to a specific threshold which is shorter than a timeout time.
    Type: Grant
    Filed: August 18, 2011
    Date of Patent: August 26, 2014
    Assignee: Fujitsu Limited
    Inventor: Koutarou Sasage
  • Patent number: 8819380
    Abstract: Embodiments of the present invention provide a system, method, and program product for allocating a block of physical storage space on a write surface of a hard disk drive. A computer system maintains a write count for each block on the hard disk drive. After receiving an allocation request, the computer system identifies one or more candidate blocks of storage space on the hard disk drive that can be selected to fulfill the allocation request. The computer system determines an estimated write count and identifies one or more allocated blocks whose write counts are within a specified number of write operations of the estimated write count. The computer system selects a candidate block based, at least in part, on physical proximity of the candidate block to one or more of the allocated blocks whose write counts are within a specified number of write operations of the estimated write count.
    Type: Grant
    Filed: March 21, 2012
    Date of Patent: August 26, 2014
    Assignee: International Business Machines Corporation
    Inventors: Sandeep R. Patil, Sriram Ramanathan, Riyazahamad M. Shiraguppi, Matthew B. Trevathan
  • Patent number: 8799613
    Abstract: A system and method are provided for pooling storage devices in a virtual library for performing a storage operation. A storage management device determines a storage characteristic of a plurality of storage devices with respect to performing a storage operation. Based on a storage characteristic relating to performing the storage operation, the storage management device associates at least two storage devices in a virtual library. The storage management device may continuously monitor the virtual library and detect a change in storage characteristics of the storage devices. When changes in storage characteristics are detected, the storage management device may change associations of the storage device in the virtual library.
    Type: Grant
    Filed: March 5, 2013
    Date of Patent: August 5, 2014
    Assignee: CommVault Systems, Inc.
    Inventors: Rajiv Kottomtharayil, Ho-Chi Chen
  • Patent number: 8793466
    Abstract: A data storage system includes a processor, a system memory, and logical extents. Blocks of storage in one or more physical storage devices are allocated to each of the logical extents. The processor maintains a logical container for data objects and the volume includes one or more of the logical extents. The processor stores data objects that are uniquely identified by object identifiers in the logical extents. The processor also maintains a first index that is stored in the system memory and maps a range of the object identifiers to a second index. The second index is also stored in a logical extent and indicates storage locations of the data objects associated with the range of the object identifiers.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: July 29, 2014
    Assignee: NetApp, Inc.
    Inventors: Minglong Shao, Garth R Goodson
  • Publication number: 20140208046
    Abstract: Described embodiments detect an impending out-of-space (OOS) condition of a media. On startup, a media controller determines whether an impending OOS indicator is set from a previous startup. If the impending OOS indicator is not set, it is determined whether a free pool size has reached a threshold. The free pool is blocks of the solid-state media available to be written with data. If the free pool size has not reached the first threshold, while the startup time is less than a maximum startup time, garbage collection is performed on the solid-state media to accumulate blocks to the free pool. If the startup time reaches the maximum startup time and the free pool size has not reached the threshold, the impending OOS indicator is set and the media is operated in impending OOS mode. Otherwise, if the free pool size reaches the threshold, the media is operated in normal mode.
    Type: Application
    Filed: January 23, 2013
    Publication date: July 24, 2014
    Applicant: LSI CORPORATION
    Inventors: Leonid Baryudin, Earl T. Cohen
  • Patent number: 8788785
    Abstract: A computer-implemented method for preventing heap-spray attacks may include identifying an object-oriented program. The computer-implemented method may also include identifying, within the object-oriented program, a request to allocate memory for a polymorphic object. The polymorphic object may include a pointer to a virtual method table that supports dynamic dispatch for at least one method of the polymorphic object. The computer-implemented method may further include identifying an area of memory reserved for polymorphic objects. The computer-implemented method may additionally include allocating memory for the polymorphic object from the reserved area of memory. Various other methods, systems, and computer-readable media are also disclosed.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: July 22, 2014
    Assignee: Symantec Corporation
    Inventor: Uri Mann
  • Patent number: 8775763
    Abstract: The present invention provides techniques for assignment and layout of redundant data in data storage system. In one aspect, the data storage system stores a number M of replicas of the data. Nodes that have sufficient resources available to accommodate a requirement of data to be assigned to the system are identified. When the number of nodes is greater than M, the data is assigned to M randomly selected nodes from among those identified. The data to be assigned may include a group of data segments and when the number of nodes is less than M, the group is divided to form a group of data segments having a reduced requirement. Nodes are then identified that have sufficient resources available to accommodate the reduced requirement. In other aspects, techniques are providing for adding a new storage device node to a data storage system having a plurality of existing storage device nodes and for removing data from a storage device node in such a data storage system.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: July 8, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Arif Merchant, Svend Frolund, Yasusuhi Saito, Susan Spence, Alistair Veitch
  • Patent number: 8762532
    Abstract: Incoming data frames are parsed by a hardware component. Headers are extracted and stored in a first location along with a pointer to the associated payload. Payloads are stored in a single, contiguous memory location.
    Type: Grant
    Filed: August 13, 2009
    Date of Patent: June 24, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Mathias Kohlenz, Idreas Mir, Irfan Anwar Khan, Madhusudan Sathyanarayan, Shailesh Maheshwari, Srividhya Krishnamoorthy, Sandeep Urgaonkar, Thomas Klingenbrunn, Tim Tynghuei Liou
  • Patent number: 8751750
    Abstract: A deleted cache determining part determines a cache data which is to be deleted from a data storing part in a case where a sum of a data amount of a data which is recorded to the data storing part and a data amount of a cache data which is stored to the data storing part and a data amount of a buffer data which is stored to the storing part is equal to or more than a predetermined threshold, and an accumulated data control part deletes the cache data which is determined by the deleted cache determining part from the data storing part.
    Type: Grant
    Filed: January 13, 2012
    Date of Patent: June 10, 2014
    Assignee: NEC Corporation
    Inventor: Toru Osuga
  • Publication number: 20140156965
    Abstract: Techniques are disclosed relating to reclaiming data on recording media. In one embodiment, an apparatus has a solid-state memory array including a plurality of blocks. The solid-state memory array may implement a cache for one or more storage devices. Respective operational effects are determined relating to reclaiming ones of the plurality of blocks. One of the plurality of blocks is selected as a candidate for reclamation based on the determined operational effects, and the selected block is reclaimed. In some embodiments, the determined operational effects for a given block indicate a number of write operations to be performed to reclaim the given block. In some embodiments, operational effects are determined based on criteria relating to assigned quality-of-service levels. In some embodiments, operational effects are determined based on information relating virtual storage units.
    Type: Application
    Filed: February 4, 2013
    Publication date: June 5, 2014
    Applicant: FUSION-IO, INC.
    Inventors: Jingpei Yang, Ned D. Plasson, Nisha Talagala, Dhananjoy Das, Swaminathan Sundararaman
  • Patent number: 8738885
    Abstract: The invention relates to a method for selecting an available memory size of a circuit including at least a CPU and a total memory, the method includes a stage for the selection of an available memory size that is smaller than or equal to that of the total memory. The selection stage is implemented by the manufacturer of the product incorporating the said circuit, different from the circuit manufacturer, and includes a stage for the generation of a configuration signature intended for the circuit manufacturer, which information is representative of the size of available memory size selected in this way by the product manufacturer.
    Type: Grant
    Filed: February 9, 2010
    Date of Patent: May 27, 2014
    Assignee: Gemalto SA
    Inventor: Benoit Arnal
  • Patent number: 8738880
    Abstract: Method, system, and computer program product embodiments for throttling storage initialization for data destage in a computing storage environment are provided. An implicit throttling operation is performed by limiting a finite resource of a plurality of finite resources available to a background initialization process, the background initialization process adapted for performing the storage initialization ahead of a data destage request. If a predefined percentage of the plurality of finite resources is utilized, at least one of the plurality of finite resources is deferred to a foreground process that is triggered by the data destage request, the foreground process adapted to perform the storage initialization ahead of a data destage performed pursuant to the data destage request. An explicit throttling operation is performed by examining a snapshot of storage activity occurring outside the background initialization process.
    Type: Grant
    Filed: August 17, 2010
    Date of Patent: May 27, 2014
    Assignee: International Business Machines Corporation
    Inventors: Ellen J. Grusy, Matthew J. Kalos, Kurt A. Lovrien
  • Patent number: 8732384
    Abstract: A device and methods are provided for accessing memory. In one embodiment, a method includes receiving a request for data stored in a device, checking a local memory for data based on the request to determine if one or more blocks of data associated with the request are stored in the local memory, and generating a memory access request for one or more blocks of data stored in a memory of the device based when one or more blocks of data are not stored in the local memory. In one embodiment, data stored in memory of the device may be arranged in a configuration to include a plurality of memory access units each having adjacent lines of pixel data to define a single line of memory within the memory access units. Memory access units may be configured based on memory type and may reduce the number of undesired pixels read.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: May 20, 2014
    Assignee: CSR Technology Inc.
    Inventors: Eran Scharam, Costia Parfenyev, Liron Ain-Kedem, Ophir Turbovich, Tuval Berler
  • Patent number: 8719503
    Abstract: A method includes receiving an address at a tag state array of a cache. The cache is configurable to have a first size or a second size that is larger than the first size. The method includes identifying a first portion of the address as a set index and using the set index to locate at least one tag field of the tag state array. The method also includes identifying a second portion of the address to compare to a value stored at the at least one tag field and locating at least one state field of the tag state array associated with a particular tag field that matches the second portion. The method further includes identifying a cache line based on a comparison of a third portion of the address to at least two status bits of the at least one state field and retrieving the cache line.
    Type: Grant
    Filed: June 25, 2012
    Date of Patent: May 6, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Christopher Edward Koob, Ajay Anant Ingle, Lucian Codrescu, Jian Shen
  • Patent number: 8719538
    Abstract: A method for protecting memory segments of a memory device is provided. The method includes receiving, by a processor coupled to the memory device, a request to allocate memory from an application, being executed by the processor, wherein the request includes a requested memory size and allocating, by the processor, a portion of memory having a size greater than the requested memory size. The method also includes creating, by the processor, a permitted read counter associated with the allocated portion of memory, wherein the permitted read counter is initialized to an initial value, and determining, by the processor, whether access to the memory segment is permitted using the permitted read counter. A system for protecting memory segments of a memory device is also disclosed.
    Type: Grant
    Filed: December 6, 2010
    Date of Patent: May 6, 2014
    Assignee: UTC Fire & Security Americas Corporation, Inc.
    Inventors: Timothy Steven Potter, Donald Becker, Bruce Montgomery, Jr.
  • Patent number: 8719492
    Abstract: A block storage system includes a host and comprises a block storage module that is coupled to the host. The block storage module includes a MRAM array and a bridge controller buffer coupled to communicate with the MRAM array. The MRAM array includes a buffer widow that is moveable within the MRAM array to allow contents of the MRAM array to be read by the host through the bridge controller buffer even when the capacity of the bridge controller buffer is less than the size of the data being read from the MRAM array.
    Type: Grant
    Filed: August 2, 2013
    Date of Patent: May 6, 2014
    Assignee: Avalanche Technology, Inc.
    Inventor: Mehdi Asnaashari
  • Patent number: 8706978
    Abstract: A semiconductor storage device includes a first nonvolatile memory to store user data of a file, a second nonvolatile memory to store management data of the file, the second nonvolatile memory being different in type from the first nonvolatile memory, and a controller to control read/write of data with respect to the first and second nonvolatile memories.
    Type: Grant
    Filed: February 6, 2013
    Date of Patent: April 22, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yoshiyuki Tanaka
  • Patent number: 8694730
    Abstract: A binary tree based multi-level cache system for multi-core processors and its two possible implementations LogN and LogN+1 models maintaining a true pyramid is described.
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: April 8, 2014
    Inventor: Muhammad Ali Ismail
  • Patent number: 8688922
    Abstract: The present disclosure describes a memory block manager. In some aspects a memory block allocation request is received from a packet-based interface, a memory block is allocated to the packet-based interface, and allocation of the memory block to another packet-based interface is prevented. In other aspects a request to free a memory block is received from a packet-based interface and the memory block is freed to allow the memory block to be reallocated.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: April 1, 2014
    Assignee: Marvell International Ltd
    Inventor: Ralf Assmann
  • Publication number: 20140082320
    Abstract: The present invention relates to management of a state memory in a communications unit. The state memory then stores states that are used in message-based communication with external units in a communications system. The data message communicated between the units are defined into multiple message classes. Furthermore, the state memory is divided into multiple memory portions, where each such memory portion is assigned to store states associated with a specific message class. This will prevent overwriting important states with less useful states.
    Type: Application
    Filed: November 26, 2013
    Publication date: March 20, 2014
    Applicant: TELEFONAKTIEBOLAGET L M ERICSSON (PUBL)
    Inventors: Jan Christoffersson, Hans Hannu
  • Patent number: 8677060
    Abstract: Certain embodiments described herein include a memory system having a register coupled to a host system and operable to receive address and control signals from the host system, a volatile memory subsystem, a non-volatile memory subsystem, a controller coupled to the non-volatile memory subsystem, and a circuit coupled to the register, the volatile memory subsystem, and the controller. In a first mode of operation, the circuit is operable to selectively isolate the controller from the volatile memory subsystem, and to selectively couple the volatile memory subsystem to the register to allow data to be communicated between the volatile memory subsystem and the host system. In a second mode of operation, the circuit is operable to selectively couple the controller to the volatile memory subsystem to allow data to be communicated between the volatile memory subsystem and the non-volatile memory subsystem using the controller, and is operable to selectively isolate the volatile memory subsystem from the register.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: March 18, 2014
    Assignee: Netlist, Inc.
    Inventors: Chi-She Chen, Jeffrey C. Solomon, Scott H. Milton, Jayesh Bhakta
  • Patent number: 8671262
    Abstract: A memory and a method for controlling a memory including: a set of first memory blocks of identical size, intended to contain first words, a set of second memory blocks of identical size, intended to contain second words, the number of second words being identical to the number of first words, a third memory block identical to the first blocks, a fourth memory block identical to the second blocks, each memory address comprising a first portion identifying a same line in all blocks, and each first word of the third block identifying a free word from among the second words sharing a same second address portion.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: March 11, 2014
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventor: Cedric Minne
  • Patent number: 8671243
    Abstract: Certain embodiments described herein include a memory system having a volatile memory subsystem, a non-volatile memory subsystem, a controller coupled to the non-volatile memory subsystem, and a circuit coupled to the volatile memory subsystem, to the controller, and to a host system. In a first mode of operation, the circuit is operable to selectively isolate the controller from the volatile memory subsystem, and to selectively couple the volatile memory subsystem to the host system to allow data to be communicated between the volatile memory subsystem and the host system. In a second mode of operation, the circuit is operable to selectively couple the controller to the volatile memory subsystem to allow data to be communicated between the volatile memory subsystem and the nonvolatile memory subsystem using the controller, and the circuit is operable to selectively isolate the volatile memory subsystem from the host system.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: March 11, 2014
    Assignee: Netlist, Inc.
    Inventors: Chi-She Chen, Jeffrey C. Solomon, Scott H. Milton, Jayesh Bhakta
  • Publication number: 20140052953
    Abstract: A storage system and a method for managing a memory capable of storing metadata related to logical volume sets, are disclosed. A memory quota is assigned to a metadata related to a logical volume set. The size of a memory currently consumed by the metadata is monitored. Upon exceeding a threshold by the size of the monitored memory, at least one restraining action related to memory consumption by the metadata is applied.
    Type: Application
    Filed: August 14, 2012
    Publication date: February 20, 2014
    Applicant: INFINIDAT LTD.
    Inventors: Ido BEN-TSION, Efraim ZEIDNER
  • Publication number: 20140047208
    Abstract: A method of controlling the capacity of a virtual storage system provided on a physical storage system, the method including: providing a control program on the physical storage system; coupling additional virtual storage to the virtual storage system on the physical storage system; providing control data on the additional virtual storage; with the control program, reading the control data and configuring the virtual storage system accordingly. A corresponding virtual storage system is also provided.
    Type: Application
    Filed: August 7, 2012
    Publication date: February 13, 2014
    Applicant: XYRATEX TECHNOLOGY LIMITED
    Inventor: James S.M. Morse