Based On Component Size Patents (Class 711/172)
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Patent number: 8351259Abstract: Methods, apparatus, and systems in accordance with this invention include memories that include a data array and a configuration array adapted to store configuration information for configuring the data array. The data array and the configuration array include a plurality of wordlines and a plurality of bitlines. The plurality of wordlines in the data array extend in the same direction as the plurality of wordlines in the configuration array. Likewise, the plurality of bitlines in the data array extend in the same direction as the plurality of bitlines in the configuration array. Numerous other aspects are disclosed.Type: GrantFiled: November 29, 2010Date of Patent: January 8, 2013Assignee: SanDisk 3D LLCInventors: Tyler J. Thorp, Brent Haukness
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Patent number: 8341267Abstract: Methods and systems for allocating memory of user terminals are disclosed. A user terminal may determine a weight for one or more categories, each category being associated with Internet information to be broadcast. The user terminal also may determine an available memory size of memory and may allocate memory to the one or more categories for storing the Internet information based on the weights and the available memory size.Type: GrantFiled: September 19, 2008Date of Patent: December 25, 2012Assignee: Core Wireless Licensing S.a.r.l.Inventors: Jian Ma, Li Han, Yuhong Li
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Patent number: 8332609Abstract: The present invention takes advantage of unused storage space within the ESS cells to provide for the efficient and cost effective storage of downloadable content. Specifically, the system of the present invention generally includes a download grid manager that communicates with the ESS cells. Content to be replicated to the ESS cells, and characteristics corresponding thereto, are received on the download grid manager from a content owner (or the like). Based on the characteristics, a storage policy, and storage information previously received from the ESS cells, the download grid manager will replicate the downloadable content to unused storage space within the ESS cells.Type: GrantFiled: September 28, 2007Date of Patent: December 11, 2012Assignee: International Business Machines CorporationInventors: Irwin Boutboul, Moon J. Kim, Dikran Meliksetian, Robert G. Oesterlin, Anthony Ravinsky, Jr.
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Publication number: 20120303928Abstract: A method and a storage system are provided for implementing deterministic memory allocation for indirection tables for persistent media or disk drives, such as, shingled perpendicular magnetic recording (SMR) indirection tables. A plurality of fixed-size memory pools are used to store indirection data. The distribution of pool allocate sizes is fixed. A pool allocate size is selected based upon an indirection system request size.Type: ApplicationFiled: August 11, 2011Publication date: November 29, 2012Applicant: Hitachi Global Storage Technologies Netherlands B. V.Inventor: David Robison Hall
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Patent number: 8321649Abstract: A system and a method for configuring a memory controller that communicates with a memory device muxes selected pins for the data transfer. The memory controller includes a set of pins where each pin of the set is associated with a data bit and an address bit. A programmable logic block is connected to the set of pins and uses a subset of the set of pins to enable data transfer between the memory device and the memory controller depending on the size of the memory device such that the pins not included in the subset are available for other applications.Type: GrantFiled: March 18, 2011Date of Patent: November 27, 2012Assignee: Freescale Semiconductor, Inc.Inventors: Hemant Nautiyal, Dhruv Satsangi
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Patent number: 8320742Abstract: An apparatus for recording/reproducing external device data in a broadcast receiver and method thereof are disclosed, by which a broadcast receiver allowed by a certification key is enabled to access a corresponding external device only. The present invention includes a connection checking step of checking a state of a physical connection between an external device and the broadcast receiver, a certification key registration deciding step of deciding whether a reserved certification key is registered, an access allowance deciding step of if the certification key is registered, deciding whether to allow an access to the connected external device by verifying the certification key, and an access allowing step of if the access is allowed, recording/reproducing corresponding data by accessing the connected external device.Type: GrantFiled: May 8, 2007Date of Patent: November 27, 2012Assignee: LG Electronics Inc.Inventor: Hee Young Park
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Publication number: 20120290811Abstract: Examples are disclosed for allocating a block of persistent storage or accessing a block of persistent storage based on a storage service string that includes a universally unique identifier and associated metadata.Type: ApplicationFiled: April 12, 2011Publication date: November 15, 2012Applicant: EMPIRE TECHNOLOGY DEVELOPMENT LLCInventor: Rudi Cilibrasi
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Patent number: 8291190Abstract: A method for writing data to a disk drive. The method includes: receiving a write command; and, determining whether a beginning and an end of a rewrite area specified by the write command agree with boundaries of large-sized data sectors on a disk. The method also includes: reading head and tail data sectors and making a backup of the head and tail data sectors in first and second non-volatile memory areas, respectively, if the beginning of the rewrite area does not agree with the boundaries. The method includes starting a rewrite of the rewrite area after completing backups into first and second non-volatile memory areas. Moreover, the method includes: determining a state stage by using data in first, second, third and fourth non-volatile memory areas if a power shut-down occurs during execution of the write command; and, executing a recovery process in accordance with the determined state stage.Type: GrantFiled: August 21, 2009Date of Patent: October 16, 2012Assignee: Hitachi Global Storage Technologies, Netherlands B.V.Inventors: Yoshiju Watanabe, Toshio Kakihara, Koichi Arai, Terumi Takashi, Yuzo Nakagawa
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Publication number: 20120246438Abstract: A deduplication storage capacity is estimated as a function of an expected deduplication ratio, the expected deduplication ratio being a combined average of a current deduplication ratio and a configured deduplication ratio, the current deduplication ratio depending on the data currently stored in the deduplication storage, and the configured deduplication ratio being an estimate made at a configuration stage of the deduplication computing storage environment.Type: ApplicationFiled: June 4, 2012Publication date: September 27, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Lior ARONOVICH, Shira BEN-DOR, Aviv CARO, Elena DROBCHENKO, Samuel KRIKLER, Ofer LENEMAN, Asaf LEVY, Liran LOYA, Dan MELAMED, Tzafrir Z. TAUB
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Patent number: 8275770Abstract: Field probabilities associated with fields in a database may be used to create one or more blocking criteria. The blocking criteria may be a set of fields that should be equal among two or more records in a database, so that a search of the records in the database according to the blocking criteria yields a subset of records approximately equal to or less than the specified maximum block size. Generic blocking criteria may also be created. The generic blocking criteria may be used for a batch comparison or batch linking operation within the records of the database.Type: GrantFiled: April 24, 2009Date of Patent: September 25, 2012Assignee: LexisNexis Risk & Information Analytics Group Inc.Inventor: David Alan Bayliss
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Patent number: 8266713Abstract: A method for transmitting and dispatching data stream, which is used for transmitting data stream to a storage device having a non-volatile memory and a smart card chip from a host, is provided. The method includes: setting a key between the host and the storage device; creating a temporary file in the non-volatile memory; verifying the temporary file based on the key; recording a logical block address of the temporary file when verification of the temporary file is successful; and judging whether the data stream from the host is written at the logical block address, wherein the data stream is identified to be a command-application protocol data unit (C-APDU) and is dispatched to the smart card chip when the data stream from the host is written at the logical block address. Accordingly, it is possible to efficiently distinguish a general data from a command of the smart card chip.Type: GrantFiled: March 31, 2008Date of Patent: September 11, 2012Assignee: Phison Electronics Corp.Inventors: Meng-Chang Chen, Sing-Chang Liu
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Patent number: 8266409Abstract: In a particular embodiment, a cache is disclosed that includes a tag state array that includes a tag area addressable by a set index. The tag state array also includes a state area addressable by a state address, where the set index and the state address include at least one common bit.Type: GrantFiled: March 3, 2009Date of Patent: September 11, 2012Assignee: QUALCOMM IncorporatedInventors: Christopher Edward Koob, Ajay Anant Ingle, Lucian Codrescu, Jian Shen
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Patent number: 8255662Abstract: A reference-capacity calculating unit calculates a reference capacity of each of storage devices storing therein data on the basis of an actual capacity of each storage device. A difference calculating unit calculates a difference value between the reference capacity calculated by the reference-capacity calculating unit and the actual capacity of each storage device. A maximum-value retrieving unit retrieves the maximum difference value out of the respective difference values of the storage devices calculated by the difference calculating unit. A defined-capacity determining unit determines a defined capacity, which is an actually-used capacity of each storage device, on the basis of a value obtained by subtracting the maximum difference value from the reference capacity calculated by the reference-capacity calculating unit.Type: GrantFiled: December 23, 2010Date of Patent: August 28, 2012Assignee: Fujitsu LimitedInventors: Kouichi Tsukada, Satoshi Yazawa, Shoji Oshima, Tatsuhiko Machida, Hirokazu Matsubayashi
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Patent number: 8255667Abstract: Systems and methods that manage memory are provided. In one embodiment, a system for communications may include, for example, a memory management system that may handle a first application employing a virtual address based tagged offset and a second application employing a zero based tagged offset with a common set of memory algorithms.Type: GrantFiled: April 28, 2011Date of Patent: August 28, 2012Assignee: Broadcom CorporationInventor: Uri Elzur
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Patent number: 8250352Abstract: A method, system, and computer usable program product for isolating a workload partition space are provided in the illustrative embodiments. A boot process of a workload partition in a data processing system is started using a scratch file system, the scratch file system being in a global space. A portion of a storage device containing a file system for the workload partition is exported to the workload partition, the portion forming an exported disk. The partially booted up workload partition may discover the exported disk. The exporting causes an association between the global space and the exported disk to either not form, or sever. The exporting places the exported disk in a workload partition space associated with the workload partition. The boot process is transitioned to stop using the scratch file system and start using the data in the exported disk for continuing the boot process.Type: GrantFiled: November 18, 2009Date of Patent: August 21, 2012Assignee: International Business Machines CorporationInventors: Khalid Filali-Abid, Perinkulam I Ganesh, Paul David Mazzurana, Edward Shvartsman, Sungjin Yook
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Patent number: 8245239Abstract: A method includes executing one or more applications in a deterministic execution environment and executing a plurality of background tasks in the deterministic execution environment. The one or more applications and the background tasks are executed in different time slots. At least one of the background tasks cannot be completed within a single time slot. The at least one of the background task is executed incrementally in multiple non-adjacent time slots so as to prevent the at least one background task from interfering with the execution of the one or more applications.Type: GrantFiled: July 6, 2005Date of Patent: August 14, 2012Assignee: Honeywell International Inc.Inventors: Piyush Garyali, Ziad M. Kaakani, Keijo J. Manninen, Pratap Parashuram, Elliott H. Rachlin, Jethro F. Steinman, Vivek B. Varma
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Patent number: 8244971Abstract: A memory circuit system and method are provided in the context of various embodiments. In one embodiment, an interface circuit remains in communication with a plurality of memory circuits and a system. The interface circuit is operable to interface the memory circuits and the system for performing various functionality (e.g. power management, simulation/emulation, etc.).Type: GrantFiled: October 30, 2007Date of Patent: August 14, 2012Assignee: Google Inc.Inventors: Suresh Natarajan Rajan, Keith R. Schakel, Michael John Sebastian Smith, David T. Wang, Frederick Daniel Weber
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Patent number: 8245008Abstract: A system and method for allocating memory to multi-threaded programs on a Non-Uniform Memory Access (NUMA) computer system using a NUMA-aware memory heap manager is disclosed. In embodiments, a NUMA-aware memory heap manager may attempt to maximize the locality of memory allocations in a NUMA system by allocating memory blocks that are near, or on the same node, as the thread that requested the memory allocation. A heap manager may keep track of each memory block's location and satisfy allocation requests by determining an allocation node dependent, at least in part, on its locality to that of the requesting thread. When possible, a heap manger may attempt to allocate memory on the same node as the requesting thread. The heap manager may be non-application-specific, may employ multiple levels of free block caching, and/or may employ various listings that associate given memory blocks with each NUMA node.Type: GrantFiled: February 18, 2009Date of Patent: August 14, 2012Assignee: Advanced Micro Devices, Inc.Inventors: Patryk Kaminski, Keith Lowery
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Patent number: 8244959Abstract: A subset of software objects stored in a first segment of non-volatile memory are identified as requiring frequent write operations or otherwise associated with a high endurance requirement. The subset of software objects are move to a second segment of non-volatile memory with a high endurance capacity, due to the application of wear leveling techniques to the second segment of non-volatile memory. The first and second segments of memory can be located in the same memory device or different memory devices.Type: GrantFiled: November 10, 2008Date of Patent: August 14, 2012Assignee: Atmel Rousset S.A.S.Inventors: Yves Fusella, Stephane Godzinski, Laurent Paris, Jean-Pascal Maraninchi, Samuel Charbouillot
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Publication number: 20120191940Abstract: A method of configuring system memory may include determining a plurality of memory regions supportable on an input/output adapter. The input/output adapter may include a physical function. A memory region of the plurality of memory regions may be allocated to the physical function when an address of the physical function is unknown. The method may further include determining the address of the physical function and associating the address of the physical function with the memory region.Type: ApplicationFiled: January 25, 2011Publication date: July 26, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Sean T. Brownlow, John R. Oberly, III, Timothy J. Torzewski
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Patent number: 8230164Abstract: Techniques are provided for identifying at least one aspect associated with a lifetime of each of a plurality of memory devices. Further, data is moved between the plurality of memory devices, based on the at least one aspect.Type: GrantFiled: June 24, 2010Date of Patent: July 24, 2012Assignee: LSI CorporationInventor: Radoslav Danilak
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Patent number: 8229995Abstract: A computer-readable recording medium stores therein a data transfer processing program that causes a computer capable of accessing plural recording devices to acquire a group of update data for a first recording device among the recording devices and calculate, based on addresses respectively assigned to each data item in the group of update data, an overlap rate of the addresses. Further, based on the overlap rate calculated at the calculating, the computer selects a data transfer scheme from among a synchronous scheme of transmitting the group of update data simultaneously to the first recording device and a second recording device, and a nonsynchronous scheme of transmitting the group of update data to the first recording device and subsequently causing the first recording device to transmit the group of update data to the second recording device; and executes the data transfer scheme selected.Type: GrantFiled: January 14, 2009Date of Patent: July 24, 2012Assignee: Fujitsu LimitedInventor: Takeshi Miyamae
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Patent number: 8230183Abstract: Techniques are provided for prolonging a lifetime of memory by controlling operations that affect the lifetime of the memory. At least one aspect associated with the memory lifetime is identified and at least one of the operations is delayed, based on the at least one aspect. The operations include a write operation, an erase operation, a program operation, and/or any other operation that is capable of reducing the memory lifetime.Type: GrantFiled: July 26, 2010Date of Patent: July 24, 2012Assignee: LSI CorporationInventor: Radoslav Danilak
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Patent number: 8209467Abstract: A recording apparatus includes: a type detecting section that detects a type of storage medium; an erase-block size detecting section that detects an erase-block size of the storage medium; a recording section that records desired data to a data area in the storage medium and records management information of the data area to a management area in the storage medium; and a control section that controls the recording section by issuing a command to the recording section, on the basis of results of the detection. Each time a certain amount of data is recorded to the data area, the control section updates the management information in accordance with the recording, and when the storage medium is a storage medium in which recorded data is updated for each erase-block size, the control section increases the certain amount of data according to an increase in the erase-block size.Type: GrantFiled: December 19, 2008Date of Patent: June 26, 2012Assignee: Sony CorporationInventors: Ryogo Ito, Hiroshi Shimono, Junichi Yokota, Fumihiko Kaise
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Patent number: 8209461Abstract: Data files are assigned addresses within one or more logical blocks of a continuous logical address space interface (LBA interface) of a usual type of flash memory system with physical memory cell blocks. This assignment may be done by the host device which typically, but not necessarily, generates the data files. The number of logical blocks containing data of any one file is controlled in a manner that reduces the amount of fragmentation of file data within the physical memory blocks, thereby to maintain good memory performance. The host may configure the logical blocks of the address space in response to learning the physical characteristics of a memory to which it is connected.Type: GrantFiled: December 26, 2006Date of Patent: June 26, 2012Assignee: SanDisk Technologies Inc.Inventors: Alan W. Sinclair, Barry Wright
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Patent number: 8209479Abstract: A memory circuit system and method are provided in the context of various embodiments. In one embodiment, an interface circuit remains in communication with a plurality of memory circuits and a system. The interface circuit is operable to interface the memory circuits and the system for performing various functionality (e.g. power management, simulation/emulation, etc.).Type: GrantFiled: October 30, 2007Date of Patent: June 26, 2012Assignee: Google Inc.Inventors: Suresh Natarajan Rajan, Keith R. Schakel, Michael John Sebastian Smith, David T. Wang, Frederick Daniel Weber
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Patent number: 8205063Abstract: A method and system writes data to a memory device including dynamic assignment of logical block addresses (LBAs) to physical write blocks. The method includes receiving a request to write data for a logical block address within an LBA range to the memory device. The method assigns the LBA range to a particular write block exclusively or non-exclusively, depending on the existence of previously assigned write blocks and the availability of unwritten blocks. A data structure may be utilized to record the recent usage of blocks for assigning non-exclusive write blocks. An intermediate storage area may be included that implements the dynamic assignment of LBA ranges to physical write blocks. Data in the intermediate storage area may be consolidated and written to the main storage area. Lower fragmentation and write amplification ratios may result by using this method and system.Type: GrantFiled: December 30, 2008Date of Patent: June 19, 2012Assignee: Sandisk Technologies Inc.Inventor: Alan W. Sinclair
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Publication number: 20120144151Abstract: A method for protecting memory segments of a memory device is provided. The method includes receiving, by a processor coupled to the memory device, a request to allocate memory from an application, being executed by the processor, wherein the request includes a requested memory size and allocating, by the processor, a portion of memory having a size greater than the requested memory size. The method also includes creating, by the processor, a permitted read counter associated with the allocated portion of memory, wherein the permitted read counter is initialized to an initial value, and determining, by the processor, whether access to the memory segment is permitted using the permitted read counter. A system for protecting memory segments of a memory device is also disclosed.Type: ApplicationFiled: December 6, 2010Publication date: June 7, 2012Inventors: Timothy Steven Potter, Donald Becker, Bruce Montgomery, JR.
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Patent number: 8195905Abstract: Embodiments of the invention relate generally to incremental computing. Specifically, embodiments of the invention include systems and methods that provide for the concurrent processing of multiple, incremental changes to a data value while at the same time monitoring and/or enforcing threshold values for that data value. For example, a method is provided that implements domain quotas within a data storage system.Type: GrantFiled: January 13, 2011Date of Patent: June 5, 2012Assignee: EMC CorporationInventors: Neal T. Fachan, Peter J. Godman, Justin M. Husted, Aaron J. Passey
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Patent number: 8190814Abstract: A memory access apparatus and a display using the same are provided. The memory access apparatus includes a dynamic memory, a plurality of clients and a memory management unit. The dynamic memory is used to store a plurality of memory data. The clients access the dynamic memory and each client has a priority. The memory management unit executes an access action of the clients for the dynamic memory respectively according to the priorities thereof. Besides, the memory management unit has at least one buffer area built therein. The buffer area is used to temporarily store a plurality of buffer data generated while the access action is performed.Type: GrantFiled: February 12, 2009Date of Patent: May 29, 2012Assignee: Novatek Microelectronics Corp.Inventor: Chung-Wen Hung
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Patent number: 8190844Abstract: Disclosed is a method of issuing volume level alerts to provide a warning that indicates overutilization of storage resources in a computer system. Volume level checking is performed without the necessity of checking all the volumes, but only upon the occurrence of certain changes so that the only the most problematic volumes are checked. Hence, only a small number of volumes must be checked and only in response to certain identified changes. The method is applicable to any criterion for overutilization of storage resources which satisfies basic persistency rules. The method is also applicable to assessing risk for the use of other resources, such as communication bandwidth, that are supplied by resource providers, or pools of providers, to users of bandwidth. The principles disclosed can be utilized to check resources on an asset by asset basis, using the free space ratio definition provided to assess risk of overutilization of resources.Type: GrantFiled: December 2, 2008Date of Patent: May 29, 2012Assignee: LSI CorporationInventor: Yoav Ossia
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Patent number: 8190828Abstract: Methods and apparatus for programmable logic devices including embedded processors having a dual-port SRAMs. A programmable logic integrated circuit includes a programmable logic portion having a plurality of logic elements, programmably configurable to implement user-defined combinatorial or registered logic functions, and an embedded processor portion coupled to the programmable logic portion. The embedded processor portion includes a processor, and a memory block coupled to the processor. The memory block includes a first plurality of memory cells for storing data, a second plurality of memory cells for storing data, a first port coupled to the first and second pluralities of memory cells, a second port coupled to the first and second pluralities of memory cells, and an arbiter coupled to the first port and the second port.Type: GrantFiled: May 13, 2009Date of Patent: May 29, 2012Assignee: Altera CorporationInventors: Roger May, Andrew Draper, Paul Metzgen, Neil Thorne
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Patent number: 8171484Abstract: A resource management apparatus includes a resource management part to manage an amount of resources used and an amount of virtual resources of each of a plurality of processing units, a selection and control part to select a processing unit having a smallest sum of the amount of resources used and the amount of virtual resources in response to an external process request, and to increase the amount of resources used by the selected processing unit and to decrease the amount of resources used by a processing unit corresponding to an external process release request in response to the process release request, a virtual resource control part to increase the amount of virtual resources of the processing unit corresponding to the process release request in response to the process release request, and a request sending part to send the external process request or process release request to the selected or corresponding processing unit.Type: GrantFiled: October 24, 2007Date of Patent: May 1, 2012Assignee: Fujitsu LimitedInventors: Katsuhiko Yamatsu, Hidetada Tanaka, Kazuaki Sumi, Nobuyuki Shima
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Patent number: 8166231Abstract: The access device 100 designates a file ID without relating different address spaces of an access device 100 and a nonvolatile memory device 200 with each other and manages a data storing state only in a physical address space in the nonvolatile memory device 200. The access device 100 sends a transfer rate to the nonvolatile memory device 200 by using a transfer rate sending part 121. A filling rate calculation part 251 calculates a filling rate of physical block corresponding to a guaranteed speed required by the access device 100. A remaining capacity corresponding to the transfer rate is obtained by using the calculated filling rate and is sent to a remaining capacity receiving part 122 of the access device 100.Type: GrantFiled: August 7, 2007Date of Patent: April 24, 2012Assignee: Panasonic CorporationInventors: Tadashi Ono, Tatsuya Adachi, Masahiro Nakanishi, Takuji Maeda
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Patent number: 8151080Abstract: Proposed are a storage system and its management method having at least two storage apparatuses capable of partitioning an internal resource into logical partitions and managing the logical partitions, and which replicates data written into a primary volume of a primary storage apparatus as the replication source storage apparatus to a secondary volume of a secondary storage apparatus as the replication destination storage apparatus. With this storage system and its management method, configuration information of the logical partition, to which the primary volume belongs, is sent to the secondary storage apparatus, and the configuration of the logical partition to which the secondary volume belongs is set based on the configuration information of the logical partition to which the primary volume belongs.Type: GrantFiled: April 25, 2008Date of Patent: April 3, 2012Assignee: Hitachi, Ltd.Inventors: Yuki Naganuma, Hironori Emaru, Toshimichi Kishimoto, Nobuhiro Maki
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Patent number: 8145826Abstract: A new approach to the manipulation of data access of storage that complies with certain mapping interlinks between front-end servers and back-end storage data pool and which lessens the complexity of the interlinks and improves the efficiency of the data accessibility is disclosed. The method allocates multiple user hardware devices and the logical units to a correspondent designated sub-zone so that there is at least one sub-zone associated with two or more logical units, wherein the logical units reside inside the storage hardware or network. The method establishes the data access interlinks within the same sub-zone between users and logical units. A system that substantiates the method is also disclosed. The method and the system together comprise a new storage scheme.Type: GrantFiled: April 7, 2009Date of Patent: March 27, 2012Assignee: UITSTOR (USA) Inc.Inventor: Yongguang Ji
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Patent number: 8145863Abstract: Storage using resemblance of data segments is disclosed. It is determined that a new segment resembles a second prior stored segment wherein the second prior stored segment is represented as a first stored delta and a first prior stored segment. A second delta between the new segment and the prior stored segment is determined. A representation of the new segment based at least in part on the second delta is stored.Type: GrantFiled: April 13, 2011Date of Patent: March 27, 2012Assignee: EMC CorporationInventor: Ming Benjamin Zhu
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Publication number: 20120072695Abstract: A system and method are provided for pooling storage devices in a virtual library for performing a storage operation. A storage management device determines a storage characteristic of a plurality of storage devices with respect to performing a storage operation. Based on a storage characteristic relating to performing the storage operation, the storage management device associates at least two storage devices in a virtual library. The storage management device may continuously monitor the virtual library and detect a change in storage characteristics of the storage devices. When changes in storage characteristics are detected, the storage management device may change associations of the storage device in the virtual library.Type: ApplicationFiled: December 2, 2011Publication date: March 22, 2012Applicant: COMMVAULT SYSTEMS, INC.Inventors: Rajiv Kottomtharayil, Ho-Chi Chen
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Patent number: 8140815Abstract: This Sampling Object Cache System (“SOCS”) estimates the size of an in-memory heap-based object cache without the need to serialize every object within the cache. SOCS samples objects at a user-determined rate and then computes a “sample size average” for each type of class—whether a top class, type of top class or non top class. Using these sample size averages, a statistically accurate measure of the overall size of the cache is calculated by adding together the total size of the objects in the cache for each class type.Type: GrantFiled: August 26, 2011Date of Patent: March 20, 2012Assignee: International Business Machines CorporationInventors: Aaron K Shook, Andrew Ivory, Ching C. A. Chow, Erik J. Burckart, Rohit D. Kelapure
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Publication number: 20120066471Abstract: A method and system are provided for associating one or more memory buffers in a computing system with a plurality of memory channels. The method and apparatus associates one or more memory buffers with a plurality of memory banks based on preferred performance settings, wherein the plurality of memory banks spans over one or more of the plurality of memory channels. Additionally, the method and apparatus accesses the one or more memory buffers based on the preferred performance settings. Further, the method and apparatus can, in response to accessing the one or more memory buffers based on the preferred performance settings, determine whether the preferred performance settings are being satisfied.Type: ApplicationFiled: November 22, 2011Publication date: March 15, 2012Applicant: ADVANCED MICRO DEVICES, INC.Inventors: Greg Sadowski, Philip J. Rogers, John Wakefield Brothers, III, W. Fritz Kruger, Konstantine I. Iourcha
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Patent number: 8135906Abstract: The methods and structure herein provide for expanding the storage capacity of a RAID storage system while maintaining the same level of RAID storage management. A RAID storage controller may be coupled between a host computer and a RAID storage volume. The RAID storage controller manages the disk drives of the storage volume to present a single logical volume of storage to the host computer. When a storage expansion is desired, the RAID storage controller may communicatively couple to at least one expansion disk drive and begin transfer of data from the original RAID storage volume to the expansion disk drive(s). During this data transfer, read and write operations are continued to the original RAID storage volume. Additionally, the RAID storage controller duplicates write operations to the expansion disk drive(s) such that general storage operations required by the host computer are continued.Type: GrantFiled: May 15, 2008Date of Patent: March 13, 2012Assignee: LSI CorporationInventors: Robin F. Wright, Scott W. Dominguez, Jason B. Schilling, Cirila M. Montano, Brian Worby
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Patent number: 8112758Abstract: Techniques are disclosed for allocation of resources in a distributed computing system. For example, a method for allocating a set of one or more components of an application to a set of one or more resource groups includes the following steps performed by a computer system. The set of one or more resource groups is ordered based on respective failure measures and resource capacities associated with the one or more resource groups. An importance value is assigned to each of the one or more components, wherein the importance value is associated with an affect of the component on an output of the application. The one or more components are assigned to the one or more resource groups based on the importance value of each component and the respective failure measures and resource capacities associated with the one or more resource groups, wherein components with higher importance values are assigned to resource groups with lower failure measures and higher resource capacities.Type: GrantFiled: January 8, 2008Date of Patent: February 7, 2012Assignee: International Business Machines CorporationInventors: Navendu Jain, Yoonho Park, Deepak S. Turaga, Chitra Venkatramani
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Patent number: 8108609Abstract: A hardware description language (HDL) design structure embodied on a machine-readable data storage medium includes elements that when processed in a computer aided design system generates a machine executable representation of a device for implementing dynamic refresh protocols for DRAM based cache. The HDL design structure further includes a DRAM cache partitioned into a refreshable portion and a non-refreshable portion; and a cache controller configured to assign incoming individual cache lines to one of the refreshable portion and the non-refreshable portion of the cache based on a usage history of the cache lines; wherein cache lines corresponding to data having a usage history below a defined frequency are assigned by the controller to the refreshable portion of the cache, and cache lines corresponding to data having a usage history at or above the defined frequency are assigned to the non-refreshable portion of the cache.Type: GrantFiled: May 23, 2008Date of Patent: January 31, 2012Assignee: International Business Machines CorporationInventors: John E. Barth, Philip G. Emma, Erik L. Hedberg, Hillery C. Hunter, Peter A. Sandon, Vijayalakshmi Srinivasan, Arnold S. Tran
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Patent number: 8108640Abstract: A storage system includes a storage space provisioning system coupled to a primary storage server and a secondary storage server to resize a thin provisioned secondary volume on the secondary storage server. The storage space provisioning system detects data stored on a primary volume that is to be transferred to a secondary volume and obtains a point-in-time copy of the data stored on the primary volume. The storage provisioner determines a maximum transfer size of the data to be transferred using the point-in-time copy, and compares the maximum transfer size to a difference between the thin provisioned size of the secondary volume and a used size of the secondary volume. The storage space provisioning system increases the thin provisioned size of the secondary volume to be greater than the used size of the secondary volume plus the maximum transfer size when the maximum transfer size is greater than the difference.Type: GrantFiled: April 16, 2009Date of Patent: January 31, 2012Assignee: Network Appliance, Inc.Inventor: James Hartwell Holl, II
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Patent number: 8099497Abstract: The present disclosure provides data sharing through virtual removable volumes. A virtual volume of a SAN (storage area network) is presented to clients as a virtual removable volume. A controlling application controls access of clients connected to the SAN to the virtual removable volume. The controlling application allows only one client at a time to access the virtual removable volume. The controlling application allows a first client to mount the virtual removable volume as a removable volume. The controlling application then causes the first client to unmount the virtual removable volume and allows a second client to mount the virtual removable volume as a removable volume. In this way, the first client and second client are able to share data via the virtual removable volume without causing corruption of data and without requiring a shared file system or physical transfer of removable media.Type: GrantFiled: February 19, 2008Date of Patent: January 17, 2012Assignee: Netapp, Inc.Inventor: Moshe Melnikov
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Patent number: 8095730Abstract: A computer data storage system is described. A processor maintains a striped volume set by striping a data container over a plurality of storage nodes. A storage node determines whether space available on that node is below a predetermined threshold, the predetermined threshold indicating a low-in-space state. The storage node sends a message indicating that the storage node is in a low-in-space state. The processor accepts no further write messages to the data container as long as the storage node is in a low-in-space state.Type: GrantFiled: July 20, 2010Date of Patent: January 10, 2012Assignee: NetApp, Inc.Inventors: Tianyu Jiang, Richard P. Jernigan, IV, Eric Hamilton
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Patent number: 8086819Abstract: A method for optimizing a solid state drive is described. The method involves determining whether a free space fragment on the SSD is smaller than the threshold fragment size. If the free space fragment on the SSD is smaller than the threshold fragment size, eliminating the free space fragment. If the free space fragment on the SSD is not smaller than the threshold fragment size, retaining the free space fragment for storing data. Elimination of the free space fragments smaller than the threshold fragment size results in a fewer number of free space fragments being used when writing to the SSD, allowing for improved SSD performance.Type: GrantFiled: October 3, 2008Date of Patent: December 27, 2011Assignee: Diskeeper CorporationInventors: Basil Thomas, Craig Jensen, Andrew Staffer, Santhosh Ramankutty
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Publication number: 20110314249Abstract: The invention relates to a method for selecting an available memory size of a circuit including at least a CPU and a total memory, the method including a stage for the selection of an available memory size that is smaller than or equal to that of the total memory. The invention is characterised in that the selection stage is implemented by the manufacturer of the product incorporating the said circuit, different from the circuit manufacturer, and in that it includes a stage for the generation of a configuration signature intended for the circuit manufacturer, which information is representative of the size of available memory size selected in this way by the product manufacturer.Type: ApplicationFiled: February 9, 2010Publication date: December 22, 2011Applicant: GEMALTO SAInventor: Benoit Arnal
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Patent number: 8082415Abstract: This Sampling Object Cache System (“SOCS”) estimates the size of an in-memory heap-based object cache without the need to serialize every object within the cache. SOCS samples objects at a user-determined rate and then computes a “sample size average” for each type of class—whether a top class, type of top class or non top class. Using these sample size averages, a statistically accurate measure of the overall size of the cache is calculated by adding together the total size of the objects in the cache for each class type.Type: GrantFiled: July 1, 2008Date of Patent: December 20, 2011Assignee: International Business Machines CorporationInventors: Aaron Kyle Shook, Andrew Ivory, Ching Chi Andrew Chow, Erik John Burckart, Rohit Dilip Kelapure
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Patent number: 8078811Abstract: The most important data in a first memory of a data processing system are stored in a limited second data memory given upon a transfer thereof. The demarcation between important (and still storable) data on the one hand and less important (and therefore no longer storable) data is made dependent on the available storage volume (SV) of the target data memory. This achieves that an optimal amount of the most important data can be stored on the target data memory.Type: GrantFiled: March 28, 2008Date of Patent: December 13, 2011Assignee: Siemens IT Solutions And Services GmbHInventors: Markus Heintel, Christian Hiob