Abstract: An example redundant power supply system comprises a power supply input to receive power from a power supply; a buck-boost converter coupled to the power supply input; and a controller coupled to the buck-boost converter. The controller is to receive a power supply identification signal from the power supply. The controller is also to enable or disable the buck-boost converter based on the power supply identification signal.

Abstract: A climate control system may include an electronic equipment room including one or more interior partitions dividing the chamber into two or more subchambers. The system may further include a cooling system configured to provide the subchambers with different levels of cooling, wherein at least one partition is movable from a first position defining a first subchamber to a second position defining a second subchamber in a different area of the room than the first subchamber. The system may also include a controller including instructions for controlling operation of the movable partition based on cooling requirements of the electronic equipment in the room; a first heating, ventilation, and air conditioning (HVAC) unit and a second HVAC unit, each configured to provide cooling to a different subchamber of the electronic equipment room; and a third HVAC unit configured to provide backup for the first HVAC unit and/or the second HVAC unit.

Abstract: A method for electricity-related security awareness of distributed power supply systems considering spatio-temporal distribution of rainstorms, including: establishing a multi-dimensional parallel parasitic capacitance calculation model of the distributed photovoltaic-energy storage power supply system considering accumulated water depth and micro-terrain environment; performing multi-source spatio-temporal hierarchical correlation analysis between rainstorm spatio-temporal distribution characteristics (including rainfall peak position, cloud movement, rainfall intensity and rainfall duration) and an operating state of the distributed power supply system; constructing a leakage current probability prediction model considering unevenness and randomness of the rainstorm spatio-temporal distribution; and establishing an electricity-related security awareness model based on deep meta-learning.

Abstract: A non-transitory computer-readable recording medium stores a management program for causing a computer to execute a process the includes receiving designation of a first resource used by a specific server included in a plurality of servers, calculating a first estimated value of power to be consumed by the plurality of servers when the specific server executes first processing using the first resource, determining whether the first estimated value exceeds a first upper limit value of power to be consumed by the plurality of servers, setting in the specific server, when determined that the first estimated value does not exceed the first upper limit value, a second estimated value of power to be consumed by the specific server when the first processing is executed using the first resource, as a second upper limit value of power to be consumed by the specific server.

Abstract: Embodiments of systems and methods for power throttling of High Performance Computing (HPC) components are described. In some embodiments, an HPC platform may include: a system Baseboard Management Controller (BMC), and an accelerator tray comprising a tray BMC coupled to a plurality of managed subsystems and to the system BMC, where the system BMC is configured to: in response to a power excursion event, instruct the tray BMC to throttle a first managed subsystem by a first amount and to throttle a second managed subsystem by a second amount.

Abstract: Embodiments include apparatuses, methods, and systems including a power control unit to control different power consumptions by one or more processors to operate different applications. The power control unit may receive power information that may include a priority information for each application to be operated on the one or more processors, determine to control, based on the power information for different applications, different power consumptions by the one or more processors to operate the different applications. Other embodiments may also be described and claimed.

Abstract: A display driving circuit for driving a display panel, including a first memory configured to store main image data received from outside of the display driving circuit; a second memory configured to store first additional image data in a normal mode, and to store second additional image data in an Always On Display (AOD) mode having lower power consumption than the normal mode; a normal mode controller configured to operate in the normal mode according to the first additional image data stored in the second memory; and an AOD mode controller configured to operate in the AOD mode according to the main image data stored in the first memory and the second additional image data stored in the second memory.

Abstract: A flexible load management (FLM) system and technique adaptively monitors and manages power consumption of a premises. The FLM system includes a virtual critical load panel (vCLP) that utilizes circuit breakers in combination with companion modules (i.e., intelligent controllers) to vary a prioritization arrangement of loads in the premises by time of day, season or even dynamically. The vCLP is a prioritized enumeration (i.e., prioritization) of the loads within the premises, wherein the loads are considered sufficiently important such that they are protected by a local power source. The vCLP is dynamically configurable by a user in real time according to an instantaneous demand for the prioritized loads that is used to determine a number of branch circuits associated with the loads that is able to be powered-on at any time.

Abstract: A method for controlling a data center, comprising a plurality of server systems, each associated with a cooling system and a thermal constraint, comprising: a concurrent physical condition of a first server system; predicting a future physical condition based on a set of future states of the first server system; dynamically controlling the cooling system in response to at least the input and the predicted future physical condition, to selectively cool the first server system sufficient to meet the predetermined thermal constraint; and controlling an allocation of tasks between the plurality of server systems to selectively load the first server system within the predetermined thermal constraint and selectively idle a second server system, wherein the idle second server system can be recruited to accept tasks when allocated to it, and wherein the cooling system associated with the idle second server system is selectively operated in a low power consumption state.

Abstract: Systems and methods for activity-based device recommendations are disclosed. For example, historical usage data associated with a device may indicate that the device is likely to be associated with a given state at a given time. When the device is not in the anticipated state, a recommendation to transition the device state, for example, may be sent. Additionally, a determination of the activity state associated with the device, such as an active state, an asleep state, and/or an away state may be utilized to determine the recommendation to surface, to determine whether to send a recommendation, and when and/or how to send the recommendation.

Abstract: There is provided an apparatus comprising a requirement determination unit to determine an energy requirement for a system component. A status determination unit determines status information relating to a plurality of heterogeneous energy stores and actuating system control unit controls an activity of the system component in dependence on the status information relating to the plurality of heterogeneous energy stores and the energy requirement.

Abstract: A method and apparatus for performing dynamic current scaling of an input current of a voltage regulator are provided. The method and apparatus allow tuning current consumption in various applications, calculating a duration of an activity phase in which various algorithms are executed and activating dynamic current scaling of a regulator if the activity duration is shorter than a programmable threshold. A controller receives a threshold for an activity duration and a window size in which to evaluate the activity duration.

Abstract: A gesture-based wake process for an AR system is described herein. The AR system places a hand-tracking input pipeline of the AR system in a suspended mode. A camera component of the hand-tracking input pipeline detects a possible visual wake command being made by a user of the AR system. On the basis of detecting the possible visual wake command, the AR system wakes the hand-tracking input pipeline and places the camera component in a fully operational mode. If the AR system, using the hand-tracking input pipeline, verifies the possible visual wake command as an actual wake command, the AR system initiates execution of an AR application.

Abstract: In an example, an apparatus comprises a plurality of execution units comprising at least a first type of execution unit and a second type of execution unit and logic, at least partially including hardware logic, to analyze a workload and assign the workload to one of the first type of execution unit or the second type of execution unit. Other embodiments are also disclosed and claimed.

Abstract: Emergency monitoring application mobility management is provided. A portion of battery power on a mobile device is reserved for an emergency monitoring application between defined boundaries of a certain area based on analysis of a profile identifying battery consumption of each respective application running on the mobile device. A dedicated logical communication channel is established with the mobile device that the emergency monitoring application connects to in a detected emergency situation between the defined boundaries of the certain area. The dedicated logical communication channel is utilized to shut down a number of applications running on the mobile device during the detected emergency situation so that the reserved portion of battery power is retained to run the emergency monitoring application on the mobile device between the defined boundaries of the certain area during the detected emergency situation.

Abstract: A method and a system for scheduling a virtual machine are disclosed. The method includes: obtaining energy consumption data of a rack and energy consumption data of host computers, wherein the rack is used to place the host computers; determining power consumption data of a virtual machine; determining a target host computer corresponding to the virtual machine according to the energy consumption data of the rack, the energy consumption data of the host computers, and the power consumption data of the virtual machine; and dispatching the virtual machine to the target host computer. The present disclosure solves the technical problems of unbalanced power consumption scheduling caused by virtual machine scheduling methods that are implemented only according to CPU parameters in the existing technologies.

Abstract: A motorized window treatment system controls a plurality of motorized window treatments to maximize daylight autonomy, while minimizing cognitive dissonance. The system may include motorized window treatments, window sensors, and a system controller. Each motorized window treatment may be operable to adjust a respective covering material to control the amount of light entering a space. Each sensor may be mounted adjacent to at least one of the motorized window treatments, and may be configured to measure an amount of daylight shining on the sensor. The system controller may receive sensor readings from the sensors and may control the motorized window treatments in response to the sensors to keep the covering materials aligned when the sensor readings are within a predetermined amount. The system controller may dynamically group and re-group the sensors into subgroups based upon the sensor readings and may control the motorized window treatments based upon the subgroups.

Abstract: Eyewear including a support structure defining a region for receiving a head of a user. The support structure supports optical elements, electronic components, and a use detector. The use detector is coupled to the electronic components and is positioned to identify when the head of the user is within the region defined by the support structure. The electronic components monitor the use detector and transition from a first mode of operation to a second mode of operation when the use detector senses the head of the user in the region.

Abstract: A peripheral component interconnect express (PCIe) interface device is provided to include: a root complex configured to support a PCIe port, a memory connected to an input/output structure through the root complex, a switch connected to the root complex through a link and configured to transmit a transaction, and an end point connected to the switch through the link to transmit and receive a packet. The PCIe interface device may perform a link power management by changing a state of the link in response to a detection of an idle state of the link.

Abstract: A disclosed technique includes prefetching display data into a cache memory, wherein the display data includes data to be displayed on a display during a memory black-out period for a memory; triggering the memory black-out period; and during the black-out period, reading from the cache memory to obtain data to be displayed on the display.

Abstract: Disclosed is a method for rebalancing blocks of a register file. The method comprises allocating a first set of entries in a first register file to a first hardware thread of a processor core. The method further comprises allocating a second set of entries in a second register file to a second hardware thread of the processor core. The register tags in the first and second register files are compacted such that register tags associated with the first hardware thread are compacted into the first set of entries, and register tags associated with the second hardware thread are compacted into the second set of entries.

Abstract: Apparatuses, methods and storage medium associated with current control for a multicore processor are disclosed herein. In embodiments, a multicore processor may include a plurality of analog current comparators, each analog current comparator to measure current utilization by a corresponding one of the cores of the multicore processor. The multicore processor may include one or more processors, devices, and/or circuitry to cause the cores to individually throttle based on measurements from the corresponding analog current comparators. In some embodiments, a memory device of the multicore processor may store instructions executable to operate a plurality power management agents to determine whether to send throttle requests based on a plurality of histories of the current measurements of the cores, respectively.

Abstract: A method for determining power dissipation within a computer system is disclosed. A circuit block may receive a regulated voltage level on a power supply signal generated by a voltage regulator circuit. A power control circuit may measure a current drawn by the circuit block, and determine a real-time voltage level for the power supply signal using the current and based on a slope value and a zero-load voltage level. Additionally, power control circuit may determine a power dissipation for the circuit block using the current and the real-time voltage level, and adjust an operation parameter of the circuit block based on the power dissipation.

Abstract: An imaging device includes a controller, a power supply, a regulator, and a switch. The controller is configured to control an imaging unit, on the basis of a command and data that are received from a host in accordance with an I2C/I3C communication protocol. The power supply is configured to supply a voltage to a digital block of the controller. The digital block is configured to be subjected to dynamic voltage frequency scaling within one-frame operation. The regulator and the switch are provided between the digital block and the power supply, and coupled in parallel with each other.

Abstract: In an example, an apparatus comprises a compute engine comprising a high precision component and a low precision component; and logic, at least partially including hardware logic, to receive instructions in the compute engine; select at least one of the high precision component or the low precision component to execute the instructions; and apply a gate to at least one of the high precision component or the low precision component to execute the instructions. Other embodiments are also disclosed and claimed.

Abstract: A user equipment (UE) device may include a memory storing instructions and processor configured to execute the instructions to receive a first reconfiguration message from a wireless station of a radio access network to attempt to place the UE device into a first power saving state. The UE device may be further configured to execute the instructions to determine that a battery level is below a first predetermined threshold; transmit, to the wireless station, a second power savings request when it is determined that the battery level is below the predetermined threshold, to place the UE device into a second power saving state; receive a second reconfiguration message from the wireless station based on the second power savings request; and execute adjustments in the second reconfiguration message to place the UE device into the second power saving state.

Abstract: A review and retry mechanism ensures a port channel can be configured to provide and maintain a minimum data speed. A timer-based review sequence reviews the constituent interfaces of a port channel to determine if a minimum speed requirement is met. If the minimum speed cannot be fulfilled, the port-channel member interfaces are un-programmed and removed from the port-channel, rendering the port-channel functionally inactive, thereby preventing network traffic loss. A timer-based retry sequence attempts to program the constituent interfaces. The minimum speed requirement of the interfaces is checked in the next review cycle. If the minimum speed requirement is met, then the review and retry mechanism halts and the port channel continues to remain active; otherwise, the interfaces are un-programmed and the process repeats.

Abstract: A memory device executes a method of controlling power of the memory device. The memory device includes a host interface which receives a command from a host and controls an access to the memory device by the host, a register which is accessible by the host and includes a plurality of different regions, a memory access monitor which monitors which region of the plurality of regions the host accesses, and in response thereto generates a monitoring signal, and a power control manager which selects a power-up group of modules of the memory device in accordance with the monitoring signal and which supplies power to the selected power-up group of modules while not supplying power to any modules of the memory device not belonging to the selected power-up group.

Abstract: Described is an low overhead method and apparatus to reconfigure a pair of buffered interconnect links to operate in one of these three modes—first mode (e.g., bandwidth mode), second mode (e.g., latency mode), and third mode (e.g., energy mode). In bandwidth mode, each link in the pair buffered interconnect links carries a unique signal from source to destination. In latency mode, both links in the pair carry the same signal from source to destination, where one link in the pair is “primary” and other is called the “assist”. Temporal alignment of transitions in this pair of buffered interconnects reduces the effective capacitance of primary, thereby reducing delay or latency. In energy mode, one link in the pair, the primary, alone carries a signal, while the other link in the pair is idle. An idle neighbor on one side reduces energy consumption of the primary.

Abstract: Imposing and/or readjusting the CPU clocks for services of containers from various cloud-based cognitive systems in a multi-cloud cognitive computing environment for performing a particular job. The particular job having an emergency performance requirement. During processing of the job, a need to tune the execution of instructions is identified through a pre-existing emergency identification process that includes collecting clock data for each container supporting the performance of the particular job.

Abstract: Control device for a power over Ethernet system having multiple power source devices comprises plural control circuits and a signal bus connecting them. Each control device connects plural power source devices and plural port switches, which controls power supply to a port to be connected by a power consuming device. Detection circuit detects at least one power supply state combination. Control signal generator picks up a power control combination signal corresponding to a detected power supply state combination from a power supply to power control look-up-table, upon change in the power supply state and provides the power control signals to corresponding port switches.

Abstract: In a method of operating a multi-core system comprising a plurality of processor cores, a plurality of task stall information respectively corresponding to a plurality of tasks are provided by monitoring a task stall time with respect to each task. The task stall time indicates a time while the each task is suspended within a task active time, and the task active time indicates a time while a corresponding processor core is occupied by the each task. Task scheduling is performed based on the plurality of task stall information, and a fine-grained dynamic voltage and frequency scaling (DVFS) is performed based on the task scheduling. The plurality of tasks may be assigned to the plurality of processor cores based on load unbalancing, and the effects of the fine-grained DVFS may be increased to reduce the power consumption of the multi-core system.

Abstract: Methods, systems, and devices for transferring memory system data to a host system are described. A system may be configured for transferring information between a memory system and a host system in response to transitions between various operating modes, such as operating modes associated with different operating power levels. For example, before entering a reduced power mode, the memory system may identify information stored in a volatile memory array and transmit the identified information to the host system. Such information transmitted to the host system may be returned to the memory system to support memory system operation after exiting the reduced power mode. In some examples, such information exchanged between the memory system and the host system may be associated with a processing capability of the memory system, and the described operations may be referred to as suspending memory system processing information to a host system.

Abstract: Various embodiments provide for asymmetric data transmission using Energy-Efficient Ethernet (EEE), which can be used in such applications as data network communications between sensors (e.g., cameras, motion, radar, etc.) and computing equipment within vehicles (e.g., smart and autonomous cars).

Abstract: The invention introduces a non-transitory computer-readable storage medium for adjusting operating frequencies when executed by a processing unit of a device, containing program code to: collect an interface-activity parameter comprising information about data transmissions on a host access interface and/or a flash access interface; select one from multiple frequencies according to the interface-activity parameter; and drive a clock generator to output a clock signal at the selected frequency, thereby enabling the host access interface and/or the flash access interface to operate at an operating frequency.

Abstract: According to one implementation of the present disclosure, a method for power management is disclosed. The method includes: computing, by a central processing unit, software instructions of a software workload in an active-mode operation corresponding to a first operating point on a performance curve of a performance mode; transitioning from instances of the active-mode operation to instances of standby-mode operation of the CPU, and recording, by a time tracking element, each of a plurality of standby entry data points; transitioning from the instances of the standby-mode operation to the instances of the active-mode operation of the CPU, and recording, by the time tracking element, each of a plurality of standby exit data points; and determining a second operating point on the performance curve of the performance mode based on the recorded standby entry data points and the recorded standby exit data points.

Abstract: A method and a gateway system of a mobile asset are described. A voltage produced by a power system of the mobile asset is monitored by a gateway system. In response to determining that a first fluctuation occurs in the voltage produced by the power system of the mobile asset over a first interval of time, the gateway system operates in a first mode. In response to determining that a value of the voltage produced by the power system of the mobile asset is less than a voltage threshold, the gateway system automatically transitions to operating in a second mode, which is different from the first mode and causes the gateway system to consume less power than when it is operating in the first mode.

Abstract: Systems, apparatuses, and methods for saving power on a bus interface are described. A system includes a host, a device, and a repeater interposed between the host and the device. While the host and device are in a low-power state, the repeater monitors a first bus to determine if the device has woken up. When the repeater detects a remote wake-up event initiated by the device, the repeater generates an interrupt which is sent to the host. The host responds to the interrupt by initiating a resume wake-up event procedure that assumes the device is still asleep. In this way, the host is able to stay in the low-power state longer while also using a wake-up procedure that does not require the host to be aware of the existence of the repeater.

Abstract: Devices and methods for linear addressing are provided. A device is provided which comprises a plurality of components having assigned registers used to store data to execute a program and a power management controller, in communication with the components. The power management controller is configured to send one of a request to remove power to the components and a request to reduce power to the components when it is determined that the components are idle, execute a first process of one of removing power and reducing power to the components and entering a reduced power state when an acknowledgement of the request is received and execute a second process of restoring power to the components when one or more of the components are indicated to be active.

Abstract: A system and method for simulating an electronic circuit is disclosed. The method includes creating a finite set of circuit or device parameter points selected from within an n-dimensional parameter space. The method includes determining, for each circuit or device parameter point of the set, a corresponding response value of the performance metric and a corresponding probability of occurrence. The method includes determining, for a predetermined value of the performance metric, the total probability of occurrence.

Abstract: A data fabric routes requests between the plurality of requestors. A probe filter tracks the state of cached lines of memory at a probe filter coupled to the data fabric. Responsive to the data fabric leaving a non-operational power state while all requestors that are probe filter clients are in a non-operational power state, the power management controller delays a probe filter initialization state in which data regarding cached lines is initialized following the non-operational power state.

Abstract: A memory refresh method is applied to a computer system including a processor, a memory controller, and a dynamic random access memory (DRAM). The memory controller receives a first plurality of access requests from the processor. The memory controller refreshes a first rank in a plurality of ranks at shortened interval set to T/N when a quantity of target ranks to be accessed by the first plurality of access requests is less than a first threshold and a proportion of read requests in the first plurality of access requests or a proportion of write requests in the first plurality of access requests is greater than a second threshold. T is a standard average refresh interval, and N is greater than 1. The memory refresh technology provided in this application can improve performance of the computer system in a memory refresh process.

Abstract: Some aspects of this disclosure relate to a peak power manager that includes a first power estimate accumulator circuit configured to receive one or more power estimates associated with one or more subsystems and to generate a first accumulated power estimate. The peak power manage can further include a first-in first-out (FIFO) storage circuit configured to store a plurality of first accumulated power estimates associated with a plurality of clock cycles corresponding to a moving time interval window. The peak power manager can further include a second power estimate accumulator circuit configured to accumulate the plurality of first accumulated power estimates to generate a second accumulated power estimate and a control circuit.

Abstract: A data storage device and method for low-latency power state transitions by having power islanding in a host memory buffer are provided. In one embodiment, a data storage device is provided comprising a volatile memory, a non-volatile memory, and a controller. The controller is configured to receive information from a host about which area, if any, in a host memory buffer will be powered on during a low-power state; and in response to the information indicating that a first area of the host memory buffer will be powered on during the low-power state, flush data from a second area of the host memory buffer that will not be powered on during the low-power state to the first area of the host memory buffer prior to entering the low-power state. Other embodiments are provided.

Abstract: Systems and methods for analyte monitoring, particularly systems and methods for monitoring and managing life of a battery in an analyte sensor system worn by a user, are provided.

Abstract: A virtual image display device and an object selection method for virtual image thereof are provided. The object selection method for virtual image includes the following: a virtual image display is enabled to capture image information of a hand of a user; whether an image of an auxiliary tool is present in the image information is determined; position information of the auxiliary tool is generated according to the image of the auxiliary tool when the image of the auxiliary tool is present in the image information; the virtual image display is enabled to generate the position information of the auxiliary tool according to inertial measurement information of the auxiliary tool when the image of the auxiliary tool is not present in the image information; and the virtual image display is enabled to display an auxiliary indicator for selecting object according to the position information.

Abstract: Embodiments disclosed herein relate to reducing a power consumption of an electronic device while maintaining some functionality of the electronic device while the electronic device is in a low power mode. The device may be in the low power mode due to a battery level being below a threshold. If the battery level is below the threshold, the electronic device may enter the low power mode. However, before entering the low power mode, some functionality of an application processor may be transferred to a communication controller. Once the functionality is transferred, the application processor may be disabled to reduce power consumption while maintaining functionality of the application processor. The electronic device may also utilize various communication protocols to communicate with a peripheral device. Even though the electronic device may be in the low power mode, the communication controller may be used to cause the peripheral device to perform various actions.

Abstract: An application processor includes an application processor including a first processor configured to generate a control signal based on whether user data is changed, wherein the application processor is configured to implement a power manager which dynamically controls power provided to the first processor, in response to the control signal.

Abstract: Embodiments include a power distribution access network comprising power sourcing equipment (PSE) having a hybrid power-data port and at least one remote distribution node coupled to the PSE. The PSE delivers power at a first voltage to the distribution node and the distribution node delivers power at a second voltage to a remote device. Delivery of power to the distribution nodes may be based on information from the distribution node. Other embodiments include a power distribution access network with remote distribution nodes daisy-chained together by hybrid power-data cables so that a power line and a plurality of optical lines pass along the distribution nodes. The optical lines sequentially drop off along the chain and a remainder of the optical lines is indexed at each distribution node. Remote powered devices are coupled to the distribution nodes. Each remote powered device receives power and optical signals from the respective remote distribution node.

Abstract: A memory device, a memory system including the memory device, and a method of operating the memory device are described. The memory device includes a memory cell array including a plurality of planes, a peripheral circuit configured to perform a read operation including a channel initialization operation on a selected memory block among a plurality of memory blocks included in each of the plurality of planes, and a control logic configured to control the peripheral circuit to perform the read operation including the channel initialization operation, and the control logic sets an activation time of the channel initialization operation based on an read mode of the read operation.