Programmable Calculator With Power Saving Feature Patents (Class 713/321)
  • Patent number: 8543851
    Abstract: A system and method for optimizing power distribution in a closed system. In an electronic device, one may apply a plurality of driving algorithms for components that provide different variations functionality. Thus, each component may be operated according to one of several different algorithms depending on the level and manner of functionality needed. In this manner, the overall system may be optimized for any number of operating modes such that each component may conserve electrical power usage while still providing the needed functionality for specific components during each operating mode. Such an optimization assessment may be a function of an economic model applied to the system whereby functionality and components are assigned specific values and costs based on the required functionality for any given task. Thus, the amount of power available may be allocated in an efficient manner based on a cost-benefit analysis.
    Type: Grant
    Filed: December 29, 2010
    Date of Patent: September 24, 2013
    Assignee: STMicroelectronics, Inc.
    Inventors: Steven Srebranig, Mohammed I Alhroub
  • Patent number: 8539273
    Abstract: An electronic device includes a microcontroller (MCU) and a central processing unit (CPU). The CPU enters a sleep mode. The MCU determines whether a charger device is inserted in the electronic device according to whether power is supplied from the charger device, and wakes up the CPU when the charger device is inserted in the electronic device. After being awakened, the CPU detects a type of the charger device, and adjusts charging current from the charger device to the electronic device according to the type of the charger device.
    Type: Grant
    Filed: April 1, 2011
    Date of Patent: September 17, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Li-Ren Li, Chun-Hung Chou
  • Patent number: 8539261
    Abstract: The present invention discloses a power booting sequence control system and the control method thereof, which optimizes a power booting sequence of a plurality of power switches in an integrated circuit. An initial module initializes a target charge value, a preset current budget and a plurality of time intervals. A current lookup module obtains a booting current across a power switch from a built-in current lookup table. A first computing unit and a second computing unit compute a first and a second power switch numbers respectively. A processing module selects the small number of the first and the second power switch number to get a maximum number of power booting switches under the time intervals, and opens the maximum number of the power booting switches. Therefore, the system keeps the in-rush current value under the preset current budget and speeds up the ramp-up time in a power booting state.
    Type: Grant
    Filed: December 6, 2010
    Date of Patent: September 17, 2013
    Assignee: National Tsing Hua University
    Inventors: Shi-Hao Chen, Youn-Long Lin
  • Patent number: 8533506
    Abstract: While an information handling device is in a reduced power state, the information handling device transitions from the reduced power state to a higher power state in response to receiving a message over an established wireless network connection that maintains a presence on a wireless network. In turn, the information handling device processes the message accordingly in the higher power state.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: September 10, 2013
    Assignee: Lenovo (Singapore) Pte. Ltd.
    Inventors: Jeffrey Clark, Mark Charles Davis, Justin Tyler Dubs, Steven Richard Perrin, Jennifer Greenwood Zawacki, Dekui Zhang
  • Patent number: 8527794
    Abstract: An integrated circuit comprising a plurality of functional blocks, each functional block being operative to cause one or more power consuming events, each power consuming event being associated with a respective weight. The integrated circuit also comprises at least one accumulation block for monitoring the functional blocks over a time window and generating a weighted count of the number of occurrences of each power consuming event within the time window; and a power calculation module for calculating a runtime power consumption estimate over the time window using the weighted count. The weighted count may comprise a sum of products of each one of the power consuming events by its respective weight. Calculating the runtime power consumption estimate may comprise averaging the weighted count over the time window to generate a dynamic power estimate, calculating a leakage power estimate over the time window, and summing the dynamic power estimate with the leakage power estimate.
    Type: Grant
    Filed: May 27, 2010
    Date of Patent: September 3, 2013
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Ali Ibrahim, Ashwini Dwarakanath, Daniel Parrenas Shimizu
  • Patent number: 8504855
    Abstract: The aspects enable a computing device or microprocessor to determine a low-power mode that maximizes system power savings by placing selected resources in a low power mode while continuing to function reliably, depending upon the resources not in use, acceptable system latencies, dynamic operating conditions (e.g., temperature), expected idle time, and the unique electrical characteristics of the particular device. The various aspects provide mechanisms and methods for compiling a plurality of low power resource modes to generate one or more synthetic low power resources from which can be selected an optimal low-power mode configuration made up of a set of selected synthetic low power resources.
    Type: Grant
    Filed: December 10, 2010
    Date of Patent: August 6, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Andrew J. Frantz, Norman S. Gargash, Tracy A. Ulmer
  • Patent number: 8498328
    Abstract: A method for managing energy usage of a wireless device during a data transfer in a wireless communication network comprises determining a data rate associated with the data transfer, determining data processing requirements for processing data at the determined data rate, and dynamically adjusting, based on the determined requirements, one or more data processing parameters corresponding to the data transfer.
    Type: Grant
    Filed: October 13, 2009
    Date of Patent: July 30, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Siva Sandeep Dhandu, Christopher C. Riddle, Srividya Kunisetti
  • Patent number: 8495393
    Abstract: A remote power management technology for a cluster system of the present invention can monitor and control the power status of multiple hosts of the cluster system individually, thereby decreasing power consumption of the cluster system. A remote power management system includes a plurality of management nodes, a power proxy server, and a power management server. The management nodes, which manage power of the hosts of the cluster system respectively, are divided into groups. The power proxy server manages each group, monitors the power status of each management node of the group to generate proxy monitoring information, and transmits a power setting command to the management node of the specific host requiring power setting. The power management server monitors the power status of the hosts using the proxy monitoring information and transmits the power setting command to the power proxy server of the group including the management node of the specific host.
    Type: Grant
    Filed: July 22, 2009
    Date of Patent: July 23, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Soo Cheol Oh, Seong Woon Kim, Han Namgoong
  • Patent number: 8489906
    Abstract: A processor includes a first virtual terminal, a second virtual terminal, circuitry coupled to the first virtual terminal for providing current to the first virtual terminal, a first regulating transistor coupled between the first virtual terminal and the second virtual terminal, a first disabling transistor coupled in parallel with the first regulating transistor for selectively disabling the first regulating transistor by directly connecting the second virtual terminal to the first virtual terminal, a second regulating transistor coupled between the second virtual terminal and a first power supply voltage terminal, and a second disabling transistor coupled in parallel with the second regulating transistor for selectively disabling the second regulating transistor by directly connecting the second virtual terminal to the first power supply voltage terminal.
    Type: Grant
    Filed: May 25, 2010
    Date of Patent: July 16, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Ravindraraj Ramaraju, David R. Bearden, Troy L. Cooper
  • Patent number: 8473760
    Abstract: According to one embodiment, a memory system includes a NAND flash memory includes a memory cell array includes pages, and a volatile data register with a storage capacity of one page, and configured to write page data to the memory cell array through the data register, each of the pages includes nonvolatile memory cells and being a unit of data write, a volatile RAM, and a controller includes a power saving mode in which power consumption of the RAM is reduced, and configured to transfer data of the RAM to the data register before entering the power saving mode.
    Type: Grant
    Filed: March 16, 2011
    Date of Patent: June 25, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshikazu Takeyama, Keizo Mori
  • Patent number: 8468371
    Abstract: A datacenter schedules and executes requests to conserve energy. The datacenter uses an event-based opportunistic approach to schedule and run the requests, which provides energy efficiency. The requests are hierarchically batched and sent to the datacenter for scheduling and execution. They are selectively sent over low power links and selectively serviced by low power processors.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: June 18, 2013
    Assignee: International Business Machines Corporation
    Inventors: Rajaram B. Krishnamurthy, Naseer S. Siddique, Casimer M. DeCusatis, Anuradha Rao, Michael Onghena
  • Publication number: 20130151878
    Abstract: An information processing apparatus that is capable of reducing fragmentation of use areas on a memory and of shortening waiting time. The information processing apparatus has a volatile first memory and a nonvolatile second memory. A first control unit starts the information processing apparatus without using a hibernation image when a hibernation image is not stored in the second memory at the time of starting the information processing apparatus, and generates a hibernation image in the second memory. A second control unit starts the information processing apparatus while using a hibernation image when the hibernation image is stored in the second memory at the time of starting the information processing apparatus. A third control unit changes a state of the information processing apparatus to a power saving state while keeping power supply to the first memory in response to completion of the starting of the information processing apparatus.
    Type: Application
    Filed: December 11, 2012
    Publication date: June 13, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: CANON KABUSHIKI KAISHA
  • Patent number: 8463333
    Abstract: A mobile telephone has a rendering functionality for rendering media stored in storage, and a user interface for user control. A host processor controls the communication functionality and the user interface. The co-processor controls the rendering of the media. The host processor has high power consumption in an active mode and low power consumption in a sleep mode. The co-processor conditionally supplies wake-up signals to the host processor. Upon receipt of a particular wake-up signal, the host processor switches from the sleep mode into the active mode. In the active mode, the host processor transfers a particular media segment to the co-processor before switching back to the sleep mode. The co-processor buffers the segment before rendering it. Upon detecting a low buffer level the co-processor supplies a next wake-up signal to the host processor for initiating transfer of a next media segment.
    Type: Grant
    Filed: April 6, 2009
    Date of Patent: June 11, 2013
    Assignee: ST-Ericsson SA
    Inventor: Armand Stuivenwold
  • Patent number: 8458772
    Abstract: In an apparatus, if it is detected that a condition is met to switch the apparatus from the normal power mode to a power saving mode that consumes less power than the normal power mode, a communication speed for the apparatus to communicate via a network is changed, an authentication process is executed, and the apparatus is switched from the normal power mode to the power saving mode when the authentication process is completed.
    Type: Grant
    Filed: March 22, 2010
    Date of Patent: June 4, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventor: Shinichi Uchikawa
  • Patent number: 8457859
    Abstract: A method for preserving battery operation and life during vehicle post idle shutdown, such vehicle having a delayed accessory power mode operative when an ignition state of the vehicle is in a non-engine running condition while an ignition switch of the vehicle is in the ON position to supply accessories in the vehicle the battery. The method includes: detecting whether the vehicle has been in an post idle shutdown condition and brake pedal not pressed and ignition state unchanged; and placing the vehicle in the delayed accessory power mode after detecting that the vehicle has been in an post idle shutdown condition and while the ignition switch is in the ON position.
    Type: Grant
    Filed: November 5, 2008
    Date of Patent: June 4, 2013
    Assignee: Ford Global Technologies, LLC
    Inventors: Bradley Allen Drogosch, Anthony Dwayne Cooprider, Karl William Wojcik, Ronald Patrick Brombach, Ryan Edwin Hanson, Daniel James Card
  • Patent number: 8458495
    Abstract: A disk array controller detects disk drive power-on-reset events that may cause a disk drive to lose uncommitted write data stored in its cache. When an unexpected disk drive power-on-reset event is detected, the disk array controller may initiate an appropriate corrective action. For example, the disk array controller may initiate a disk drive rebuild operation, or may re-send a set of write commands to the disk drive.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: June 4, 2013
    Assignee: Summit Data Systems LLC
    Inventors: Christophe Therene, Paul R. Stonelake, Alex Ga Hing Tang, Richard L. Harris
  • Patent number: 8451759
    Abstract: A WCDMA enabled user equipment device configured to have functions collectively or selectively idle to conserve power. A discontinuous receiver is used to detect and read network messages and report the messages to the computer within the WCDMA enabled user equipment device. The computer then activates functions previously powered down to receive incoming messages for the user of the device. The discontinuous receiver is also used when the device is active to read network messages, freeing a modem of the device to operate on user messaging; and therefore, enhancing user related performance.
    Type: Grant
    Filed: May 19, 2008
    Date of Patent: May 28, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Michael Kohlmann, Tae Hea Nahm, Beomsup Kim, Cormac Conroy
  • Patent number: 8447996
    Abstract: Embodiments related to comparing of a supply voltage are described and depicted.
    Type: Grant
    Filed: May 5, 2011
    Date of Patent: May 21, 2013
    Assignee: Infineon Technologies AG
    Inventors: Jens Barrenscheen, Rainer Herold, Dietmar Koenig, Tim Weyland
  • Patent number: 8447998
    Abstract: Reducing current draw of solid state drives from a shared power supply of a computer at computer startup, each SSD including computer memory, a capacitor, a disk controller, and a charge controller, the disk controller configured to enable the charge controller to charge the capacitor upon receiving a charge command, the SSDs organized into startup groups characterized by a position in a predefined startup order. Upon startup of the computer, beginning with a first startup group in the predefined startup order and until the last startup group in the predefined startup order has received a charge command, embodiments include, sending, by a storage device initiator, a charge command to a startup group to initiate charging of the capacitor of each solid state drive in the startup group and waiting a predefined period of time before sending another charge command to a next startup group in the predefined startup order.
    Type: Grant
    Filed: May 22, 2012
    Date of Patent: May 21, 2013
    Assignee: International Business Machines Corporation
    Inventors: Mark E. Andresen, Joaquin F. Pacheco
  • Patent number: 8447994
    Abstract: One or more computational units of a computer system are selectively altered in terms of performance according to which of the one or more computational units has a higher performance sensitivity than others of the computational units.
    Type: Grant
    Filed: July 24, 2009
    Date of Patent: May 21, 2013
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Sebastien Nussbaum, Alexander Branover, John Kalamatianos
  • Patent number: 8447997
    Abstract: A system including plural storage devices provides a technique for controlling storage devices in which files are located by a file system, and turning on or off the storage devices based on prediction of the start or end of access to the files. A program that manages power to the storage devices and data access to the storage devices via the files includes means or functions for allocating a storage device as an area in which a file is located, for selecting a storage device in which a file is located, for predicting that access to a file is started for commanding turning on power to a storage device based on the prediction that access to a file is started, for predicting that access to a file terminates, and for commanding turning off power to a storage device based on the prediction that access to a file terminates.
    Type: Grant
    Filed: August 17, 2011
    Date of Patent: May 21, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Yasui, Masaaki Shimizu
  • Patent number: 8443209
    Abstract: A power allocation strategy limits performance of a subset of a plurality of computational units in a computer system according to performance sensitivity of each of the plurality of computational units to a change performance capability, e.g., frequency change. The performance of the subset of computational units may be limited by setting a power state in which the subset may be operated and/or reducing a current power state of the subset to a lower power state. The subset whose performance is limited includes computational units that are least performance sensitive according to stored sensitivity data. The subset may include one or more processing cores and performance of the one or more processing cores may be limited in response to a CPU-bounded application or graphics processing unit (GPU)-bounded application being executed.
    Type: Grant
    Filed: July 24, 2009
    Date of Patent: May 14, 2013
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Sebastien Nussbaum, Alexander Branover, John Kalamatianos
  • Patent number: 8443212
    Abstract: A computing device executes a boot process. During boot process execution, the computing device initiates automatic calibration of a battery connected to the computing device.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: May 14, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: John A. Landry, Robert D. Matthews
  • Patent number: 8443214
    Abstract: The present invention relates to a system and method adapted to optimize power consumption in a communication system used in a Gigabit Ethernet environment. The method comprises determining at least one power mode of a host from a plurality of possible host power modes. The method further comprises selecting at least one network interface power management state from a plurality of possible network interface power management states based, at least in part, on the determined power mode.
    Type: Grant
    Filed: September 2, 2010
    Date of Patent: May 14, 2013
    Assignee: Broadcom Corporation
    Inventors: Jonathan Lee, John Lenell, Gregory Youngblood
  • Patent number: 8441972
    Abstract: A WCDMA enabled user equipment device configured to have functions collectively or selectively idle to conserve power. A discontinuous receiver is used to detect and read network messages and report the messages to the host processor within the WCDMA enabled user equipment device. The host processor then activates functions previously powered down to receive incoming messages for the user of the WCDMA device. The discontinuous receiver is also used when the WCDMA device is active to read network messages, freeing a modem of the device to operate on user messaging; and therefore, enhancing user related performance.
    Type: Grant
    Filed: November 16, 2005
    Date of Patent: May 14, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Michael Kohlmann, Tae Hea Nahm, Beomsup Kim, Cormac Conroy
  • Patent number: 8443217
    Abstract: An information processing apparatus including a baseband signal manager, a determining unit, and a power supply controller is connected to one or more apparatus via an interface. The interface includes a signal channel for transmitting baseband signals and a control channel for bidirectionally transmitting control signals. The baseband signal manager transmits a baseband signal sent from a first apparatus to a second apparatus as-is when the information processing apparatus is in a standby power state. The determining unit determines the power state of the second apparatus on the basis of a control signal sent from the second apparatus. When it is determined by the determining unit that the second apparatus is not powered on, the power supply controller suspends power supply to the baseband signal manager.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: May 14, 2013
    Assignee: Sony Corporation
    Inventor: Satoshi Higuchi
  • Patent number: 8433934
    Abstract: Implementations relate to a computer-implemented method, device, and computer readable storage medium for optimizing battery life in a mobile computing device. The method includes determining that a wireless signal associated with a wireless network connection utilized by the mobile computing device is at or below a reception strength threshold; disabling the wireless network connection in response to the wireless signal being at or below the reception strength threshold; acquiring, from one or more motion sensors of the mobile computing device, an amount of motion of the mobile computing device during a predetermined time period; determining whether the amount of motion of the mobile device exceeds a predetermined motion threshold; and enabling the wireless network connection in response to the amount of motion exceeding the predetermined motion threshold.
    Type: Grant
    Filed: June 28, 2012
    Date of Patent: April 30, 2013
    Assignee: Google Inc.
    Inventor: Robert On
  • Patent number: 8429432
    Abstract: A power supply system includes a power supply coupled to a load via a main power rail, and a switch coupled between the power supply and the load on an auxiliary power rail. A controller controls the switch to couple the auxiliary power rail to the load in response to a startup command, and the controller controls the switch to uncouple the load from the auxiliary power rail in response to a shut down command and a low power mode being enabled.
    Type: Grant
    Filed: October 22, 2009
    Date of Patent: April 23, 2013
    Assignee: Dell Products L.P.
    Inventors: Terry Matula, Vaibhav P. Sapre, Stephen Seitsinger, John Stuewe
  • Patent number: 8429431
    Abstract: A system and method of increasing the efficiency of overall power utilization in data centers by integrating a power management approach based on a comprehensive, dynamic model of the data center created with integrated environmental and computational power monitoring to correlate power usage with different configurations of business services utilization, with the techniques of CPU level power management.
    Type: Grant
    Filed: October 21, 2009
    Date of Patent: April 23, 2013
    Assignee: Raritan Americas, Inc.
    Inventors: Naim R. Malik, Christian Paetz, Neil Weinstock, Allen Yang, Vsevolod Onyshkevych, Siva Somasundaram
  • Patent number: 8412965
    Abstract: A forward converter circuit includes a transformer having a primary winding and a secondary winding. A first transistor is coupled in series with the primary winding and a second transistor is coupled in series with the secondary winding. A control circuit generating control signals for controlling operation of the first and second transistors. The control signals are generated responsive to the values in certain triggered counting circuits satisfying programmable thresholds.
    Type: Grant
    Filed: January 17, 2012
    Date of Patent: April 2, 2013
    Assignee: STMicroelectronics, Inc.
    Inventor: Thomas L. Hopkins
  • Patent number: 8412962
    Abstract: A microprocessor including a temperature sensor that monitors a temperature of core logic of the microprocessor during operation thereof, and operating point information from which may be determined N operating points at which the microprocessor core may reliably operate at a first temperature. Each of the N operating points has a different combination of operating frequency and voltage. The N operating points comprise a highest operating point, a lowest operating point, and a plurality of operating points intermediate the highest and lowest operating points. The microprocessor also includes a control circuit that transitions operation of the core logic among the N operating points to attempt to keep the operating temperature of the core logic provided by the temperature sensor within a temperature range whose upper bound is the first temperature.
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: April 2, 2013
    Assignee: VIA Technologies, Inc.
    Inventors: Darius D. Gaskins, Charles John Holthaus
  • Patent number: 8412964
    Abstract: Methods and systems for powering-off a Bluetooth device from a linked device are provided. A device can transmit a Bluetooth signal to a linked device to instruct the linked device to power-off. In this manner, the user need only turn off one device manually which results in all linked devices being powered off. This process can be initiated by a user through a device directly linked with the device to be powered-off or through a device that is indirectly connected, through one or more Bluetooth networks, with the device to be powered-off. This process can also be automatically initiated by a device when a set of predetermined conditions exist. Once instructed to do so, a device can initiate a predetermined power-off process which can involve terminating any ongoing functions and turning off various subsystems. In accordance with the present invention, a user can initiate a power-off of all the devices on a Bluetooth network through a single device.
    Type: Grant
    Filed: June 23, 2011
    Date of Patent: April 2, 2013
    Assignee: Apple Inc.
    Inventors: Michael M. Lee, Jeffrey J. Terlizzi, Christopher D. McKillop
  • Patent number: 8407503
    Abstract: A technique for making a free-running grace period counter safe against lengthy low power state processor sojourns. The grace period counter tracks grace periods that determine when processors that are capable executing read operations have passed through a quiescent state that guarantees the readers will no longer maintain references to shared data. Periodically, one or more processors may be placed in a low power state in which the processors discontinue performing grace period detection operations. Such processors may remain in the low power state for a complete cycle of the grace period counter. This scenario can potentially disrupt grace period detection operations if the processors awaken to see the same grace period counter value. To rectify this situation, processors in a low power state may be periodically awakened at a predetermined point selected prevent the low power state from extending for an entire roll over of the grace period counter.
    Type: Grant
    Filed: September 27, 2010
    Date of Patent: March 26, 2013
    Assignee: International Business Machines Corporation
    Inventor: Paul E. McKenney
  • Patent number: 8400935
    Abstract: A method and an apparatus for providing control information for multi-carrier uplink transmission are disclosed. A wireless transmit/receive unit (WTRU) may set a happy bit for enhanced dedicated channel (E-DCH) transmissions on each uplink carrier considering aggregated transmission capability over all uplink carriers. The happy bit is set to “unhappy” if the WTRU is transmitting as much scheduled data as allowed by a current serving grant, the WTRU has enough power available to transmit at a higher rate, and total E-DCH buffer status (TEBS) requires more than a pre-configured period to be transmitted with a current effective data rate aggregated over all uplink carriers. The WTRU may send scheduling information including power headroom measured on the anchor uplink carrier and/or power headroom measured on the supplementary uplink carrier. For power headroom measurements, the WTRU may initiate a short-lived dedicated physical control channel loop on the supplementary carrier.
    Type: Grant
    Filed: October 31, 2009
    Date of Patent: March 19, 2013
    Assignee: InterDigital Patent Holdings, Inc.
    Inventors: Benoit Pelletier, Diana Pani, Paul Marinier, Christopher R. Cave, Lujing Cai
  • Patent number: 8402292
    Abstract: Implementations of the present invention may involve methods and systems to improve the combined power consumption and thermal response of individual components of a computer system as the components are stressed concurrently during simulation or testing of the system. A group of operating system-level instruction sets for several individual components of the computer system may be designed to stress the components and executed concurrently while power and thermal measurements are taken. The instruction sets may utilize one or more software threads of the computer system or hardware threads such that minimal interference between components occurs as the system is tested. Further, the system components may be partitioned between separate instruction sets. By minimizing the interference between the components while the system is operating, a more accurate power consumption and thermal effect measurements may be taken on the computer system to better approximate the performance of the system.
    Type: Grant
    Filed: October 16, 2009
    Date of Patent: March 19, 2013
    Assignee: Oracle America, Inc.
    Inventors: Alok Parikh, Amandeep Singh
  • Patent number: 8400661
    Abstract: A system and method for promoting environmental behavior by device users are provided. The method includes allocating “green” points to each of a plurality of users. A job request, such as a print job request, is received from one of the users. A cost in points is computed for executing the job request, based on a formula which is designed to promote environmental behavior by the user. The user's allocated points are reduced by the computed cost when the job is performed.
    Type: Grant
    Filed: August 6, 2010
    Date of Patent: March 19, 2013
    Assignee: Xerox Corporation
    Inventors: Maria Antonietta Grasso, Victor Ciriza, Jutta Katharina Willamowski, Yves Hoppenot, Grégoire Gerard, Mathieu Knibiehly
  • Patent number: 8397087
    Abstract: A computer-implemented method for individually managing the power usage of software applications may include: 1) identifying at least one software application installed on a computing device, 2) determining the power usage of the software application, 3) identifying a power-management policy for managing the power usage of the software application independent of the overall power usage of the computing device, and then 4) managing the power usage of the software application independent of the overall power usage of the computing device in accordance with the power-management policy. Various other methods, systems, and computer-readable media are also disclosed.
    Type: Grant
    Filed: May 31, 2010
    Date of Patent: March 12, 2013
    Assignee: Symantec Corporation
    Inventors: Patrick Gardner, Sourabh Satish
  • Publication number: 20130061076
    Abstract: A method is provided in one example embodiment and includes determining that a network storage module has resources for buffering data currently being sent to a local storage module; determining if the local storage module should enter into a power saving mode; and buffering the configurable amount of data at the network storage module while the local storage module is in the power saving mode. In more particular embodiments, the method includes communicating the configurable amount of data to the local storage module after it resumes a normal operating mode. In addition, the method may include communicating at least a portion of the configurable amount of data to the local storage module using a unicast protocol or a multicast protocol.
    Type: Application
    Filed: September 6, 2011
    Publication date: March 7, 2013
    Inventor: William C. VerSteeg
  • Patent number: 8386812
    Abstract: A system that incorporates teachings of the present disclosure may include, for example, a Power Over Ethernet (PoE) device (PD) having a controller to receive signals over a first cable having twisted pair wires from at least one of a network element and a gateway where the network element is associated with a service provider where the gateway is associated with a premises and where the service provider provides network communications to the premises, adjust the signals, transmit the adjusted signals over a second cable having twisted pair wires to at least one of the network element and the gateway, and receive power from at least one of the network element and the gateway, where the power is received over at least one of the first and second cables, where the power is received according to PoE protocol, and where the PD is positioned between the network element and the gateway. Other embodiments are disclosed.
    Type: Grant
    Filed: October 19, 2009
    Date of Patent: February 26, 2013
    Assignee: AT&T Intellectual Property I, LP
    Inventors: James Rembert, Thomas Anschutz, Zhi Cui
  • Patent number: 8386806
    Abstract: A device and system are disclosed. In one embodiment the device includes a programmable power supply management logic. The programmable power supply management logic is capable of managing a plurality of voltage regulators present in a computer system. Additionally, the power supply management logic is integrated into an input/output complex in the computer system.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: February 26, 2013
    Assignee: Intel Corporation
    Inventors: Giap Yong Ooi, Wai Shin Lau
  • Patent number: 8381003
    Abstract: A computer system comprises a computer that includes a plurality of CPU sockets including one or more CPU cores, a crossbar switch, and a memory controller each, and memories connected under the respective plurality of CPU sockets, the plurality of CPU sockets being connected to each other. When all the CPU cores in a CPU socket enter a power saving state and a total amount of memory use falls below a predetermined threshold, the computer relocates contents of the memory connected under the CPU socket to a memory under another CPU socket, thereby eliminating an access to the memory connected under the CPU socket and bringing a whole of the CPU socket into the power saving state.
    Type: Grant
    Filed: August 24, 2010
    Date of Patent: February 19, 2013
    Assignee: NEC Corporation
    Inventors: Kumiko Suzuki, Jun Yokoyama
  • Patent number: 8380999
    Abstract: An electronic user device can provide intelligent power management. The device can monitor information such as charge level and rate of power consumption, and determine an appropriate time to charge the device. If a device is placed on a charger at a time when the device does not require charging, and the charging could potentially shorten the life of the device battery, the device might activate an internal switch or communicate with the charger to prevent the device from being charged. The device can be configured to notify the user when the device should be charged using any number of notification approaches. If the device is unable to be charged during a certain period, or the rate of power consumption exceeds at least one set value, the device can adjust functionality of various components and/or applications in order to conserve power until the device is able to be charged.
    Type: Grant
    Filed: December 20, 2010
    Date of Patent: February 19, 2013
    Assignee: Amazon Technologies, Inc.
    Inventors: Keela N. Robison, Ian W. Freed
  • Patent number: 8381004
    Abstract: A mechanism is provided for scheduling application tasks. A scheduler receives a task that identifies a desired frequency and a desired maximum number of competing hardware threads. The scheduler determines whether a user preference designates either maximization of performance or minimization of energy consumption. Responsive to the user preference designating the performance, the scheduler determines whether there is an idle processor core in a plurality of processor cores available. Responsive to no idle processor being available, the scheduler identifies a subset of processor cores having a smallest load coefficient. From the subset of processor cores, the scheduler determines whether there is at least one processor core that matches desired parameters of the task. Responsive to at least one processor core matching the desired parameters of the task, the scheduler assigns the task to one of the at least one processor core that matches the desired parameters.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: February 19, 2013
    Assignee: International Business Machines Corporation
    Inventors: Elmootazbellah N. Elnozahy, Heather L. Hanson, Freeman L. Rawson, III, Malcolm S. Ware
  • Patent number: 8381000
    Abstract: A demand based power re-allocation system includes one or more subsystems to assign a power allocation level to a plurality of servers, wherein the power allocation level is assigned by priority of the server. The system may throttle power for one or more of the plurality of servers approaching the power allocation level, wherein throttling includes limiting performance of a processor, track server power throttling for the plurality of servers. The method compares power throttling for a first server with power throttling for remaining servers in the plurality of servers and adjusts throttling of the plurality of servers, wherein throttled servers receive excess power from unthrottled servers.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: February 19, 2013
    Assignee: Dell Products L.P.
    Inventors: Alan Brumley, Michael Brundridge, Ashish Munjal
  • Patent number: 8375232
    Abstract: A system and method is described that allows a PoE-capable switch to selectively provide power to one or more remote devices in an instance where power being supplied to the switch itself is limited or failing. In one embodiment, the switch receives a notification from an uninterruptable power supply (UPS) and, in response to receiving the notification, selectively provides power to one or more devices powered by the switch. Selectively providing power to one or more of the devices may include providing power to only a subset of the devices, providing a different amount of power to different ones of the devices, or providing power for different durations to different ones of the devices. In an alternate embodiment, in response to receiving the notification, the switch communicates with a remote device and causes the remote device to activate at least one power saving feature.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: February 12, 2013
    Assignee: Broadcom Corporation
    Inventors: Umer Khan, Kenneth E. Venner
  • Patent number: 8375228
    Abstract: A multiple-node system having a number of nodes has its power utilization managed. A node power cap of a node specifies a maximum power that the node is individually able to utilize. A system-wide power cap specifies a maximum power that the multiple-node system is able to utilize overall. In response to determining that a node power cap of a selected node is to be increased, where a total of the node power caps of all the nodes is equal to the system-wide power cap, the node power caps of one or more nodes are reduced so that the total of the node power caps of all the nodes is less than the system-wide power cap. The node power cap of the selected node is then increased such that the total of the node power caps of all the nodes is equal to or less than the system-wide power cap.
    Type: Grant
    Filed: August 6, 2008
    Date of Patent: February 12, 2013
    Assignee: International Business Machines Corporation
    Inventor: Vivek Kashyap
  • Patent number: 8364987
    Abstract: One embodiment of the present invention provides a system for implementing a sleep proxy. The system starts by receiving a request at the sleep proxy for information pertaining to a service provided by a device. In response to this request, the system determines if the device is a member of a list of devices for which the sleep proxy takes action. If so, the system determines if the sleep proxy can answer the request. If so, the sleep proxy sends a response to the request on behalf of the device. In a variation on this embodiment, if the system cannot answer the request on behalf of the device, the system sends a wakeup packet to the device, wherein the wakeup packet causes the device to exit a power-saving mode so that the device can respond to the request directly.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: January 29, 2013
    Assignee: Apple Inc.
    Inventor: Stuart D. Cheshire
  • Publication number: 20130024706
    Abstract: Power save proxy functionality can be implemented to enable power save devices to switch to a power save mode and still receive communications from legacy communication devices. A first communication device determines that a second communication device is in a power save mode. The first communication device designates itself as a power save proxy for the second communication device that is in the power save mode. In response to detecting packets that are transmitted from a legacy communication device to the second communication device, the first communication device transmits a control message to the second communication device to request the second communication device to exit the power save mode, transmits a hold control message to the legacy communication device to request the legacy communication device to temporarily stop transmitting packets to the second communication device, or stores the packets intended for the second communication device.
    Type: Application
    Filed: December 22, 2011
    Publication date: January 24, 2013
    Applicant: Qualcomm Atheros, Inc.
    Inventors: Srinivas Katar, Lawrence W. Yonge, III, Manjunath Anandarama Krishnam
  • Patent number: RE43995
    Abstract: A printer has a controller configured to give an instruction to a LAN controller, the instruction specifying which one of communication speeds the LAN controller should communicate at. When it is determined that the mode of the printer is changed from a power mode in which power is supplied to the controller to a power mode in which power is not supplied to the controller, the controller instructs the LAN controller to reduce the communication speed. After the instruction to reduce the communication speed is given, a power supply unit cuts off power supply to the controller.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: February 12, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventor: Tadaaki Maeda
  • Patent number: RE44229
    Abstract: A semiconductor integrated circuit device with reduced consumption current is provided. A first step-down circuit stationarily forms internal voltage lower than supply voltage supplied through an external terminal. A second step-down circuit is switched between first mode and second mode according to control signals. In first mode, the internal voltage is formed from the supply voltage supplied through the external terminal and is outputted through a second output terminal. In second mode, operating current for a control system that forms the internal voltage is interrupted and an output high impedance state is established. The first output terminal of the first step-down circuit and the second output terminal of the second step-down circuit are connected in common, and the internal voltage is supplied to internal circuits.
    Type: Grant
    Filed: February 3, 2012
    Date of Patent: May 21, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Masashi Horiguchi, Mitsuru Hiraki