Abstract: A plurality of power budgets are sent to a corresponding plurality of power consumers by a power management point, wherein a total power budget managed by the power management point includes a sum of the plurality of power budgets and an available power budget not assigned to the plurality of power consumers. An additional power request having a power increase amount is received from a first power consumer of the plurality of power consumers. The additional power request is approved when the power increase amount does not exceed the available power budget. The available power budget is decreased by the power increase amount. An approval of the additional power request is sent to the first power consumer.

Abstract: A method and apparatus to control an operating clock frequency of a hard disk drive. The method includes analyzing a command workload, and changing the operating clock frequency of the hard disk drive based on an analysis result. Alternatively, the method includes measuring a time taken to receive a predetermined number of write/read commands and controlling the operating clock frequency of the hard disk drive based on a result of a comparison of the measured time with at least one reference value. An operating clock frequency control block included in the hard disk drive executes the method.

Abstract: An image processor keeps itself capable of executing a communication process with an external apparatus even in an energy-saving state, and offers a job reservation function while reducing power consumption as much as possible. The image processor has an energization switching circuit that makes switchover separately in energizing/deenergizing each of a plurality of function blocks, which execute a job, independent of energization of a Network Interface Card (NIC). The NIC has functions of counting the present time, obtaining a scheduled time and reserved job information on a reserved job to be executed at the scheduled time, identifying the reserved job to be started for execution on the basis of a counted time and the scheduled time included in the reserved job information, and starting up a function block needed for execution of the identified reserved job through control over the energization switching circuit.

Abstract: A processor has: a power table including a plurality of power control registers each rewritably storing power control information; a condition determiner for rewritably storing a plurality of operating conditions (e.g., a comparison address to be compared with the program counter) and determining which one of the plurality of operating conditions is satisfied by a current operation of the processor so as to supply an index signal to select one of the plurality of power control registers based on the determination; and a voltage/clock controller for controlling the power consumption in a control object circuit block according to the power control information in one of the power control registers that is selected by the index signal.

Abstract: A system and method is provided to measure the power consumption of circuits whereby, in one aspect, a processor's temperature is maintained so that its power consumption is measured at the point the processor throttles.

Abstract: The controlling apparatus is provided with: a memory that stores application software; a setting part that sets an operational manner related to power consumption of an apparatus running the application software, corresponding to the application software stored in the memory; and a controller that controls the power consumption of the apparatus according to the operational manner set by the setting part.

Abstract: A computer system including at least one wake-up unit to sense whether a wake-up event occurs in a standby mode to decrease power consumption, a power supplying unit to supply power to the at least one wake-up unit, and a controlling unit to control a power supplying unit to the at least one wake-up unit in the standby mode according to predetermined setting corresponding to whether the at least one wake-up unit is operable.

Abstract: A method for changing power states of a computer sends a shutdown event to all running applications before the computer goes to sleep to prevent data loss in a sleep state of the computer. Furthermore, the method stores a system memory image into a flash memory before the computer goes to the sleep state. Moreover, the method restores the system memory image from the flash memory to the system memory when the computer exit the sleep state to come back the work state.

Abstract: A system and method for modeling a power over Ethernet component using a common information model. With the profiling of components based on the common information model, a remote agent can query status/capabilities or configure a power over Ethernet component based on messaging that is consistent with a power over Ethernet common information model schema.

Abstract: A high speed input/output (HSIO) system and a power saving control method for the HSIO system are provided. The HSIO system has a plurality of transmission speed modes. When an external device is connected to the HSIO system and an auto-configuration link is completed, the power saving control method forcibly sets an interface controller to any desired transmission speed specification in accordance with an actual transmission speed of to-be-transmitted data. Therefore, transmission speed mode of a single physical layer can be changed to achieve a low power transmission.

Abstract: Power management functionality is described for implementing an application in an energy-efficient manner, without substantially degrading overall performance of the application. The functionality operates by identifying at least first data and second data associated with the application. The first data is considered to have a greater potential impact on performance of the application compared to the second data. The functionality then instructs a first set of hardware-level resources to handle the first data and a second set of hardware-level resources to handle the second data. The first set of hardware-level resources has a higher reliability compared to the second set of hardware-level resources. In one case, the first and second hardware-level resources comprise DRAM memory units. Here, the first set of hardware-level resources achieves greater reliability than the second set of hardware-level resources by being refreshed at a higher rate than the second set of hardware-level resources.

Abstract: Disclosed is a method, apparatus and computer program product for reducing memory power consumption in a server system. The server system includes a memory controller and a plurality of Dual Inline Memory Modules (DIMMs). The method for reducing the memory power consumption includes determining a status of a channel of a plurality of channels of the memory controller. The plurality of channels is associated with the plurality of DIMMs of the server system. The status of the channel represents a presence of at least one scheduled transaction in the channel. The method further includes monitoring the status of the channel by checking whether the status of the channel is in an idle mode for a period of at least equal to a first threshold time. Thereafter, the method includes driving the channel into a power down state based on the monitoring of the status of the channel.

Abstract: An integrated circuit comprising a plurality of processing cores, characterised by comprising electrically controllable switches for controlling the supply of power to one or more of the processing cores, a memory for saving state data from at least one of the processing cores and a controller adapted to control the supply of power to one or more of the processing cores such that processing cores can be de-powered.

Abstract: A remote connection system capable of generating a wake-up command and method thereof include a remote connector with a power supply input receiver capable of being connected to a power source and further capable of receiving a power supply for the purpose of powering the remote connector. The remote connector further includes a plurality of input ports allowing the coupling of a connector thereto and providing for the transmission of information thereacross. The remote connector further includes a wireless receiver capable of wirelessly receiving a wireless command and a transmitter capable of generating the wake-up command in response to the wireless command. The remote connector further includes a remote device capable of receiving a user input command, generating the wireless command and thereupon wirelessly transmitting the command to the wireless receiver of the remote connector.

Abstract: In one embodiment, the present invention includes a method for providing power state change information from a plurality of cores of a processor package to a predictor at a periodic interval and generating a prediction to indicate a predicted operation level of the cores during a next operating period. Other embodiments are described and claimed.

Abstract: A system including plural storage devices provides a technique for controlling storage devices in which files are located by a file system, and turning on or off the storage devices based on prediction of the start or end of access to the files. A program that manages power to the storage devices and data access to the storage devices via the files includes means or functions for allocating a storage device as an area in which a file is located, for selecting a storage device in which a file is located, for predicting that access to a file is started for commanding turning on power to a storage device based on the prediction that access to a file is started, for predicting that access to a file terminates, and for commanding turning off power to a storage device based on the prediction that access to a file terminates.

Abstract: A memory power controller comprises a clock generation circuitry for generating a first clock signal and a second clock signal responsive to a source clock and a determination that the source clock has a period greater than a predetermined value. The first clock is generated responsive to a determination that the source clock has a period greater than the predetermined value and the second clock is generated responsive to the determination that the source clock has a period less than the predetermined value. Memory time-out circuitry generates a memory enable/disable signal to control operation of an associated memory responsive to the clock signal and the determination that the source clock has a period greater than the predetermined value. The memory time-out circuitry further synchronizes the memory enable/disable signal with the source clock.

Abstract: A system and method for real-time power estimation. A core may be divided into units. Each unit is simulated to achieve a real power consumption characterization. The power consumption is sampled. Statistical analysis is performed that assumes the core has node capacitance switching behavior that is approximated by a stationary random process with a Poisson distribution. The statistical analysis determines the number of samples to take during a sample interval. The operational frequency, sample interval, and number of samples are used to determine the number of signals to sample. Signals are chosen that have a high correlation with the node capacitance switching behavior, such as clock enable signals on the last stage of a clock distribution system. Weights with tuned values are assigned to each sampled signal. Sampling occurs during every predetermined number of clock cycles. The weights of asserted sampled signals are summed in order to determine a repeatable power estimation value.

Abstract: An apparatus and method for controlling power usage in a computer includes a plurality of computers communicating with a local control device, and a power source supplying power to the local control device and the computer. A plurality of sensors communicate with the computer for ascertaining power usage of the computer, and a system control device communicates with the computer for controlling power usage of the computer.

Abstract: A system and method for secure communication for power over Ethernet (PoE) between a computing device and a switch. Various power management information can be used as inputs in a process for determining a power request/priority. This power management information can be communicated in Layer 2, Layer 3, or higher messaging during initial power allocation and ongoing power reallocation. Encryption of such messaging enables confidentiality, secure allocation processes, and prevention of denial of service attacks.

Abstract: A method for automatically initializing the operational settings of a system from information stored within a non-volatile storage of an integrated circuit so that the operational requirements of the integrated circuit, which may be a microprocessor, are met by the system when the system is operating. During manufacturing test, environmental requirements of the integrated circuit are determined and stored within the non-volatile storage of the integrated circuit. During system initialization, environmental control values such as required operating voltage and frequency and cooling requirements are determined from the test values, which are read from the integrated circuit. The values are read by an interface of the system from an interface of the integrated circuit. System settings are controlled by the values to provide the required operating environment and the values may be captured within the system for subsequent operations and initialization sequences.

Abstract: A method and system for managing peripheral connection wakeup signaling in a processing system supporting multiple virtual machines provides a mechanism by which ownership of a peripheral having system wakeup capability is transferred between virtual machines. The power management event signal is connected to a service processor input that in turn signals a hypervisor to direct the wakeup activity to a particular logical partition in which the virtual machine was last executing. The hypervisor can then determine whether or not to wake up the entire system, or portions thereof and can direct the power management event to the appropriate virtual machine. In particular the peripheral may be an Ethernet adapter supporting Wake-On-LAN capability. State initialization, which is typically ensured by system power cycling is provided instead by controlling power to the standby power source or in some instances by forcing an indication of a disconnect/reconnect of the wakeup signaling connection.

Abstract: A power management method for an information platform, includes holding system configuration information indicating a correspondence between a logical system and a processing module constituting the logical system; holding power management information indicating a correspondence between information with which a type of the logical system can be specified, an operating condition of the logical system, and first power consumption for operating the logical system; selecting the processing module which constitutes the logical system specified by a configuration request by referring to the system configuration information when receiving the configuration request of the logical system; calculating the first power consumption for operating the logical system based on the type and the operating condition included in the configuration request, and the power management information; and determining second power consumption to be supplied to the processing module based on the calculated first power consumption and inform

Abstract: Administering power supplies in a data center including, upon connection of a first power supply through a power line to a circuit breaker in the data center, querying, by a power supply communications device of the first power supply through the power line, a circuit breaker communications device of the circuit breaker for a circuit breaker identification; querying, by the power supply communications device of the first power supply, for a maximum current threshold for the circuit breaker; sending the circuit breaker identification and the maximum current threshold for the circuit breaker to a management module; and determining, by the management module in dependence upon the circuit breaker identification and the maximum current threshold for the circuit breaker, whether to power on a computing device powered by the first power supply including determining whether the circuit breaker is shared by another power supply.

Abstract: Methods and systems for powering-off a Bluetooth device from a linked device are provided. A device can transmit a Bluetooth signal to a linked device to instruct the linked device to power-off. In this manner, the user need only turn off one device manually which results in all linked devices being powered off. This process can be initiated by a user through a device directly linked with the device to be powered-off or through a device that is indirectly connected, through one or more Bluetooth networks, with the device to be powered-off. This process can also be automatically initiated by a device when a set of predetermined conditions exist. Once instructed to do so, a device can initiate a predetermined power-off process which can involve terminating any ongoing functions and turning off various subsystems. In accordance with the present invention, a user can initiate a power-off of all the devices on a Bluetooth network through a single device.

Abstract: A demand based power re-allocation system includes one or more subsystems to assign a power allocation level to a plurality of servers, wherein the power allocation level is assigned by priority of the server. The system may throttle power for one or more of the plurality of servers approaching the power allocation level, wherein throttling includes limiting performance of a processor, and track server power throttling for the plurality of servers. The method compares power throttling for a first server with power throttling for remaining servers in the plurality of servers and adjusts throttling of the plurality of servers, wherein throttled servers receive excess power from unthrottled servers.

Abstract: A method and an apparatus for controlling voltage level and clock signal frequency supplied to a system. The apparatus includes a hardware module, adapted to receive at least one indication of a load of the system and to determine a voltage level and a clock signal frequency to be provided to the system, and a software module, adapted to configure a voltage source and a clock signal source in response to the determination. The method includes: (i) receiving, at a hardware module, indication of a load of a system; (ii) determining, by the hardware module, a voltage level and a clock signal frequency to be provided to the system; and (iii) configuring, by a software module, a voltage source and a clock signal source in response to the determination.

Abstract: A card reader with power-saving function is used for being inserted with a memory card so that a computer can access the memory card through the card reader. When the memory card is inserted in the card reader, the card reader is enabled to operate. On the other hand, when the memory card is not inserted in the card reader, the card reader enters to a power-down mode for saving power.

Abstract: A method for monitoring the supply voltage of an electronic device includes the steps of: determining an operating condition of the electronic device, adjusting a plurality of reference voltages dependent on the operating condition of the electronic device, wherein each of the plurality of reference voltages is adjusted at a different time, and comparing the supply voltage of the electronic device with at least one of the plurality of reference voltages.

Abstract: Dynamic voltage and frequency scaling (DVFS) is an effective way to reduce energy and power consumption in microprocessor units. Current implementations of DVFS suffer from inaccurate modeling of power requirements and usage, and from inaccurate characterization of the relationships between the applicable variables. A system and method is proposed that adjusts CPU frequency and voltage based on run-time calculations of the workload processing time, as well as a calculation of performance sensitivity with respect to CPU frequency. The system and method are processor independent, and can be applied to either an entire system as a unit, or individually to each process running on a system.

Abstract: An information processing apparatus is disclosed as an example. The information processing apparatus sends data to an image forming apparatus and causes the image forming apparatus to generate an image. The information processing apparatus includes a receiving unit configured to receive information that is sent from an image forming apparatus and indicates whether the image forming apparatus has a power saving function, a determination unit configured to determine, on the basis of the information received by the receiving unit, whether the image forming apparatus has the power saving function, and a setting unit configured to perform setting on a communication program in the information processing apparatus so as to reduce a number of times a power saving mode of the image forming apparatus having the power saving function is released due to communication between the information processing apparatus and the image forming apparatus.

Abstract: A system and method for operating system power management in a computing device for power over Ethernet (PoE). Computing devices such as portable computers or embedded devices having an operating system (OS) can leverage power management features in an OS. Power management state information such as user parameters, computing device parameters, application parameters, IT parameters, network parameters, etc. can be used to generate power requests that are acted upon by power sourcing equipment.

Abstract: A system and method for enabling power over Ethernet (PoE) for legacy devices. Legacy devices often represent a large installed base of devices. This installed base of devices (e.g., mobile computing devices) may have little or no PoE functionality. It is a feature of the present invention that an external device (e.g., dongle) can be used to retrofit such an installed base of devices for use with state of the art PoE functionality.

Abstract: An image forming apparatus includes an operating unit, a controller, and a transmission line that connects the operating unit to the controller. The operating unit includes a USB device that transmits data to the controller and receives data from the controller via the transmission line, and the controller includes a USB host that transmits data to the operating unit and receives data from the operating unit via the transmission line.

Abstract: A method and system of adaptive power control based on post package characterization of integrated circuits. Characteristics of a specific integrated circuit are used to adaptively control power of the integrated circuit.

Abstract: Systems and methods of balanced adaptive body bias control. In accordance with a first embodiment of the present invention, a method of balanced adaptive body bias control comprises determining a desirable dynamic condition for circuitry of an integrated circuit. A first dynamic indicator corresponding to the desirable dynamic condition is accessed. Second and third dynamic indicators of the integrated circuit are accessed. A first body biasing voltage is adjusted by an increment so as to change the first dynamic indicator in the direction of the desirable dynamic condition. A second body biasing voltage is adjusted based on a relationship between the second dynamic indicator and the third dynamic indicator.

Abstract: A method and system of adaptive power control. Characteristics of a specific integrated circuit are used to adaptively control power of the integrated circuit.

Abstract: Provided is an image forming apparatus that realizes a distributed control system with a reduced number of power lines, and that has highly reliable power supply and an effective power saving mode. To accomplish this, the image forming apparatus employs a distributed control system including a master CPU, a plurality of sub master CPUs, and a plurality of slave CPUs. The master CPU supplies 5-V power to the sub master CPUs and the slave CPUs in the power saving mode, and supplies 24-V power thereto in a normal mode. Also, the sub master CPUs determine the operating mode in accordance with the level of the supplied power voltage, and operate accordingly.

Abstract: Improved approaches to providing thermal and power management for a computing device are disclosed. These approaches facilitate intelligent control of a processor's clock frequency and/or a fan's speed so as to provide thermal and/or power management for the computing device.

Abstract: A power management system comprises a power management module configured to determine a power draw limit for operating an electronic device by a power source, the power management module configured to control use of power-consuming elements of the electronic device based on a prioritization of the power-consuming elements to limit a power draw by the electronic device from the power source to the power draw limit.

Abstract: A processing system includes a processor (20) having an idle mode node for generating an idle mode signal indicating whether the processor is in an idle mode and a memory (22) having a data retention node for receiving a data retention mode signal. The memory includes circuitry for placing the memory in a low power state responsive to the data retention mode signal. The idle mode signal drives the data retention node, such that the memory is placed in the low power state when the processor is in idle mode.

Abstract: A method for controlling a slotted mode of several systems using one sleep controller enhanced a hybrid sleep controller that performs sleep/wake-up interface of system protocol stacks (PSs) in a hybrid terminal including at least two system PSs used for different communication networks of a mobile communication system. The method includes determining whether there is a shared hardware-waiting system according to a sleep request from a system PS; if there is no shared hardware-waiting system, turning off a clock of the sleep controller and power of shared hardware to enable operation in a real sleep mode; and if there is a shared hardware-waiting system, sending an active command to a corresponding system and simultaneously driving a sleep timer until a time that other systems wake up, to enable operation in a virtual sleep mode.

Abstract: A method and system for estimating processor utilization from power measurements provides an estimate of processor utilization that can be computed outside of the processor and operating system. Measurements of the processor power consumption are gathered over short intervals in a histogram. The idle power consumption of the processor is determined, and a threshold value higher than the idle power consumption level is computed from the idle power consumption. The number of histogram counts for bins greater than the threshold is normalized to the total number of measurements, providing a fractional value that corresponds to the processor utilization over the measurement interval. The fractional value can then be used in a power management algorithm that adjusts the frequency and optionally the voltage of the processor or group of processors based on their utilization.

Abstract: One embodiment disclosed relates to a system for power distribution to network devices. The system includes a plurality of network switches each having an internal power supply and a plurality of ports for connecting to the network devices and an external power supply having a plurality of output ports for connecting to the network switches. The external power supply communicates power available to the network switches. Each network switch determines amounts and priority levels of power for the network devices connected thereto, sums together the amounts at each priority level, determines additional amounts and priority levels of power required beyond the internal power supply capability, and sends a power request to the external power supply. The external power supply allocates power to the network switches depending on the power requests received.

Abstract: Embodiments disclosed herein describe a network interface device including a first powered device controller coupled to first and second power supply lines. A second powered device controller coupled to third and fourth input power supply lines. A dc-dc converter coupled to receive a single signal representing a sum of power signals output by the first and second powered device controllers.

Abstract: A method of optimizing performance of a multi-core chip having a plurality of cores includes the steps of determining a Vdd-frequency SCHMOO characteristic for each of the plurality of cores individually; saving data indicative of the Vdd-frequency SCHMOO characteristics for each of the plurality of cores; configuring the cores to obtain a configuration providing at least one of optimum power consumption and optimum performance, for a given workload, based on the saved data; and saving the configuration such that it may be updated and used on at least one of a periodic and a continual basis.

Abstract: Methods and apparatus to manage communication bus power states are described. In one embodiment, an apparatus comprises a bus including a master node and at least a first slave node, logic to transmit a first power state change request from the master node to the first slave node, logic to receive the first power state change request in the first slave node, and logic to designate the first slave node as the master node when the first slave node denies the first power state change request.

Abstract: An integrated circuit includes a core-logic providing a core-logic output, a latch in communication with the core-logic to store a state of the core-logic output, and an isolation circuit for selectively interconnecting the core-logic output to an input of the latch. The circuit also includes and a power consumption controller in communication with the core-logic, the latch and the isolation circuit, for controlling the latch to store a state of the core-logic output, and output a corresponding signal. The controller is further operable to signal the isolation circuit to isolate the core-logic output from the latch by providing an output corresponding to predetermined value and transition the core-logic from a high power state and a low power state. This prevents transient signals from propagating to interconnected circuit blocks and external devices.

Abstract: A graphics system adapts a performance level to be sufficient to maintain a performance criterion in an acceptable range. In one embodiment, at least one utilization parameter of the core clock domain and the memory clock domain is monitored. In response to detecting an over-utilization condition, the performance level is increased to maintain the desired minimum number of frames per second. In response to detecting an under-utilization condition, the performance level is decreased to reduce power consumption and increase the lifetime of the graphics system.

Abstract: An apparatus and a method for routing data in a radio data communication system having one or more host computers, one or more intermediate base stations, and one or more RF terminals organizes the intermediate base stations into an optimal spanning-tree network to control the routing of data to and from the RF terminals and the host computer efficiently and dynamically. Communication between the host computer and the RF terminals is achieved by using the network of intermediate base stations to transmit the data.