Programmable Calculator With Power Saving Feature Patents (Class 713/321)
  • Patent number: 7900071
    Abstract: A method to manage power in a computing device comprising a controller assembly and a storage assembly comprising a plurality of data storage devices, by selecting a processor parameter, establishing a threshold processor parameter value, establishing a threshold over-parameter time interval, selecting a data storage device parameter, and establishing a nominal data storage device parameter value. The method determines an actual processor parameter value. If the actual processor parameter value is less than or equal to the threshold processor parameter value, the method operates each of the plurality of data storage devices using the nominal data storage device parameter value. If the actual processor parameter value is greater than the threshold processor parameter value, then the method determines an actual over-parameter time interval.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: March 1, 2011
    Assignee: International Business Machines Corporation
    Inventors: Robert H. Bell, Jr., Jose Raul Escalera, Octavian Florin Herescu, Vernon Walter Miller, Michael Declan Roll
  • Patent number: 7895455
    Abstract: Dynamically managing power consumption in a computer system having at least two parallel power converters in order to improve efficiency. A maximum power capacity for each of the power converters is determined and then power consumption of the computer system is monitored. If the power consumption of the computer system can be provided by less than all of the parallel power converters then one or more of the power converters is turned off, such that a reduced number of parallel power converters remains turned on. A reduced maximum power capacity of the reduced number of parallel power converters is determined and a power cap value is set for the computer system that is less than or equal to the reduced maximum power capacity. The computer system is throttled at the power cap to prevent power consumption of the computer system from exceeding the power cap value.
    Type: Grant
    Filed: June 25, 2007
    Date of Patent: February 22, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Alan M. Green, Alan L. Goodrum
  • Patent number: 7895458
    Abstract: A power control apparatus including an active block in which power is always maintained in an on state and an N number of power management units having a hierarchical structure where N is a natural number greater than or equal to 1. Each of the power management units controls power of at least one power domain block Power of a first power management unit of the N number of the power management units is controlled by the active block, and power of an Nth power management unit of the N number of the power management units is controlled by an (N?1)th power management unit.
    Type: Grant
    Filed: August 23, 2007
    Date of Patent: February 22, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Dong Han Kim
  • Patent number: 7894841
    Abstract: A system and method for reducing call establishment delay in wireless network is provided, in which a network node establishes a call to a wireless terminal controlled by an AP via a sever. The wireless terminal notifies the server of its listen interval. In the power saving mode, the wireless terminal wakes up every listen interval and listen the beacon to check whether any buffered packet for it. When the wireless terminal learns from the beacon that there are packets waiting, it communicates with the access point to retrieve them. The server records a listen time at which the wireless terminal will wake tip and listen to the AP based on the listen interval. When a network node calls the wireless terminal, the server buffers the request for a time interval based on the listen time, and then sends the request to the wireless terminal.
    Type: Grant
    Filed: January 14, 2009
    Date of Patent: February 22, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Tai-Xing Yu, Ting-Kai Hung, Hung-Chi Hsu, Shiao-Li Tsao
  • Patent number: 7890781
    Abstract: The operating voltage of an integrated circuit (e.g., a processor) is changed in response to one or more conditions (e.g., a laptop computer is connected to an AC power source). Both the operating frequency and the operating voltage of the integrated circuit are changed. The voltage regulator providing the operating voltage to the integrated circuit is caused to transition between voltage levels using one or more intermediate steps. The integrated circuit continues to operate in the normal manner both at the new voltage and throughout the voltage transition.
    Type: Grant
    Filed: September 23, 2008
    Date of Patent: February 15, 2011
    Assignee: Intel Corporation
    Inventors: Stephen H. Gunther, Robert Greiner, Matthew M. Ma, Kevin Dai
  • Patent number: 7890780
    Abstract: An information handling system may include a processor, a tape drive coupled to the processor, and a cache control module. The cache control module may be configured to receive a request from the processor for the tape drive; determine whether the tape drive is powered off; determine whether the tape drive needs to be powered on to process the request; and respond to the request on behalf of the tape drive if it is determined that (a) the tape drive is powered off and (b) the tape drive does not need to be powered on to process the request.
    Type: Grant
    Filed: February 15, 2008
    Date of Patent: February 15, 2011
    Assignee: Dell Products L.P.
    Inventors: Richard Golasky, Kevin Marks
  • Publication number: 20110035739
    Abstract: An electronic apparatus has a normal mode and an energy saving mode for reducing power consumption, and includes a main control unit, a sub control unit, a main storage unit, and a sub storage unit. The sub control unit includes a processing unit performing a part of an update process by storing software update data in the sub storage unit when a software update request is received during the energy saving mode. The main control unit includes a processing unit performing a rest of the update process by moving or copying the software update data from the sub storage unit to the main storage unit and by updating software stored in the main storage unit with the software update data after the electronic apparatus returns from the energy saving mode to the normal mode.
    Type: Application
    Filed: July 15, 2010
    Publication date: February 10, 2011
    Inventor: Toru Harada
  • Patent number: 7886165
    Abstract: A system and method is described that allows a PoE-capable switch to selectively provide power to one or more remote devices in an instance where power being supplied to the switch itself is limited or failing. In one embodiment, the switch receives a notification from an uninterruptable power supply (UPS) and, in response to receiving the notification, selectively provides power to one or more devices powered by the switch. Selectively providing power to one or more of the devices may include providing power to only a subset of the devices, providing a different amount of power to different ones of the devices, or providing power for different durations to different ones of the devices. In an alternate embodiment, in response to receiving the notification, the switch communicates with a remote device and causes the remote device to activate at least one power saving feature.
    Type: Grant
    Filed: May 24, 2007
    Date of Patent: February 8, 2011
    Assignee: Broadcom Corporation
    Inventors: Umer Khan, Kenneth E. Venner
  • Publication number: 20110030056
    Abstract: Provided is an information processing apparatus capable of protecting against an unauthorized access from outside without increasing load of packet analysis and also capable of performing protection from a device inside a network. The information processing apparatus has a first network interface (illustrated using an NIC as an example) and is communicable with other information processing apparatus via the NIC. The information processing apparatus further has a second network interface (illustrated using an energy saving NIC as an example) for performing communication with other information processing apparatus in place of the NIC. The information processing apparatus executes switching processing for switching a network interface to be operated from the NIC to the energy saving NIC when an unauthorized access from outside is detected. At the time of the switching processing, internal information of the information processing apparatus is saved in the energy saving NIC.
    Type: Application
    Filed: June 29, 2010
    Publication date: February 3, 2011
    Inventor: Shingo TOKUNAGA
  • Publication number: 20110029659
    Abstract: A network device may provide power-aware network proxy services to one or more resources internal to the network device and/or one or more other network devices that may transition to corresponding power saving states. The power saving states may comprise disabling, shutting down, and/or reducing power consumption. The power-aware network proxy service may comprise handling at least some of network communication on behalf of serviced internal resources and/or other network devices, and monitoring for conditions to transition the serviced internal resources and/or other network devices from the corresponding power saving states. The power-aware network proxy services may be provided via a network interface controller (NIC) in the network device.
    Type: Application
    Filed: July 28, 2010
    Publication date: February 3, 2011
    Inventor: Hemal Shah
  • Patent number: 7882378
    Abstract: In an electronic device with a serial ATA interface, upon detection of the issue or reception of a preset command, a confirmation device, such as a CPU, confirms the completion of execution of the command. Upon confirming the completion of execution of the command, a controller, which may also be the CPU, controls shifting of the serial ATA interface to a power saving mode.
    Type: Grant
    Filed: March 5, 2009
    Date of Patent: February 1, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Fubito Igari
  • Patent number: 7873841
    Abstract: A USB bus-powered device in Suspend state that requires active bus state power levels, but has no data transfer need, may initiate Resume signaling to return a USB bus segment to active state, without transferring any data across the bus. A device driver considers both USB device power needs and data transfer activity in deciding to Globally or Selectively Suspend a bus or bus segment. In particular, upon deciding to Suspend a bonus or bus segment, the device driver queries a USB bus-powered device. If the device will require active bus mode power within a predetermined duration, the device will indicate to the device driver to remain an active mode. In this case, the device driver does not direct the USB host to Suspend the bus.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: January 18, 2011
    Assignee: Sony Ericsson Mobile Communications AB
    Inventors: Samuel L. Mullis, II, Mark Steven Frisbee
  • Publication number: 20110010717
    Abstract: A job assigning apparatus connected to a plurality of arithmetic units for assigning a job to each of the arithmetic units, the job assigning apparatus includes a power consumption acquiring processor for acquiring power consumptions with respect to each of the arithmetic units, a selector for selecting one of the arithmetic units as a submission destination in increasing order of the power consumptions acquired by the power consumption acquiring processor, and a job submitting processor for submitting a job to the submission destination.
    Type: Application
    Filed: June 17, 2010
    Publication date: January 13, 2011
    Applicant: Fujitsu Limited
    Inventors: Nobuyoshi Yamaoka, Junichi Ishimine, Ikuro Nagamatsu, Masahiro Suzuki, Tadashi Katsui, Yuji Ohba, Seiichi Saito, Akira Ueda, Yasushi Uraki
  • Publication number: 20110010523
    Abstract: A cascadable arithmetic and logic unit (ALU) which is configurable in function and interconnection. No decoding of commands is needed during execution of the algorithm. The ALU can be reconfigured at run time without any effect on surrounding ALUs, processing units or data streams. The volume of configuration data is very small, which has positive effects on the space required and the configuration speed. Broadcasting is supported through the internal bus systems in order to distribute large volumes of data rapidly and efficiently. The ALU is equipped with a power-saving mode to shut down power consumption completely. There is also a clock rate divider which makes it possible to operate the ALU at a slower clock rate. Special mechanisms are available for feedback on the internal states to the external controllers.
    Type: Application
    Filed: July 27, 2010
    Publication date: January 13, 2011
    Inventors: Martin VORBACH, Robert Münch
  • Patent number: 7861099
    Abstract: A method and apparatus for user activity-based dynamic power management and policy creation for mobile platforms are described. In one embodiment, the method includes the monitoring of one or more sensor values of a mobile platform device to gather sensor activity data. Once the sensor activity data is gathered, the user state may be predicted according to the gathered user activity and an updated user state model. In one embodiment, the user state model is updated according to the sensor activity data. In one embodiment, a switch occurs from the present power management policy to a new power management policy if the new user state differs from a present user state by a predetermined amount. In one embodiment, at least one time-out parameter of a selected power management policy may be adjusted to comply with a predicted user state. Other embodiments are described and claimed.
    Type: Grant
    Filed: September 27, 2006
    Date of Patent: December 28, 2010
    Assignee: Intel Corporation
    Inventors: Georgios N. Theocharous, Nilesh N. Shah, Uttam K. Sengupta, William N. Schilit, Kelan C. Silvester, Robert A. Dunstan
  • Patent number: 7856563
    Abstract: Disk drive power states are managed. Information is received for use in determining a desired power state of a disk drive that is not currently being accessed. The disk drive is caused to have a spun up power state before the disk drive is next accessed.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: December 21, 2010
    Assignee: EMC Corporation
    Inventors: Gilad Sade, Thomas E. Linnell, Adi Ofer
  • Patent number: 7853809
    Abstract: The present disclosure is directed to systems and methods of power management of a device. In a particular embodiment, the method includes determining a first power consumption value for a first power management operating sequence of an electronic device. The method also includes determining a second power consumption value for a second power management operating sequence based on previous activity of the electronic device. The method also includes selecting either the first power management operating sequence or the second power management operating sequence.
    Type: Grant
    Filed: January 11, 2007
    Date of Patent: December 14, 2010
    Assignee: Seagate Technology LLC
    Inventors: Fumin Zhang, Angel Matson, David Scott Seekins
  • Patent number: 7853807
    Abstract: The present invention relates to a transmission reception multimedia apparatus (20) comprising a circuit for communication (9, 8, 10, 3, 7) with means for connection to an audiovisual communication network (21) characterized in that it comprises: a connector (11) of a bus for communication with a source apparatus (17) comprising at least one conductor (VBUS) for the transmission of a supply voltage providing by the source apparatus (17); means of detection (1) of the presence of the said supply voltage, the said means of detection (1) being linked to the connector (11), the said means of detection (1) generating, a detection signal on the appearance of the supply voltage, bound for the communication circuit (9, 8, 10, 3, 7), the said communication circuit (9, 8, 10, 3, 7) being linked to the means of detection, so as to switch via a switching circuit (3) the multimedia apparatus (20) from a first operating mode, termed standby, in which the communication circuit (9, 8, 10, 3, 7) has the minimum of active f
    Type: Grant
    Filed: June 27, 2001
    Date of Patent: December 14, 2010
    Assignee: Thomson Licensing
    Inventors: Jean-Pierre Bertin, Xavier Guitton, Philippe Lepoil
  • Patent number: 7853808
    Abstract: Systems, methods and program codes are provided for selectively adjusting multi-core processor chip structure individual processor core power supply voltages through controlling individual power supplies for each core, in one aspect to ensure that one or more cores operate at clock rates in compliance with one or more performance specifications. Nominal power supply voltage is supplied to a first processing core, and a second core power supply voltage greater or lower than the nominal power supply voltage is supplied to a second processing core, both cores operating in compliance with a reference clock rate specification. The second power supply voltage may be selected from ordered discrete supply voltages derived by progressively lowering the nominal supply voltage, optionally wherein the selected supply voltage also enables the second core to operate within another performance specification.
    Type: Grant
    Filed: January 18, 2007
    Date of Patent: December 14, 2010
    Assignee: International Business Machines Corporation
    Inventors: Dae Ik Kim, Jonghae Kim, Moon J Kim, James R Moulic
  • Patent number: 7849341
    Abstract: An information processing apparatus which can communicate with a printing apparatus that operates in the first electric power state in which electric power necessary for a status response to an external request is supplied and the second electric power state in which no necessary electric power is supplied includes an acquisition unit which acquires a shift notice from the first electric power state to the second electric power state that is transmitted from the printing apparatus, and a control unit which hastens access to the printing apparatus on the basis of the shift notice acquired by the acquisition unit.
    Type: Grant
    Filed: March 20, 2007
    Date of Patent: December 7, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hideki Sugiyama
  • Publication number: 20100299474
    Abstract: According to one embodiment, an information processing apparatus includes a first caching processing module which starts a caching moving image data stored in a storage medium in a memory device when the storage medium is loaded in a media drive, and a second caching processing module which erases all of moving image data items cached in the memory device when the storage medium is ejected from the media drive.
    Type: Application
    Filed: May 19, 2010
    Publication date: November 25, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Gen WATANABE
  • Patent number: 7840820
    Abstract: A storage system of the present invention saves power consumption of the storage system and enhances responsiveness by predicting a disk drive that is to be accessed next on the basis of an access request from a host system, and promptly feeding power to the predicted disk drive. A prediction unit predicts the disk drive which is to be accessed next by the host system, by comparing a recent access request from the host system against a past access pattern that is registered in an access pattern record table. A power control unit feeds power from a power unit to the disk drive predicted by the prediction unit.
    Type: Grant
    Filed: January 12, 2007
    Date of Patent: November 23, 2010
    Assignee: Hitachi, Ltd.
    Inventor: Kentaro Shimada
  • Patent number: 7836319
    Abstract: A power control apparatus includes a driver for controlling an operation of a storage device, a filter driver for monitoring a state of the storage device, and a management program part for controlling a power supply to the storage device. The management program part is configured to output a control signal based upon the monitored state to a control part operatively connected to the storage device.
    Type: Grant
    Filed: July 21, 2006
    Date of Patent: November 16, 2010
    Assignee: LG Electronics Inc.
    Inventors: Jang Geun Oh, Seo Kwang Kim
  • Publication number: 20100287392
    Abstract: A power saving control system includes a memory module, and a main controller. The memory module includes a number of memories. The main controller includes a detecting unit, a determining unit, and a management control unit. The detecting unit is to detect a usage rate of the memory module. The determining unit stores a number of interval parameters denoting a number of usage rate ranges of the memory module, and determine a corresponding interval parameter for the detected usage rate of the memory module. The management control unit stores a number of control instructions corresponding to the number of the interval parameters, and is to invoke a control instruction corresponding to the determined interval parameter, to control corresponding memories of the memory module to work.
    Type: Application
    Filed: June 3, 2009
    Publication date: November 11, 2010
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: SHENG-CHIEH HSU
  • Patent number: 7821489
    Abstract: A data processing apparatus has a first processing unit for processing an input data, a second processing unit responsive to the data processed by the first processing unit for executing a processing dependent on the data and producing a display data, and a display unit having a display drive unit and a display device for displaying the display data. The second processing unit is selectively inactivated and activated under control of the first processing unit to reduce power consumption in the second processing unit. The display drive unit is also selectively inactivated and activated under control of the first processing unit to reduce power consumption in the display unit.
    Type: Grant
    Filed: April 30, 2003
    Date of Patent: October 26, 2010
    Assignee: Panasonic Corporation
    Inventors: Mitsuaki Oshima, Yoshihiro Gohara, Yoshinori Kobayashi, Shozo Fujiwara, Tsuyoshi Uemura
  • Patent number: 7822996
    Abstract: A method for detecting temperature associated with a processor, results of the detecting being used for controlling power dissipation associated with the processor and/or apparatus and/or system employing the same.
    Type: Grant
    Filed: March 19, 2007
    Date of Patent: October 26, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: LaVaughn F. Watts, Jr.
  • Patent number: 7818595
    Abstract: A method, apparatus, article of manufacture, and system, the method including, in some embodiments, determining an impedance of a power distribution network of a load for a range of frequencies, and adjusting a functionality of the load based on a relationship between the impedance of the power distribution network for the range of frequencies and the functionality of the load.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: October 19, 2010
    Assignee: Intel Corporation
    Inventors: Frank William Kern, Edward Stanford
  • Patent number: 7818589
    Abstract: A data transfer apparatus has a plurality of data transfer interfaces, and one of the plurality of data transfer interfaces has a PHY, the PHY being made in a reset state when the data transfer interface is not used.
    Type: Grant
    Filed: August 7, 2006
    Date of Patent: October 19, 2010
    Assignee: Ricoh Company, Ltd.
    Inventor: Hideyuki Watanabe
  • Patent number: 7818592
    Abstract: A token-based power control mechanism for an apparatus including a power controller and a plurality of processing devices. The power controller may detect a power budget allotted for the apparatus. The power controller may convert the allotted power budget into a plurality of power tokens, each power token being a portion of the allotted power budget. The power controller may then assign one or more of the plurality of power tokens to each of the processing devices. The assigned power tokens may determine the power allotted for each of the processing devices. The power controller may receive one or more requests from the plurality of processing devices for one or more additional power tokens. In response to receiving the requests, the power controller may determine whether to change the distribution of power tokens among the processing devices.
    Type: Grant
    Filed: April 18, 2007
    Date of Patent: October 19, 2010
    Assignee: Globalfoundries Inc.
    Inventors: Stephan Meier, Marius Evers
  • Patent number: 7814350
    Abstract: A microprocessor control circuit continuously monitors core logic operating temperature and detects it has risen above a first temperature and responsively iteratively controls a system voltage source to output a next lower one of its N output voltage levels and controls clock generation circuitry of the microprocessor to output a lower one of its M core clock signal frequencies as necessitated by a transition to the next lower output voltage level until the temperature drops below the first temperature. The control circuit detects that the temperature has dropped below a second temperature and responsively iteratively controls the voltage source to output a next higher output voltage level and controls the clock generation circuitry to output a higher core clock signal frequency as permitted by the next higher output voltage level until the operating temperature rises above the second temperature. The M frequencies comprise a highest, lowest, and plurality of intermediate frequencies.
    Type: Grant
    Filed: June 11, 2007
    Date of Patent: October 12, 2010
    Assignee: VIA Technologies, Inc.
    Inventors: Darius D. Gaskins, Charles John Holthaus
  • Patent number: 7814348
    Abstract: In one aspect, there is disclosed a power management device that includes a housing, at least one input port, and at least one output port. Also included is a CPU and a user interface. Electrical circuitry connects the ports, CPU and user interface. The CPU includes a real-time operating system and programs actively controlling a power usage.
    Type: Grant
    Filed: April 25, 2007
    Date of Patent: October 12, 2010
    Assignee: Adaptive Materials, Inc.
    Inventors: Jason B. Krajcovic, Timothy LaBreche, Aaron Crumm
  • Patent number: 7814351
    Abstract: A data storage system and associated method is provided within an enclosure supporting a self-contained plurality of discrete data storage devices configured for connecting with a network device via a network. The data storage system includes a redundant array of independent drives (RAID) container services module in the enclosure that allocates and manages a storage space of the data storage devices for storing primary and redundant data, and a policy engine in the enclosure that continuously and qualitatively characterizes the network load to the data storage system and manages a power distribution to each of the data storage devices based on a predicted utilization that differentiates between access commands for primary data and access commands for redundant data.
    Type: Grant
    Filed: June 28, 2007
    Date of Patent: October 12, 2010
    Assignee: Seagate Technology LLC
    Inventors: Clark Edward Lubbers, David Peter DeCenzo
  • Publication number: 20100241883
    Abstract: A method for controlling power consumption of a Universal Serial Bus (USB) Mass Storage is provided. The USB Mass Storage is electrically connected to a USB port. The method includes: monitoring at least one Test Unit Ready (TUR) command from an operating system (OS) to the USB Mass Storage; and when it is detected that there is no other command from the OS to the USB Mass Storage for a predetermined time period, controlling the USB port to enter a suspend mode in order to save power supplied to the USB Mass Storage. An associated personal computer and a storage medium storing an associated USB Mass Storage driver for controlling power consumption of the USB Mass Storage are further provided, where the personal computer includes the storage medium. In particular, when the USB Mass Storage driver is executed by the personal computer, the personal computer operates according to the method.
    Type: Application
    Filed: March 22, 2009
    Publication date: September 23, 2010
    Inventors: Jen-Hung Liao, Chang-Hao Chiang
  • Publication number: 20100235661
    Abstract: An audio control system and method of an electronic device receives audio streams, but does not play the audio streams when one or more applications are in a mute mode. The system and method mixes the one or more of the audio streams if the volume of the one or more audio streams is not zero, and transmits the mixed audio streams to an audio processor of the electronic device.
    Type: Application
    Filed: January 11, 2010
    Publication date: September 16, 2010
    Applicant: FOXCONN COMMUNICATION TECHNOLOGY CORP.
    Inventors: YEN-KUANG LU, MIEN-CHIH CHEN
  • Publication number: 20100223418
    Abstract: A storage apparatus is provided that is capable of reducing data maintenance management costs with a performance that is both highly reliable and fast. The present invention is storage apparatus where an intermediary device is arranged between a controller and a plurality of disk devices of different performances arranged in a hierarchical manner. The controller unit carries out I/O accesses to and from the disk devices via the intermediary devices based on access requests sent from host apparatus. The intermediary device includes a power saving control function for the disk device and carries out operation control such as spin off and spin up of disk devices in accordance with conditions set in advance.
    Type: Application
    Filed: May 7, 2010
    Publication date: September 2, 2010
    Applicant: HITACHI, LTD.
    Inventors: Hiroyuki KUMASAWA, Takashi Chikusa, Satoru Yamaura
  • Patent number: 7788507
    Abstract: A signal processing apparatus of an electronic device not only cuts off supply of power to a hardware unit from a power supply unit when a control signal associated with a power OFF command is supplied from an instruction input unit, but also turns OFF a switching circuit of an oscillation circuit unit, thereby cutting off supply of power to the oscillation circuit unit. The switching circuit is configured to be turned ON according to input of a signal from an interrupt port unit, and resumes supply of the power to the oscillation circuit unit upon supply of a control signal from the instruction input unit. When supply of a clock signal to a CPU circuit unit from the oscillation circuit unit is resumed, the CPU circuit unit resumes supply of power to the hardware unit from the power supply unit after operation of the CPU circuit unit is stabilized.
    Type: Grant
    Filed: March 29, 2005
    Date of Patent: August 31, 2010
    Assignee: Pioneer Corporation
    Inventor: Kazuya Miyamoto
  • Patent number: 7783907
    Abstract: A method and system are provided for dynamically managing delivery of power to partitionable elements in a computer system while supporting terms of a Service Level Agreement (SLA). Parameters of the SLA are gathered in conjunction with the topology of the computer system. Transactions associated with the SLA are monitored and high and low usage periods are predicted based upon a history of transactions. Power to partitionable elements of the computer system may be adjusted during high and low usage periods. In addition, dynamic management of the partitionable elements is provided in response to current demands. Management of the partitionable elements is all made in compliance with the SLA.
    Type: Grant
    Filed: August 31, 2007
    Date of Patent: August 24, 2010
    Assignee: International Business Machines Corporation
    Inventor: Dean V. Dubinsky
  • Patent number: 7783906
    Abstract: A maximum power usage setting for a computing device is based on one or more of: a user-specified setting corresponding to how often a frequency of a processor of the computing device is likely to have to be decreased to reduce power usage by the computing device; an average frequency of the processor during a previous period in which the computing device was operated; a minimum frequency of the processor during the previous period; a maximum power that the computing device used during the previous period; and, a nominal frequency of the processor. When the computing device starts to use more power than the maximum power usage setting, the power used by the computing device is reduced so as not to exceed the setting, such as by decreasing the frequency at which the processor operates.
    Type: Grant
    Filed: February 15, 2007
    Date of Patent: August 24, 2010
    Assignee: International Business Machines Corporation
    Inventors: Michael R. Turner, Rhonda Seiber Doane
  • Patent number: 7779281
    Abstract: Controlling input power is disclosed. In some embodiments, an in situ measurement of an operating condition in an operating environment is compared to a benchmark, and the comparison is used at least in part to determine whether to change input power.
    Type: Grant
    Filed: December 15, 2005
    Date of Patent: August 17, 2010
    Assignee: Silego Technology, Inc.
    Inventors: Thomas D Brumett, Jr., Ian Chen, Ilbok Lee, Marcelo Martinez
  • Patent number: 7774631
    Abstract: A system for minimizing power consumption of a multiprocessor data storage system is disclosed. The system utilizes processors that are capable of operating at a number of different reduced power modes, such that the processors operate at full power during peak workloads, but can be powered down during low workload times. When the onset of peak loads are detected through monitoring I/Os per second (“IOPS”) and/or response times of the system, the processors are brought out of power-down mode to handle the increased IOPS during the peak loads. In this manner, the majority of the processors only operate at full power when the system experiences peak loads. During normal and low load times, the processors are either operated at reduced power or are powered down. This results in a significant reduction in power consumption of the system.
    Type: Grant
    Filed: June 30, 2007
    Date of Patent: August 10, 2010
    Assignee: EMC Corporation
    Inventor: John K. Walton
  • Patent number: 7770042
    Abstract: A microprocessor includes core logic that operates according to a core clock signal in order to execute program instructions, clock generation circuitry controllable to generate the core clock signal having one of N different possible frequencies, wherein N is more than two, and a control circuit. The control circuit, in response to a request to operate the core logic at a destination frequency, iteratively controls the clock generation circuitry to generate the core clock signal having a new frequency until the core clock signal frequency is the destination frequency. The new core clock signal frequency on each iteration is one of the N different possible frequencies monotonically closer to the destination frequency. The number of iterations is between zero and N?1 depending upon the destination frequency specified and the core clock signal frequency when the request is received.
    Type: Grant
    Filed: June 11, 2007
    Date of Patent: August 3, 2010
    Assignee: VIA Technologies, Inc.
    Inventor: Darius D. Gaskins
  • Publication number: 20100185884
    Abstract: A standby power saving system includes a standby power control module connected to or disposed on a motherboard of a computer for bidirectional signal transmission and transmitting a control signal; and at least one receiving module disposed on at least one AC power line of the computer and/or at least one peripheral apparatus, and connected to the standby power control module for receiving the control signal to switch on or off AC powers of the computer and/or the peripheral apparatus.
    Type: Application
    Filed: April 15, 2009
    Publication date: July 22, 2010
    Inventors: Chieh-Cheng Chen, Chih-Yuan Chang, Ching-Liang Chiu
  • Patent number: 7757108
    Abstract: One embodiment of the present invention provides a system for implementing a sleep proxy. The system starts by receiving a request at the sleep proxy for information pertaining to a service provided by a device. In response to this request, the system determines if the device is a member of a list of devices for which the sleep proxy takes action. If so, the system determines if the sleep proxy can answer the request. If so, the sleep proxy sends a response to the request on behalf of the device. In a variation on this embodiment, if the system cannot answer the request on behalf of the device, the system sends a wakeup packet to the device, wherein the wakeup packet causes the device to exit a power-saving mode so that the device can respond to the request directly.
    Type: Grant
    Filed: December 18, 2007
    Date of Patent: July 13, 2010
    Assignee: Apple Inc.
    Inventor: Stuart D. Cheshire
  • Patent number: 7757107
    Abstract: A server is capable of maintaining a power budget. The server comprises a central processing unit (CPU), a management processor, a power measurement circuit, and a comparison circuit. The comparison circuit receives real time power measurements from the power measurement circuit. A register includes a power budget value from the management processor. The management processor selects a system power performance state for the CPU that utilizes a level of power approximately equal to the power budget value.
    Type: Grant
    Filed: June 27, 2006
    Date of Patent: July 13, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Alan L. Goodrum, Roger E. Tipley, Barry S. Basile
  • Patent number: 7752470
    Abstract: A method and system for power management including device controller-based device use evaluation and power-state control provides improved performance in a power-managed processing system. Per-device usage information is measured and evaluated during process execution and is retrieved from the device controller upon a context switch, so that upon reactivation of the process, the previous usage evaluation state can be restored. The device controller can then provide for per-process control of attached device power management states without intervention by the processor and without losing the historical evaluation state when a process is switched out. The device controller can control power-saving states of connected devices in conformity with the usage evaluation without processor intervention and across multiple process execution slices. The device controller may be a memory controller and the controlled devices memory modules or banks within modules if individual banks can be power-managed.
    Type: Grant
    Filed: December 3, 2003
    Date of Patent: July 6, 2010
    Assignee: International Business Machines Corporation
    Inventors: Hai Huang, Thomas Walter Keller, Jr., Eric Van Hensbergen
  • Patent number: 7742179
    Abstract: An image data processing apparatus shifting to a power saving mode depending on whether a particular process is in progress on an image processing apparatus. A controller examines processes of host computers through a network, and controls a state of supplying power to blocks functioning for an image forming process, the blocks including a rasterizer, a memory, a printer engine, and a compressor/expander.
    Type: Grant
    Filed: September 4, 2003
    Date of Patent: June 22, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventor: Jun Ikeda
  • Patent number: 7743266
    Abstract: A method and system is provided for optimizing the digital filter compensation coefficients of a digitally controlled switched mode power supply within a distributed power system. A power control system comprises at least one point-of-load (POL) regulator having a power conversion circuit adapted to convey power to a load and a digital controller coupled to the power conversion circuit though a feedback loop. The digital controller is adapted to provide a pulse width modulated control signal to the power switch responsive to a feedback measurement of an output of the power conversion circuit. The digital controller further comprises a digital filter having a transfer function defined by plural filter coefficients. The digital controller periodically stores a successive one of a plurality of samples of the feedback measurement. A serial data bus operatively connects the POL regulator to a system controller.
    Type: Grant
    Filed: July 23, 2007
    Date of Patent: June 22, 2010
    Assignee: Power-One, Inc.
    Inventor: Alain Chapuis
  • Patent number: 7739531
    Abstract: An apparatus and method for dynamically controlling the maximum frequency of operation of the IC is provided. The invention optimizes power consumption in a device by measuring a current maximum frequency of operation and adjusting IC operating voltage to provide a desired maximum operating frequency. The invention provides an apparatus and method for controlling multiple voltages in an IC to independently adjust maximum operating frequencies for a plurality of separate portions of the IC. The invention may equally be applied to a group of ICs. The invention further provides a method for calibrating an IC. Thus, the apparatus facilitates the operation of an IC at a minimum voltage for a selected maximum frequency, thereby minimizing power consumption overall a wide range of operating frequencies.
    Type: Grant
    Filed: March 4, 2005
    Date of Patent: June 15, 2010
    Assignee: Nvidia Corporation
    Inventor: Musaravakkam Samaram Krishnan
  • Publication number: 20100138679
    Abstract: An information processing device capable of communicating with a plurality of servers installed within a facility and method are provided. A storage unit stores server information including an installation position and a temperature of each of said servers within said facility. A detection unit detects a group of not-yet-powered-on servers from said plurality of servers. A calculation unit calculates an index value indicating a correlation of heat generation amounts between said not-yet-powered-on server and powered-on servers, based on the server information stored in said storage unit for each detected not-yet-powered-on server. A decision unit decides a server which becomes a power-on target, from said group of the not-yet-powered-on servers, based on the calculated index value of each not-yet-powered-on server. An output unit outputs a decision result which has been decided.
    Type: Application
    Filed: October 29, 2009
    Publication date: June 3, 2010
    Applicant: Fujitsu Limited
    Inventor: Taketoshi YOSHIDA
  • Patent number: 7725741
    Abstract: A computer system and a power supplying method thereof in which noise due to switched power mode is reduced for a user's convenience. The computer system comprises a mode determiner to generate a mode signal comprising a predetermined part corresponding to one among a plurality of power modes; a power supply to supply power having a level of voltage corresponding to the mode signal to a central processing unit; and a mode controller to maintain or convert the predetermined part of the mode signal corresponding to one among the plurality of power modes to lower a difference in the level of voltage when the power mode is switched from a first level of voltage to a second level of voltage, wherein the second level of voltage is higher than the first level of voltage.
    Type: Grant
    Filed: August 8, 2006
    Date of Patent: May 25, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Yeong-bok Choi