Synchronization Maintenance Of Processors Patents (Class 714/12)
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Patent number: 9817576Abstract: A method for updates in a storage system is provided. The method includes writing identifiers, associated with data to be stored, to storage units of the storage system and writing trim records indicative of identifiers that are allowed to not exist in the storage system to the storage units. The method includes determining whether stored data corresponding to records of identifiers is valid based on the records of the identifiers and the trim records.Type: GrantFiled: May 27, 2015Date of Patent: November 14, 2017Assignee: Pure Storage, Inc.Inventors: John Hayes, Brian Gold, Robert Lee
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Patent number: 9798624Abstract: Systems and methods for automated fault recovery. In some embodiments, an Information Handling System (IHS) includes a processor and a Basic I/O System (BIOS) coupled to the processor, the BIOS having program instructions that, upon execution, cause the IHS to: identify a failure during execution of an Operating System; select, by the BIOS, a given one of a plurality of recovery tools previously registered with the BIOS; and launch the given recovery tool by the BIOS.Type: GrantFiled: June 23, 2015Date of Patent: October 24, 2017Assignee: Dell Products, L.P.Inventors: Dirie N. Herzi, Abeye Teshome
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Patent number: 9740537Abstract: A distributed work processing system for processing computational tasks is scalable and fault-tolerant without requiring centralized control. Worker processes running on worker hosts are organized into a logical group and worker coordinators running on worker coordinator hosts coordinate tasks assigned to worker processes. A task store might hold a collection of tasks to be performed by the logical group. A lock database can be used for locking the logical group for coordination by one worker coordinator process at a time. A membership store contains mappings of worker processes to logical groups, and an assignment store indicates which tasks are assigned to which workers. The worker coordinator process has a scanner process to deal with unassigned tasks and deduplicating duplicate assignments. If a worker coordinator does not see enough worker processes, it can instantiate more. If a worker process does not see a worker coordinator, it can instantiate one.Type: GrantFiled: September 29, 2016Date of Patent: August 22, 2017Assignee: AMAZON TECHNOLOGIES, INC.Inventors: AndyGibb Halim, Swapneel Patil
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Patent number: 9705680Abstract: In a transactional memory environment comprising a digest-generating transaction that generates a digest and a digest-checking transaction that compares digests, a computer system identifies a beginning instruction of a digest-generating transaction comprising a plurality of instructions, and an ending instruction of the digest-generating transaction in which committing memory store data is suppressed. A digest is generated based on at least one of a plurality of instructions executed between the beginning instruction and the ending instruction of the digest-generating transaction, wherein the digest is replicable for an error-free execution of the transaction. The computer system saves the digest based on completing the digest-generating transaction, and does not save the digest based on an abort of the digest-generating transaction.Type: GrantFiled: February 3, 2016Date of Patent: July 11, 2017Assignee: International Business Machines CorporationInventors: Michael Karl Gschwind, Valentina Salapura
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Patent number: 9628653Abstract: An image forming apparatus includes: a facsimile portion that transmits and receives data through a telephone line with an outside; a power supply portion that supplies power to the facsimile portion; and a power-saving control portion that is connected to a communication line other than the telephone line and that controls a power supply mode of the power supply portion. When the power supply mode is an off mode, the power supply portion stops the supply of power to the facsimile portion. When a connection state determination portion determines that the connection to the telephone line is disconnected, the power-saving control portion controls a transfer to the off mode based on whether or not a notification of information for making a determination on the transfer to the off mode is provided from an information output device connected to the image forming apparatus through the communication line.Type: GrantFiled: November 13, 2015Date of Patent: April 18, 2017Assignee: KYOCERA Document Solutions Inc.Inventor: Takayuki Ishida
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Patent number: 9607068Abstract: Disclosed herein are system, method, and computer program product embodiments for replicating data in a distributed database system. Data containing a replicated truncation point associated with a replicating system is received via a data path. It can then be determined that the truncation point represents the point at which all data in a transaction log has been replicated (e.g., successfully or safely) and the transaction log can then be truncated at the truncation point (i.e., the data up to the truncation point deflected). Data containing an additional replicated truncation point associated with an additional replicating system via an additional data path may be received. It can then be determined that the additional replicated truncation point represents the point at which all data in the transaction log has been replicated and the transaction log can be then truncated at the additional replicated truncation point.Type: GrantFiled: December 11, 2013Date of Patent: March 28, 2017Assignee: SYBASE, INC.Inventors: Rene Quakkelaar, Martin Pieczonka, Elena Lora
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Patent number: 9585109Abstract: A computer-implemented method for channel switching in a mesh network is described. In one embodiment, a beacon is sent. The beacon includes a channel change request in both proprietary and standard formats. The channel change request includes an instruction to change to a particular channel and a timing synchronization function identifying when the change to the particular channel should occur. The timing synchronization function is used to determine that the time has arrived to change to the particular channel. The particular channel is changed to synchronously with all other access points in a mesh network.Type: GrantFiled: March 7, 2014Date of Patent: February 28, 2017Assignee: Vivint, Inc.Inventor: Venkat Kalkunte
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Patent number: 9563655Abstract: A method, system and computer program product for low loss database backup and recovery. The method commences by transmitting, by a first server to a third server, a copy of a database snapshot backup, the transmitting commencing at a first time. Then capturing, by the first server, a stream of database redo data, the capturing commencing before or upon transmitting the database snapshot backup, and continuing until a third time. The stream of database redo data is received by an intermediate server after which the intermediate server transmits the stream of database redo data to the third server. Now, the third server has the database snapshot backups and the database redo data. The third server can send to a fourth server all or portion of the database redo data to be applied to the copy of the database snapshot backup restored there to create a restored database.Type: GrantFiled: March 8, 2013Date of Patent: February 7, 2017Assignee: ORACLE INTERNATIONAL CORPORATIONInventors: Jin-Jwei Chen, Benedicto Elmo Garin, Jr., Mahesh Baburao Girkar, Raymond Guzman
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Patent number: 9531636Abstract: Embodiments of the present invention relate to a method and apparatus for extending processing capacity of a server side. In one embodiment, there is provided a method of extending processing capacity of the server side, comprising: deciding a job to be offloaded from the server side; partitioning the job into one or more tasks; allocating the one or more tasks to one or more clients in response to http requests transmitted from the one or more clients; receiving, from the http requests transmitted from the one or more clients, responses of the one or more clients to the from the server side one or more tasks.Type: GrantFiled: November 24, 2011Date of Patent: December 27, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Li Li, Xin Hui Li, Wei Xue, Yi Xin Zhao
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Patent number: 9519545Abstract: Techniques, systems, and devices are disclosed for remediating a failed drive in a set of drives, such as a RAID system, without having to physically replace the failed drive. After receiving a signal of an error indicating a specific physical portion on a storage drive in the set of storage drives has caused the drive to fail, the system can unmount the drive from the filesystem while other drives continue to operate. Next, the system can identify one or more files in the filesystem that have associations with the specific physical portion on the failed drive. Next, the system can remount the drive onto the filesystem and subsequently delete the identified files from the filesystem. The system can then perform a direct I/O write to the specific physical portion on the failed drive to force reallocation of the specific physical portion to a different area on the failed drive. The system can also power-cycle the drive before this remediation, e.g., to determine if this remediation can be avoided.Type: GrantFiled: November 11, 2014Date of Patent: December 13, 2016Assignee: Facebook, Inc.Inventor: Mateusz Marek Niewczas
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Patent number: 9503366Abstract: Systems and methods for providing service virtualization endpoint (SVE) redundancy in a two-node, active-standby form. An active-standby pair of SVEs register with a cloud-centric-network control point (CCN-CP) as a single service node (SN) using a virtual IP address for both a control-plane and a data-plane. At any given time, only the active SVE is a host for the control-plane and the data-plane. When a failover happens, the hosting operation is taken over by the standby SVE, therefore the failover will be transparent to CCN-CP and the SN.Type: GrantFiled: November 16, 2011Date of Patent: November 22, 2016Assignee: Cisco Technology, Inc.Inventors: Chao Feng, Samar Sharma, Sriram Chidambaram, Raghavendra J. Rao, Sanjay Hemant Sane, Murali Basavaiah
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Patent number: 9503975Abstract: A system and method for effectively “exchanging” battery power among physically distinct battery-powered devices communicating in a network for optimal conservation of aggregate battery power to preserve and extend the usable life of devices before requiring recharging. The network communication may be wired, wireless, or some combination; the devices may be mobile, fixed, or some combination. This invention improves Internet access where it already exists by making it faster, more reliable, and less expensive. It can also be used to provide Internet service in places where there is none.Type: GrantFiled: March 31, 2014Date of Patent: November 22, 2016Assignee: OPEN GARDEN INC.Inventors: Stanislav Shalunov, Gregory Hazel, Micha Benoliel
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Patent number: 9477285Abstract: The present invention aims to easily maintain a state of less power consumption, by providing a data processing apparatus comprising: a registering unit to register therein data for identifying a packet; a receiving unit to receive a packet transmitted through a network; a determining unit to, in a case where the receiving unit receives the packet while the data processing apparatus is operating in a power saving mode, determine whether or not to return the data processing apparatus from the power saving mode, on the basis of the data registered in the registering unit; an analyzing unit to perform an analysis process to the packet flowing on the network; a displaying unit to display a screen indicating a result of the analysis process by the analyzing unit; and an indicating unit to indicate the data to be registered in the registering unit, through the screen displayed by the displaying unit.Type: GrantFiled: June 25, 2013Date of Patent: October 25, 2016Assignee: CANON KABUSHIKI KAISHAInventor: Minoru Fujisawa
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Patent number: 9471409Abstract: Method, system, and networked embodiments for processing PDSE extended sharing violations are provided. A single special page referred to as a “sync” page is added to the PDSE dataset. The sync page is loaded from DASD to local cache at PDSE dataset open and remains open until the last close of the PDSE dataset. The in-core version of the sync page maintains a list of index update records for all computer systems within a sysplex and the on-DASD version of the sync page maintains a list of index update records for all computer systems connected to shared DASD.Type: GrantFiled: January 24, 2015Date of Patent: October 18, 2016Assignee: International Business Machines CorporationInventors: Philip R. Chauvet, David C. Reed, Thomas C. Reed, Max D. Smith
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Patent number: 9442672Abstract: In a method for replicating data, a first controller receives a request to write data from a device. The first controller communicates with a second controller to obtain information necessary for the second controller to receive the data. The first controller determines settings that allow for the first controller and the second controller to each receive the data using the information necessary for the second controller to receive the data. The first controller sends the settings that allow for the first controller and the second controller to each receive the data to the device. The first controller receives the data sent from the device to the first controller and the second controller based on the settings that allow for the first controller and the second to each receive the data.Type: GrantFiled: November 8, 2013Date of Patent: September 13, 2016Assignee: GLOBALFOUNDRIES INC.Inventors: Janmejay S. Kulkarni, Sapan J. Maniyar, Sarvesh S. Patel, Subhojit Roy
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Patent number: 9438311Abstract: A method of communication between a plurality of network devices and an external electronic device is provided. The method includes receiving, at a first network device, device information and power information from a second network device, where the received device information and power information is transferred over a first communication link on a first network, where the first communication link is formed between a first transceiver of the first network device and a first transceiver of the second network device. The method further includes comparing the received power information with power information of the first network device. The method further includes transferring a portion of the received device information from the first network device over a second communication link on a second network when it is determined based on the comparison that the first network device is better suited than the second network device to communicate on the second network.Type: GrantFiled: August 25, 2015Date of Patent: September 6, 2016Assignee: LOGITECH EUROPE S.A.Inventors: Xavier Caine, Kevin McLintock
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Patent number: 9354612Abstract: A system and method is disclosed for synchronizing device time on various electronic devices. The method and system weigh various factors such as origin of timing signals and elapsed time since last update to determine the most accurate synchronization time.Type: GrantFiled: May 15, 2014Date of Patent: May 31, 2016Assignee: APPLE INC.Inventors: Nicholas V. King, Daniel T. Preston, Duncan Kerr
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Patent number: 9338234Abstract: Disclosed herein are systems and methods for executing programs written in functional style. A distributed computing system receives a program that expresses computation upon one or more sets of distributed key-value pairs (DKVs) and one or more global variables (GVs). The system distributes an assembly that includes at least a compiled binary of the program to the nodes of a computing cluster, with different portions of the DKVs being stored across the plurality of nodes of the computing cluster. The system causes execution of the assembly by each of the plurality of nodes of the computing cluster, the ones of the plurality of nodes executing the assembly using the different portions of the one or more DKVs stored thereon.Type: GrantFiled: April 16, 2014Date of Patent: May 10, 2016Assignee: Microsoft Technology Licensing, LLCInventors: Jin Li, Sanjeev Mehrotra
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Patent number: 9304935Abstract: Performing a transaction in a transactional memory environment for performing transactional executions, the transactional memory environment including a digest-generating transaction to generate a computed digest and a digest-checking transaction to compare computed digests is provided.Type: GrantFiled: January 24, 2014Date of Patent: April 5, 2016Assignee: International Business Machines CorporationInventors: Michael Karl Gschwind, Valentina Salapura
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Patent number: 9298790Abstract: The replication of an asset from a source cluster in a source data center to multiple target clusters in multiple destination data centers. The replication occurs by first estimating or determining a cost parameter associated with copying of the asset from the source cluster to each of at least some of the target clusters. As an example, the cost parameter might be a geographical parameter, but might also be any cost parameter such as a channel bandwidth, channel cost, utilization ratio or the like. Based on the cost parameters, an order of replication priority is determined. Then, the replication is initiated in accordance with the prioritization. The replication may occur in multiple phases, and replication prioritization may occur on a per phase basis.Type: GrantFiled: January 18, 2013Date of Patent: March 29, 2016Assignee: Microsoft Technology Licensing, LLCInventors: Ferry Susanto, Usman Ghani, Koushik Rajaram, Pavel Dournov, Eron D. Wright
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Patent number: 9292289Abstract: Performing a transaction in a transactional memory environment for performing transactional executions, the transactional memory environment including a digest-generating transaction to generate a computed digest and a digest-checking transaction to compare computed digests is provided.Type: GrantFiled: August 11, 2015Date of Patent: March 22, 2016Assignee: International Business Machines CorporationInventors: Michael Karl Gschwind, Valentina Salapura
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Patent number: 9280424Abstract: In accordance with one example, a method for comparing data units is disclosed comprising generating a first digest representing a first data unit stored in a first memory. A first encoded value is generated based, at least in part, on the first digest and a predetermined value. A second digest representing a second data unit stored in a second memory different from the first memory, is generated. A second encoded value is derived based, at least in part, on the second digest and the predetermined value. It is determined whether the first data unit and the second data unit are the same based, at least in part, on the first digest, the first predetermined value, the first encoded value, and the second digest, by first processor. If the second data unit is not the same as the first data unit, the first data unit is stored in the second memory.Type: GrantFiled: March 11, 2014Date of Patent: March 8, 2016Assignee: FalconStor, Inc.Inventors: Wai Lam, Ronald S. Niles, Xiaowei Li
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Patent number: 9274909Abstract: An apparatus and method for error management in an integrated circuit system are presented. An error management unit (EMU) apparatus manages critical and non-critical errors that may be masked or non-masked. An EMU includes an EMU state machine, having a BOOT state, a CONFIG state, a FUNCT state, a WARNING state and an ERROR state. The method discloses transitions in the EMU state machine. While in the ERROR state an error reaction may be applied. The objective of the error reaction is to recover errors by software and hardware means. The EMU may further appropriately alert the system while in ERROR state and therefore be used as a safety mechanism permitting to collect error signals issued by fault detector units and can further cause action on faulty units for recovery purposes.Type: GrantFiled: November 19, 2013Date of Patent: March 1, 2016Assignee: Scaleo ChipInventor: Bruno Sallé
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Patent number: 9215607Abstract: The present invention discloses an active and standby switching interface module, a network element system and a method for synchronizing and detecting link information. In the scheme of the present invention, the standby switching function interface module sends a synchronization detection request message to a synchronization module, and performs synchronization processing on the link information on the standby switching function interface module according to a synchronization detection reply message from the synchronization module, wherein the synchronization detection reply message encapsulates the link information on the active switching function interface module.Type: GrantFiled: May 19, 2010Date of Patent: December 15, 2015Assignee: ZTE CorporationInventors: Heyang Liu, Shubo Guo, Meifeng Zhang
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Patent number: 9208036Abstract: To facilitate dynamic lockstep support, replacement states and/or logic used to select particular cache lines for replacement with new allocations in accord with replacement algorithms or strategies may be enhanced to provide generally independent replacement contexts for use in respective lockstep and performance modes. In some cases, replacement logic that may be otherwise conventional in its selection of cache lines for new allocations in accord with a first-in, first-out (FIFO), round-robin, random, least recently used (LRU), pseudo LRU, or other replacement algorithm/strategy is at least partially replicated to provide lockstep and performance instances that respectively cover lockstep and performance partitions of a cache. In some cases, a unified instance of replacement logic may be reinitialized with appropriate states at (or coincident with) transitions between performance and lockstep modes of operation.Type: GrantFiled: April 19, 2011Date of Patent: December 8, 2015Assignee: Freescale Semiconductor, Inc.Inventor: William C. Moyer
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Patent number: 9195553Abstract: The redundant system includes a redundant server of a first system and a redundant server of a second system. The redundant servers of the first system and the second system operate in lockstep. When a failure occurs in the redundant server of the second system, the redundant server of the first system separates the redundant server of the second system in which the failure has occurred and continues the operation, and then prepares for restoration to a duplexed operation with a configuration in which the failed part is fallen back. When the preparation is completed, both redundant servers of the first system and the second system start a lockstep operation from initialization processing by synchronous reset, and resume the duplexed operation with the configuration in which the failed part is fallen back.Type: GrantFiled: March 14, 2013Date of Patent: November 24, 2015Assignee: NEC CORPORATIONInventor: Yasushi Takemori
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Patent number: 9158610Abstract: A high availability system has an application server communicatively coupled to one or more client machines through a network utilizing stateless communication sessions. The application server manages concurrent execution of tasks on multiple client machines. A task may be dependent on the execution of another task and the dependencies are managed through stages. The application server utilizes a fault tolerance methodology to determine a failure to any one of the components within the system and to perform remedial measures to preserve the integrity of the system.Type: GrantFiled: December 13, 2012Date of Patent: October 13, 2015Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC.Inventor: Mario Zimmermann
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Patent number: 9146883Abstract: A memory device may be equipped with quick erase capability to secure the contents of the memory device. The quick erase capability may effectively permanently disable access to data stored in the memory device instantaneously upon a command being issued, making all previous data written to the memory device unreadable. The quick erase capability may allow use of the memory device for new write operations and for reading the newly written data immediately once the erase command is received and executed. The quick erase capability may begin a physical erase process of data not newly written without altering other aspects of the quick erase. Aspects may be accomplished with one or more bits per row in a memory device.Type: GrantFiled: March 11, 2013Date of Patent: September 29, 2015Assignee: International Business Machines CorporationInventors: Michele M. Franceschini, Hillery C. Hunter, Ashish Jagmohan, Charles A. Kilmer, Kyu-hyoun Kim, Luis A. Lastras-Montano, Warren E. Maule
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Patent number: 9146882Abstract: A memory device may be equipped with quick erase capability to secure the contents of the memory device. The quick erase capability may effectively permanently disable access to data stored in the memory device instantaneously upon a command being issued, making all previous data written to the memory device unreadable. The quick erase capability may allow use of the memory device for new write operations and for reading the newly written data immediately once the erase command is received and executed. The quick erase capability may begin a physical erase process of data not newly written without altering other aspects of the quick erase. Aspects may be accomplished with one or more bits per row in a memory device.Type: GrantFiled: February 4, 2013Date of Patent: September 29, 2015Assignee: International Business Machines CorporationInventors: Michele M. Franceschini, Hillery C. Hunter, Ashish Jagmohan, Charles A. Kilmer, Kyu-hyoun Kim, Luis A. Lastras-Montano, Warren E. Maule
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Patent number: 9135082Abstract: A race detection mechanism can include running threads of a multithreaded program on a processor, the program being configured to produce locksets each of which indicate a set of one or more locks that a thread holds at a point in time. The mechanism can cause a performance monitoring unit included in the processor to monitor memory accesses caused by the threads and to produce samples based on the memory accesses, the samples being indicative of an accessed memory location. The mechanism can detect an existence of a data race condition based on the samples and the locksets. Detecting can include identifying a protected access to a memory location by a first thread of the threads and identifying an unprotected access to the memory location by a second thread of the threads. The process selectively outputs an indication of the data race condition.Type: GrantFiled: May 20, 2011Date of Patent: September 15, 2015Assignee: Google Inc.Inventors: Tianwei Sheng, Neil A. Vachharajani, Stephane Eranian, Robert Hundt
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Patent number: 9075623Abstract: An external Auxiliary Execution Unit (AXU) interface is provided between a processing core disposed in a first programmable chip and an off-chip AXU disposed in a second programmable chip to integrate the AXU with an issue unit, a fixed point execution unit, and optionally other functional units in the processing core. The external AXU interface enables the issue unit to issue instructions to the AXU in much the same manner as the issue unit would be able to issue instructions to an AXU that was disposed on the same chip. By doing so, the AXU on the second programmable chip can be designed, tested and verified independent of the processing core on the first programmable chip, thereby enabling a common processing core, which has been designed, tested, and verified, to be used in connection with multiple different AXU designs.Type: GrantFiled: January 18, 2012Date of Patent: July 7, 2015Assignee: International Business Machines CorporationInventors: Eric O. Mejdrich, Paul E. Schardt, Robert A. Shearer, Corey V. Swenson
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Patent number: 9047078Abstract: An efficient facility for determining resource usage, such as a processor time used by tasks. The determination is performed on behalf of user applications that do not require a call to operating system services. The facility includes an instruction that determines elapsed time and reports it to the user as a single unit of operation.Type: GrantFiled: July 29, 2013Date of Patent: June 2, 2015Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Dan F. Greiner
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Patent number: 9032240Abstract: A method and system for providing high availability services to SCTP applications is disclosed. In one embodiment, a high availability (HA) server system includes an active server and a standby server with a primary redundancy module and a secondary redundancy module, respectively, which are operable for performing a method including forming a control channel between the active server and the standby server, forwarding IP addresses of the active server and the standby server to a client device when an association between the client device and the active server is established, synchronously mirroring a state of a SCTP stack and a state of an application of the active server to the standby server using the control channel, and servicing the client device using the standby server based on the state of the SCTP stack and the state of the application if a failure of the active server is detected.Type: GrantFiled: April 23, 2009Date of Patent: May 12, 2015Assignee: Hewlett-Packard Development Company, L.P.Inventors: Anil Kumar Reddy Sirigiri, Chaitra Maraliga Ramaiah
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Publication number: 20150095699Abstract: A control device according to an exemplary aspect of the present invention, which is included in a sub-system of a plurality of sub-systems included in a fault tolerant system, includes: a packet reception unit that receives data from a processor unit included in the plurality of sub systems each including: the processor unit; an input-output unit; and a signal transmission path, the control device being connected between the processor unit and the input-output unit; and a first transmission unit that transmits error detection data being generated from the data of accessing from the processor unit to the input-output unit in an own sub-system to an companion sub-system when the processor unit is in the lockstep synchronous state, and transmits the data of accessing from a processor unit to the input-output unit in the own sub-system to the companion sub-system when the processor is in a lockstep asynchronous state.Type: ApplicationFiled: September 18, 2014Publication date: April 2, 2015Inventor: Yasuyuki SHIRANO
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Patent number: 8984318Abstract: In a computer system, a standby master processor is configured to serve as a backup processor for an active master processor. A third party replica processor is configured to monitor and record changes on the active master processor when the active master processor is executing, and is further configured to synchronize itself with the standby master processor when the standby master processor takes over execution from the active master processor. Logs of changes are maintained. A negotiation occurs between the standby master processor and the third party replica processor to determine the status of the logs of the standby master processor and the third party replica processor, and logs are applied or paused relating to one or more of the standby master processor and the third party replica processor to synchronize the standby master processor and the third party replica processor.Type: GrantFiled: January 3, 2011Date of Patent: March 17, 2015Assignee: CA, Inc.Inventors: Zhenghua Xu, Ran Shuai, Min Yan, Guodong Li
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Patent number: 8954621Abstract: A peripheral may be connected to a higher-level device. Firmware program data may be downloaded from the higher-level device to the peripheral. The peripheral may include a rewrite control unit for controlling rewriting the program data stored in the peripheral. The program data stored in the peripheral may be rewritten by use of the program data sent from the higher-level device, and then a response, notifying that data rewriting has normally been completed, may be returned to the higher-level device, if the download file includes rewriting permit data. A response, notifying that data rewriting has normally been completed, may be returned to the higher-level device, without rewriting the program data stored in the peripheral by use of the program data sent from the higher-level device, if the download file does not include rewriting permit data.Type: GrantFiled: August 27, 2012Date of Patent: February 10, 2015Assignee: Nidec Sankyo CorporationInventor: Tsutomu Orii
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Patent number: 8943147Abstract: In an embodiment, a plurality of respective context keywords are stored to a plurality of contexts, wherein each of the plurality of respective context keywords is different. In response to sending of a first plurality of instant messages from an electronic device, a first context is selected at the electronic device from among the plurality of contexts. A first context keyword of the plurality of respective context keywords that matches respective first terms in the first plurality of instant messages is stored in the first context. The first plurality of instant messages are stored to a first chat session in the first context that was selected by the selecting. The first context that comprises the first plurality of instant messages and the first context keyword is sent to a recipient device.Type: GrantFiled: December 15, 2010Date of Patent: January 27, 2015Assignee: International Business Machines CorporationInventors: Randall P. Baartman, James E. Carey, Jenny S. Li, John S. Mysak, Amy D. Travis
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Patent number: 8942831Abstract: Apparatus and methods for controlling a system that operates responsive to a plurality of input control signals are disclosed. During operation the system generates a plurality of output status/control signals. A master controller has at least first and second controllers. The first controller outputs and inputs signals over a first communication path, and the second controller outputs and inputs signals over a second communication path. The first and second controllers output signals based on input signals received over the first and second communication paths, respectively, and also based on stored control data. A plurality of input/output modules are provided. Each of the input/output modules has first and second slave controllers. The first slave controller of each of the input/output modules inputs and outputs signals over the first communication path to the first controller, and the second slave controller outputs and inputs signals over the second communication path.Type: GrantFiled: August 9, 2010Date of Patent: January 27, 2015Assignee: EI Electronics LLCInventors: Karl A. Davlin, Adel George Tannous, Alan R. Loudermilk
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Patent number: 8935569Abstract: A control computer system comprising at least two modules (1, 2, 1001, 1002, 1003, 1004, 1021, 1071) which are designed to be redundant with respect to one another. The control computer system having at least one comparison unit (20, 21, 91, 92, 1011, 1012) for monitoring the synchronization state of the at least two redundant modules (1, 2, 1001, 1002, 1003, 1004, 1021, 1071) and for detecting a synchronization error at least one peripheral unit (95, 96, 1022, 1030, 1031, . . . , 1038). At least one switching matrix (21, 1013, 1063) which is set up to allow or block access to the at least two redundant modules or access to the peripheral unit (95, 96, 1022, 1030, 1031, . . .Type: GrantFiled: March 18, 2011Date of Patent: January 13, 2015Assignee: Continental Teves AG & Co. OHGInventors: Lukusa Didier Kabulepa, Thorsten Ehrenberg, Daniel Baumeister
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Patent number: 8930753Abstract: This disclosure provides apparatus, methods and systems for error correction in multi processor systems. Some implementations include a plurality of computing modules, each computing module including a processor. Each processor may include processing state. In some other implementations, each computing module may also include a memory. Upon receiving a signal to perform a partial re-synchronization, a hash of each processor's state data may be performed. In some embodiments, a hash of at least a portion of each computing module's memory data may also be performed. The hashes for each processor are then compared to determine majority hashes and possible minority hashes. Upon identifying a minority hash, the computing module that produced the minority hash may receive new processing state data from one of the computing modules that produced a majority hash.Type: GrantFiled: October 28, 2011Date of Patent: January 6, 2015Assignee: Maxwell Technologies, Inc.Inventors: Robert Hillman, Gale Williamson
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Patent number: 8930754Abstract: A distributed architecture and method for maintaining the integrity of data streams within a multi-pipelined processing environment. The architecture comprising a communications network for carrying a plurality of data streams and a master processor adapted to process one or more messages in at least one of the data streams, the message processing including the creation of one or more data packets within the stream, each packet encapsulating at least a transaction summary of the data that has been processed. The architecture further comprising at least one slave processor per master processor adapted to emulate the transactional state of the master processor by regenerating the data stream as a result of processing the one or more data packets, whereupon in response to an error event on the master processor, the slave processor acts to avoid interrupting the data stream by generating one or more successive data packet(s).Type: GrantFiled: December 8, 2009Date of Patent: January 6, 2015Assignee: BAE Systems PLCInventors: Ian Nussbaum, Ian Grover, Michael Gray
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Patent number: 8923312Abstract: A network element is configured for synchronizing dynamic OSPF data between an active OSPF instance and a backup OSPF instance. Upon an OSPF data synchronization event, the active OSPF instance synchronizes dynamic OSPF data with the backup OSPF instance. Upon receiving the dynamic OSPF data, the backup OSPF instance determines whether the requisite data structures exist. If the data structures do not exist, the backup OSPF instance returns a NACK to the active OSPF instance and clears its dynamic OSPF data. Responsive to receiving the NACK, the active OSPF instance resynchronizes its dynamic OSPF data with the backup OSPF instance.Type: GrantFiled: January 6, 2012Date of Patent: December 30, 2014Assignee: Telefonaktiebolaget L M Ericsson (Publ)Inventors: Ing-Wher Chen, Wenhu Lu, Alfred C. Lindem, III
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Patent number: 8898395Abstract: Methods and systems for maintaining cache consistency are described. A group of instructions is executed. The group of instructions can include multiple memory operations, and also includes an instruction that when executed causes a cache line to be accessed. In response to execution of that instruction, an indicator associated with the group of instructions is updated to indicate that the cache line has been accessed. The cache line is indicated as having been accessed until execution of the group of instructions is ended.Type: GrantFiled: May 15, 2008Date of Patent: November 25, 2014Inventor: Guillermo J. Rozas
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Patent number: 8898515Abstract: In one aspect, a method includes replicating multiple volumes synchronously across storage arrays using data protection agents, determining that a component has failed, trying to recover replication using another component and, if recovery of replication is not possible for a predetermined amount of time, stopping replication for all replicated volumes at a consistent point.Type: GrantFiled: June 28, 2012Date of Patent: November 25, 2014Assignee: EMC International CompanyInventor: Assaf Natanzon
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Patent number: 8880198Abstract: A system for automatically monitoring and controlling an infrastructure or process includes a plurality of remote clients installed along various portions of an industrial infrastructure or an infrastructure performing a process. Each of the remote clients collects data. A plurality of server replicas is in communication with the plurality of remote clients. The server replicas receive the collected data from the remote clients and process the received data. The plurality of remote clients and the plurality of server replicas communicate across an electronic network. The plurality of server replicas includes a state machine replication system that is tolerant of a failure of one or more of the server replicas.Type: GrantFiled: June 5, 2012Date of Patent: November 4, 2014Assignee: Siemens AktiengesellschaftInventors: Stuart Goose, Jonathan Kirsch
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Patent number: 8880941Abstract: Instructing a plurality of worker systems in a distributed computing system to perform a checkpoint. Instructing the worker systems includes receiving timing messages from the plurality of worker systems and determining, based on the received timing messages, a common checkpoint time indicating an estimated amount of time to be taken by the plurality of worker systems to write data to the persistent storage for a subsequent checkpoint. The common checkpoint time is used to determine a checkpoint threshold, and responsive to the determined checkpoint threshold, it is determined whether to perform the checkpoint. Responsive to determining to perform the checkpoint, messages are transmitted to the plurality of worker systems instructing the worker systems to perform the checkpoint.Type: GrantFiled: April 20, 2012Date of Patent: November 4, 2014Assignee: Google Inc.Inventors: Charles Reiss, Grzegorz Malewicz, Matthew H. Austern, James C. Dehnert, Aart J. C. Bik, Grzegorz Czajkowski
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Patent number: 8843783Abstract: Handling failure of a primary group at a first data center that is part of plurality of data centers providing triangular asynchronous replication, includes creating a data mirroring relationship between at least one storage volume at a second data center having a synchronous backup group that is part of the plurality of data centers and at least one storage volume at a third data center having an asynchronous backup group that is part of the plurality of data centers and resuming work at the second data center. Handling failure of a primary group at a first data center may also include synchronizing the at least one storage volume at the second data center with the at least one storage volume at the third data center prior to resuming work at the second data center.Type: GrantFiled: March 31, 2006Date of Patent: September 23, 2014Assignee: EMC CorporationInventors: Gary H. Cox, Brett A. Quinn, Douglas E. Lecrone
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Patent number: 8812654Abstract: The Wireless Integrated Network Sensor Next Generation (WINS NG) nodes provide distributed network and Internet access to sensors, controls, and processors that are deeply embedded in equipment, facilities, and the environment. The WINS NG network is a new monitoring and control capability for applications in transportation, manufacturing, health care, environmental monitoring, and safety and security. The WINS NG nodes combine microsensor technology, low power distributed signal processing, low power computation, and low power, low cost wireless and/or wired networking capability in a compact system. The WINS NG networks provide sensing, local control, remote reconfigurability, and embedded intelligent systems in structures, materials, and environments.Type: GrantFiled: October 21, 2010Date of Patent: August 19, 2014Assignee: Borgia/Cummins, LLCInventors: David C. Gelvin, Lewis D. Girod, William J. Kaiser, William M. Merrill, Frederic Newberg, Gregory J. Pottie, Anton I. Sipos, Sandeep Vardhan
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Patent number: 8798222Abstract: Methods and apparatus are provided for digital linearization of an analog phase interpolator. Up to 2N desired phase values are mapped to a corresponding M bit value, where M is greater than N. A corresponding M bit value is applied to the phase interpolator to obtain a desired one of the 2N desired phase values. A linearized phase interpolator is also provided that accounts for process, voltage, temperature or aging (PVTA) variations.Type: GrantFiled: March 31, 2005Date of Patent: August 5, 2014Assignee: Agere Systems LLCInventors: Mohammad S. Mobin, Gregory W. Sheets, Lane A. Smith, Craig B. Ziemer
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Patent number: 8799706Abstract: A method and system of exchanging information between processors. At least some of the illustrative embodiments may be a method comprising exchanging information between a plurality of processors by writing (by a first processor) a first datum to a logic device and then continuing processing of a user program by the first processor, writing (by a second processor) a second datum to the logic device and then continuing processing of a user program by the second processor, and writing (by the logic device) the first and second datum to each of the first and second processors after all the processors have written their respective datum to the logic device.Type: GrantFiled: January 25, 2005Date of Patent: August 5, 2014Assignee: Hewlett-Packard Development Company, L.P.Inventors: William F. Bruckert, David J. Garcia, Thomas A. Heynemann, James S. Klecka, Jeffrey A. Sprouse