Synchronization Maintenance Of Processors Patents (Class 714/12)
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Patent number: 8230254Abstract: A technology for rescuing an object when a failure occurs in a redundant system. In a synchronization memory, an instance of an object, which includes the virtual function discrimination information for discriminating a memory area where a virtual function corresponding to the object is stored, the class information for discriminating a class corresponding to the object, and the object data to be used for the processing of the object, is stored according to the order of the processing. In a function memory, plural kinds of virtual functions generated for each process to be carried out by the object are stored. When the object of a new active server reproduces the process, the class corresponding to this object is discriminated using the class information, and the virtual function discrimination information of this object is rewritten.Type: GrantFiled: March 29, 2006Date of Patent: July 24, 2012Assignee: Oki Electric Industry Co., Ltd.Inventor: Tomotake Koike
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Patent number: 8225137Abstract: A method is provided in one example embodiment and includes evaluating a first plurality of messages from a media server configured to receive a media stream. The first plurality of messages is indicative of an active state for the media server. The method also includes detecting an anomaly associated with a portion of the first plurality of messages. The anomaly is associated with a failure of the media server. The method can also include activating a failover media server to receive the media stream based on the anomaly, and evaluating a second plurality of messages. The second plurality of messages is indicative of a resumed active state for the media server that experienced the failure. The failover media server can be deactivated based on the resumed active state. Media metadata can be communicated from the failover media server to the media server that experienced the failure.Type: GrantFiled: September 4, 2010Date of Patent: July 17, 2012Assignee: Cisco Technology, Inc.Inventors: Christopher J. White, Jerry B. Scott, Daniel R. Cook, Monica I. Morogan
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Patent number: 8214531Abstract: Systems and techniques to synchronize network configuration for a hardware accelerated network protocol. According to an aspect, a network configuration record is maintained for a hardware-accelerated network-protocol device, a network configuration store is monitored to identify a network configuration change, and the hardware-accelerated network-protocol device is reconfigured, in response to the identified network configuration change, based on the network configuration record and the network configuration change.Type: GrantFiled: October 24, 2002Date of Patent: July 3, 2012Assignee: Emulex Design & Manufacturing CorporationInventors: Bino J. Sebastian, Richard F. Prohaska, James B. Williams
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Patent number: 8201169Abstract: In a computer system running a primary virtual machine (VM) on virtualization software on a primary virtualized computer system (VCS) and running a secondary VM on virtualization software on a secondary VCS, a method for the secondary VM to provide quasi-lockstep fault tolerance for the primary VM includes: as the primary VM is executing a workload, virtualization software in the primary VCS is: (a) causing predetermined events to be recorded in an event log, (b) keeping output associated with the predetermined events pending, and (c) sending the log entries to the virtualization software in the secondary VCS; as the secondary VM is replaying the workload, virtualization software in the secondary VCS is: (a) sending acknowledgements indicating that log entries have been received; (b) when the virtualization software encounters one of the predetermined events, searching the log entries to determine whether a log entry corresponding to the same event was received from the primary VCS, and if so, comparing dataType: GrantFiled: June 15, 2009Date of Patent: June 12, 2012Assignee: VMware, Inc.Inventors: Ganesh Venkitachalam, Rohit Jain, Boris Weissman, Daniel J. Scales, Vyacheslav Malyugin, Jeffrey W. Sheldon, Min Xu
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Publication number: 20120117419Abstract: This disclosure provides apparatus, methods and systems for error correction in multi processor systems. Some implementations include a plurality of computing modules, each computing module including a processor. Each processor may include processing state. In some other implementations, each computing module may also include a memory. Upon receiving a signal to perform a partial re-synchronization, a hash of each processor's state data may be performed. In some embodiments, a hash of at least a portion of each computing module's memory data may also be performed. The hashes for each processor are then compared to determine majority hashes and possible minority hashes. Upon identifying a minority hash, the computing module that produced the minority hash may receive new processing state data from one of the computing modules that produced a majority hash.Type: ApplicationFiled: October 28, 2011Publication date: May 10, 2012Applicant: Maxwell Technologies, Inc.Inventors: Robert Hillman, Gale Williamson
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Patent number: 8166340Abstract: An apparatus for testing a communication circuit includes a detection module and a capture module. The detection module provides an enable signal in response to receiving at least one predetermined plurality of data from a communication device under test. The capture module captures at least one other predetermined plurality of data in response to the enable signal.Type: GrantFiled: June 24, 2008Date of Patent: April 24, 2012Assignee: Litepoint CorporationInventors: Christian Volf Olgaard, Peter Petersen, Kevan Smith
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Patent number: 8160193Abstract: A delay-type phase adjusting circuit including a first variable delay circuit for receiving a reference clock signal and adding a delay to the reference clock signal, for output a phase comparator for receiving an output of the first variable delay circuit and the reference clock signal and detecting a phase difference therebetween a control circuit for generating a control signal for variably controlling a delay value of the first variable delay circuit based on a result of phase comparison by said phase comparator a second variable delay circuit for receiving an input signal and adding a delay to the input signal, for output a computation circuit for receiving a predetermined value and the control signal and variably controlling a delay value of the second variable delay circuit.Type: GrantFiled: June 24, 2008Date of Patent: April 17, 2012Assignee: Renesas Electronics CorporationInventor: Satoshi Yoneda
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Patent number: 8156371Abstract: An apparatus comprises first and second modules configured to operate in a lockstep mode and a reset mode. Each of the first and second modules is configured to asynchronously enter the reset mode when a parent reset signal is asserted at the respective each module. Each of the first and second modules is configured to, in response to the asserted parent reset signal being negated at the respective each module, indicate to the respective other module that the respective each module is ready to exit the reset mode and exit the reset mode when the respective other module has also indicated that the respective other module is ready to exit the reset mode.Type: GrantFiled: June 16, 2009Date of Patent: April 10, 2012Assignee: Honeywell International Inc.Inventors: Brett D. Oliver, Joseph Caltagirone, Christopher Brickner
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Patent number: 8140893Abstract: In a lockstep fault-tolerant system (10), each subsystem (1, 2) includes bridges (71 to 75) positioned between a CPU (21) and memory (11), between a CPU (22) and memory (12), between the CPU (21) and a northbridge (31), between the CPU (22) and the northbridge (31) and between the CPU (21) and the CPU (22) and creates checksums from relayed data, and an FT bus (81) for sending the created checksums to an FT controller (41). Furthermore, the FT controller (41) detects discrepancies by comparing checksums sent from the bridges (71 to 75) and checksums sent from the other subsystem received via a crosslink, and by this detects process discrepancies between the subsystems (1, 2).Type: GrantFiled: March 16, 2010Date of Patent: March 20, 2012Assignee: NEC CorporationInventor: Ryuta Niino
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Patent number: 8140918Abstract: A clock supply method for supplying a clock to a plurality of processing units includes supplying a clock from a first clock supply unit to processing units forming a first group as a primary clock and to processing units forming a second group as a standby clock; supplying a clock from a second clock supply unit including a clock source different from that of the first clock supply unit to the processing units forming the second group as a primary clock and to the processing units forming the first group as a standby clock; and when a processing unit in the first or second group detects an abnormality of the primary clock, switching the standby clock into use in place of the primary clock being supplied to the processing units that has detected the abnormality belongs; wherein the first and second clock supply units supply clocks with the same frequency.Type: GrantFiled: February 26, 2010Date of Patent: March 20, 2012Assignee: Fujitsu LimitedInventors: Hideharu Kanaya, Akiko Ootoshi, Takashi Koguchi, Kensuke Ishida
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Patent number: 8126100Abstract: Communication protocol methods for performing signal synchronization, data transmission, and data acknowledgement between a transmitting device and a receiving device are provided. The methods are characterized by a plurality of transmission lines which are used for performing signal synchronization, data transmission, and data acknowledgement by the communication protocol methods.Type: GrantFiled: March 3, 2008Date of Patent: February 28, 2012Assignee: Princeton Technology CorporationInventors: Kuo-Ting Lin, Tsung-Yuan Tu, Jie-De Hung
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Patent number: 8121707Abstract: Embodiments of the present invention include systems and methods for an online load of logic to a triple module redundant (TMR) control system using a cascading switch and designated controller. Application code having SFC logic may be first downloaded to a designated controller of the TMR system. After download to the designated controller, the other controllers of TMR system may be updated in a cascading (circular) pattern. After updating the second controller with the updated logic, the designated controller may provide correct state information to the second controller.Type: GrantFiled: April 14, 2009Date of Patent: February 21, 2012Assignee: General Electric CompanyInventors: John Michael Karaffa, Justin Chong
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Patent number: 8122120Abstract: An embodiment of the invention is a technique to manage failover and failback. A failover of a first path is detected. The first path corresponds to a first device in a plurality of physical devices having M device types. A connection status of the first device is determined if the failover is detected. The connection status is one of a connected status and a disconnected status. The disconnected status corresponds to the failover. The first path is adjusted according to the connection status.Type: GrantFiled: December 16, 2002Date of Patent: February 21, 2012Assignee: Unisys CorporationInventors: Giridhar Athreya, Chris B. Legg, Juan Carlos Ortiz
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Patent number: 8117496Abstract: A method, system, and article for resolving a silent error is disclosed. A primary program copy runs on a primary host, and a secondary program copy runs on a secondary host. The primary and secondary copies communicate to maintain synchronized execution. A third copy of the data is stored on a storage device as a write operations log and maintained in memory on the primary host while the program is running. The primary copy is synchronized with the secondary copy by computing a first checksum of data on the primary host in response to a read operation local to the primary host, computing a second checksum of data on the secondary host in response to a read operation local to the secondary host, and periodically communicating the first checksum to the secondary host, and resolving any discrepancies between the first and second checksum of data reflecting a silent data error.Type: GrantFiled: June 18, 2009Date of Patent: February 14, 2012Assignee: International Business Machines CorporationInventors: Ahmed M. Bashir, Prasenjit Sarkar, Soumitra Sarkar, Mark J. Seaman, Dinesh K. Subhraveti, Victor S. Wen
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Patent number: 8108718Abstract: One embodiment is a method that performs a local checkpoint at a processing node in a massively parallel processing (MPP) system that executes a workload with a plurality of processing nodes. The local checkpoint is stored in local memory of the processing node. While the workload continues to execute, a global checkpoint is performed from the local checkpoint stored in the local memory.Type: GrantFiled: November 13, 2009Date of Patent: January 31, 2012Assignee: Hewlett-Packard Development Company, L.P.Inventors: Naveen Muralimanohar, Norman Paul Jouppi
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Patent number: 8108715Abstract: A computer-implemented method for resolving split-brain scenarios in computer clusters may include (1) identifying a plurality of nodes within a computer cluster that are configured to collectively perform at least one task, (2) receiving, from a node within the computer cluster, a failure notification that identifies a link-based communication failure experienced by the node that prevents the nodes within the computer cluster from collectively performing the task, and, upon receiving the failure notification, (3) immediately prompting each node within the computer cluster to participate in an arbitration event in order to identify a subset of the nodes that is to assume responsibility for performing the task subsequent to the link-based communication failure. Various other methods, systems, and computer-readable media are also disclosed.Type: GrantFiled: July 2, 2010Date of Patent: January 31, 2012Assignee: Symantec CorporationInventor: Sandeep Agarwal
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Publication number: 20120005525Abstract: An information processing apparatus includes a degeneration control unit and a re-synchronization processing instructing unit. The degeneration control unit degenerates, of a first controller group including a first controller and a second controller group including a second controller, the second control device group when the first and second controller performing a synchronization operation with each other detect occurrence of errors. The re-synchronization processing instructing unit instructs a controller included in the first controller group to execute re-synchronization processing. When another controller different from the first controller receives the instruction for the execution of the re-synchronization processing, the another controller performs interrupt mask setting.Type: ApplicationFiled: September 2, 2011Publication date: January 5, 2012Applicant: FUJITSU LIMITEDInventor: Tamotsu TAKEUCHI
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Patent number: 8090984Abstract: A system and method are provided. The system comprises a first and second processor, and a cross-signaling interface. The first processor executes instructions. The second processor executes the instructions in lockstep with the first processor. The cross-signaling interface is coupled between the first and second processors and is for signaling both an unanticipated altered state a location of the unanticipated altered state in the first processor to the second processor to cause the second processor to emulate the unanticipated altered state in lockstep with the first processor. The method comprises: executing instructions in a first processor; executing the instructions in a second processor in lockstep with the first processor; detecting an error condition in the first processor; transmitting information about the error condition to the second processor; processing the error condition in the first processor; and causing the first and second processor to emulate the error condition in lockstep.Type: GrantFiled: December 10, 2008Date of Patent: January 3, 2012Assignee: Freescale Semiconductor, Inc.Inventors: William C. Moyer, Michael J. Rochford, Davide M. Santo
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Patent number: 8074107Abstract: Replicated instances in a database environment provide for automatic failover and recovery. A monitoring component can periodically communicate with a primary and a secondary replica for an instance, with each capable of residing in a separate data zone or geographic location to provide a level of reliability and availability. A database running on the primary instance can have information synchronously replicated to the secondary replica at a block level, such that the primary and secondary replicas are in sync. In the event that the monitoring component is not able to communicate with one of the replicas, the monitoring component can attempt to determine whether those replicas can communicate with each other, as well as whether the replicas have the same data generation version. Depending on the state information, the monitoring component can automatically perform a recovery operation, such as to failover to the secondary replica or perform secondary replica recovery.Type: GrantFiled: October 26, 2009Date of Patent: December 6, 2011Assignee: Amazon Technologies, Inc.Inventors: Swaminathan Sivasubramanian, Grant Alexander MacDonald McAlister
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Patent number: 8074109Abstract: Techniques are described of using votes of third-party components to select a master processor from a plurality of redundant processors. A master processor and a standby processor maintain communications with one another. If communication between the master processor and the standby processor fails, the processors may poll a set of registered voters to determine which of the processors is to be the master processor. In this way, the processors may determine which of the processors is to be master without the use of a shared indicator to specify which of the processors is to be the master processor.Type: GrantFiled: November 14, 2006Date of Patent: December 6, 2011Assignee: Unisys CorporationInventor: James Roffe
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Patent number: 8055940Abstract: A system and method detects communication error among multiple nodes in a concurrent computing environment. One or more barrier synchronization points/checkpoints or regions are used to check for a communication mismatch. The barrier synchronization point(s)/checkpoint(s) can be placed anywhere in the concurrent computing program. Once a node reaches a barrier synchronization point/checkpoint, it is not allowed to communicate with another node regarding data that is needed to execute the concurrent computing program, even if the other node has not reached the barrier synchronization point/checkpoint. Regions can also, or alternatively, be used to detect a communication mismatch instead of barrier synchronization points/checkpoints. A concurrent program on each node is separated into one or more regions. Two nodes communicate with each other when their regions are compatible. If their regions are not compatible, a communication mismatch occurs.Type: GrantFiled: July 17, 2007Date of Patent: November 8, 2011Assignee: The MathWorks, Inc.Inventors: Edric Ellis, Jocelyn Luke Martin
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Patent number: 8051325Abstract: A multiprocessor system includes a plurality of nodes, each of which includes a plurality of processors, a plurality of memories, and first and second node controllers. Unique identifiers are assigned to all the components.Type: GrantFiled: March 29, 2010Date of Patent: November 1, 2011Assignee: NEC Computertechno Ltd.Inventor: Masaaki Kitano
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Patent number: 8051220Abstract: A process control system is provided having a plurality of I/O devices in communication using a bus. A primary redundant I/O device and a secondary redundant I/O device are coupled to the bus, where the secondary redundant I/O device is programmed to detect a primary redundant I/O device fault. The secondary redundant I/O device, upon detecting the primary redundant I/O device fault, publishes a primary redundant I/O device fault message on the bus. The controller may deactivate the primary redundant I/O device and activate the secondary redundant I/O device responsive to the primary redundant I/O device fault message.Type: GrantFiled: December 23, 2009Date of Patent: November 1, 2011Assignee: Fisher-Rosemount Systems, Inc.Inventors: Michael D. Apel, Steven L. Dienstbier
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Publication number: 20110252270Abstract: A node in a server cluster is designated as a quorum disk. The node stores a list of other nodes in the server cluster also designated as quorum disks. The node can replace the first list with a second and more recent list of quorum disks only if the second list is updated on at least a simple majority of quorum disks on the first list.Type: ApplicationFiled: April 12, 2010Publication date: October 13, 2011Applicant: SYMANTEC CORPORATIONInventors: Sara Abraham, Craig Harmer, Prasanta Dash, Vishal Kher
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Patent number: 8037208Abstract: A method and system for restoring basic functionality to a portable computer system via a server accessed remotely by telephone. A user of a portable computer system which has lost data and software which was held in volatile memory may connect to a server to restore basic functionality to the portable computer system. The server may be an enterprise or a web-based server. The connection may be made, for instance, over a 1-800 or a 1-900 telephone line. The server transfers sufficient software to the RAM of the portable computer for it to regain basic functionality. For example, synchronization software may be transferred to the portable computer. The portable computer may then use the synchronization software to synchronize via the server or host connection more fully in order to restore lost data or lost software applications that were stored on a server or on a host computer system.Type: GrantFiled: July 24, 2007Date of Patent: October 11, 2011Assignee: Access Co., Ltd.Inventor: David Creemer
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Patent number: 8027453Abstract: Systems and methods described herein may be incorporated into a “service marketplace” system that matches users with potential information or service providers and establishes a real-time communications connection between the user and a selected information provider. In one embodiment, an alternate is selected for the user when the service provider that the user is trying to connect with cannot be reached. In an alternative embodiment, the alternates can be used in conjunction with the service provider that does connect with the user in order to provide a second opinion or possibly deeper background information. In one embodiment, the service providers can either be a live person at the other end of the connection or a recording.Type: GrantFiled: July 9, 2007Date of Patent: September 27, 2011Assignee: UTBK, Inc.Inventor: Steven Lurie
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Patent number: 8024292Abstract: Systems and methods for backing up and/or restoring data. When a backup operation is initiated, systems and methods are provided for creating a single snapshot of the backup items, including backup groupings. The single snapshot is used by a backup/recovery application to perform a save process on each backup grouping. By using the same snapshot, the backup is performed based on the same point in time so that the backed up data across the client system is consistent and synchronized. When a recovery operation is initiated, recovery items (e.g., backup groupings, writers and writer components) are selected from backup grouping of the client.Type: GrantFiled: June 29, 2005Date of Patent: September 20, 2011Assignee: EMC CorporationInventors: Dianne C. Thompson, Carolina P. Uhlmann, Janet L. Schneider, Eric A. Herrmann, Patrick M. Simonich, Nathan A. Kryger
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Patent number: 8019036Abstract: In an orthogonal frequency division multiplexed (OFDM) multiple-in multiple-out (MIMO) wireless communication system, a method for correcting sampler clock frequency offset in a receiver comprises acquiring the frequency offset and symbol timing in a received signal by the receiver. The estimated value of a fractional offset is computed, and a correction in the frequency domain based upon the estimated value of the fractional offset is performed.Type: GrantFiled: March 2, 2007Date of Patent: September 13, 2011Assignee: InterDigital Technology CorporationInventors: Peter J. Voltz, Robert Lind Olesen, I-Tai Lu, Chang-Soo Koo, Qingyuan Dai, Yongwen E. Yang, Hui-Yuan Teng
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Patent number: 8019809Abstract: A storage server for efficiently retrieving data from a plurality of disks in response to user access requests. The server comprises a plurality of processors coupled to disjoint subsets of disks, and a custom non-blocking packet switch for routing data from the processors to users. By tightly coupling the processors to disks and employing an application-specific switch, congestion and disk scheduling bottlenecks are minimized. By making efficient use of bandwidth, the architecture is also capable of receiving real-time data streams from a remote source and distributing these data streams to requesting users. The architecture is particularly well suited to video-on-demand systems in which a video server stores a library of movies and users submit requests to view particular movies.Type: GrantFiled: February 16, 2005Date of Patent: September 13, 2011Assignee: Cox Communications, Inc.Inventors: Clement G. Taylor, Danny Chin, Jesse S. Lerman, Steven Zack, William Ashley
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Patent number: 8020041Abstract: A method and a computer system for making a computer achieve high availability. The method includes running a host virtual machine on a host virtual machine container; running a servant virtual machine on the servant virtual machine container; and synchronizing the host virtual machine and the servant virtual machine by using an I/O instruction. The system includes at least two computers including a host computer and a servant computer, each computer including a virtual machine container; a virtual machine running on the virtual machine container; and a communication channel making the virtual machine container execute a virtual machine synchronization operation. The virtual machine synchronization operation of the virtual machine container is triggered by the virtual machine executing I/O instructions.Type: GrantFiled: May 28, 2009Date of Patent: September 13, 2011Assignee: International Business Machines CorporationInventors: Jian Huang, Jin Ling, Yin Ben Xia, Zhe Xiang, Jian Ming Zhang
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Patent number: 8015396Abstract: In a computer system in which a server has, in addition to a disk used for booting, an operation transfer destination disk that has the same content as the boot disk, a method for changing the disk used by the server or another server in the computer system for booting to the operation transfer destination disk is realized by changing the content of the operation transfer destination disk to enable the OS and applications installed in the operation transfer destination disk to be booted from the destination disk and by changing the setting of a boot program of the server to enable booting from the operation transfer destination disk.Type: GrantFiled: September 22, 2008Date of Patent: September 6, 2011Assignee: Hitachi, Ltd.Inventors: Keisuke Hatasaki, Takao Nakajima
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Patent number: 8010846Abstract: Methods and systems for a scalable self-checking processing platform are described herein. According to one embodiment, during an execution frame, a first processing element executes both a high-criticality application and a first low-criticality application. During that same execution frame, a second processing element executes both the high-criticality application and a second low-criticality application. The high-criticality application output from the first processing element is compared with that from the second processing element before the next execution frame, and a fault occurs when the output does not match. The low-criticality application is not duplicated or compared. This and other embodiments allow high-criticality applications to be appropriated checked while avoiding the over-dedication of resources to low-criticality applications that do not warrant self-checking.Type: GrantFiled: April 6, 2009Date of Patent: August 30, 2011Assignee: Honeywell International Inc.Inventors: Byron Birkedahl, Nicholas Wilt, Art McCready, Brendan Hall, Aaron Larson
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Patent number: 8006129Abstract: In an example embodiment the occurrence of the split-brain condition in a High-Availability system, having active and standby processing units, is detected, its cause is diagnosed, and the cause is treated to prevent interruption of service. Diagnosis and treatment procedures are performed at the active processing unit prior to being performed at the standby processing unit.Type: GrantFiled: October 3, 2008Date of Patent: August 23, 2011Assignee: Cisco Technology, Inc.Inventors: Donald E. Banks, Samer L. Theodossy, Frederick A. Frazer, Frederick G. Lewis
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Patent number: 8005172Abstract: An acquisition apparatus includes: a first phase-calculating section that calculates a first correlation value by performing correlating operation of a reception signal and a reference signal and determines whether or not the first correlation value is equal to or greater than a first threshold; a threshold calculating section that calculates a second threshold by performing averaging operation of the first correlation value and the first threshold when the first correlation value is equal to or greater than the first threshold; and a second phase-calculating section that calculates a second correlation value by performing correlating operation of the reception signal and the reference signal on a basis of a phase of the reference signal which realizes the first correlation value equal to or greater than the first threshold, and determines whether or not the second correlation value is equal to or greater than the second threshold.Type: GrantFiled: September 28, 2007Date of Patent: August 23, 2011Assignee: Kabushiki Kaisha ToshibaInventor: Kyungwoon Jang
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Patent number: 7996714Abstract: Systems and methods for redundancy management in fault tolerant computing are provided. The systems and methods generally relate to enabling the use of non-custom, off-the-shelf components and tools to provide redundant fault tolerant computing. The various embodiments described herein, generally speaking, use a decrementer register in a general purpose processor for synchronizing identical operations across redundant general purpose processors, execute redundancy management services in the kernels of commercial off-the-shelf real-time operating systems (RTOS) running on the general purpose processors, and use soft coded tables to schedule operations and assign redundancy management parameters across the general purpose processors.Type: GrantFiled: April 14, 2008Date of Patent: August 9, 2011Assignee: Charles Stark Draper Laboratory, Inc.Inventors: Brendan O'Connell, Joseph Kochocki
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Patent number: 7979739Abstract: Systems and methods for managing a redundant management module are provided. In this regard, a representative system, among others, includes first and second management modules that are configured to manage a computing device; and a programmable logic device that is configured to: instruct the first management module to manage the computing device responsive to detecting that the first management module is ready to manage the computing device, and instruct the second management module to manage the computing device responsive to detecting that the first management module failed to manage the computing device.Type: GrantFiled: August 21, 2008Date of Patent: July 12, 2011Assignee: Hewlett-Packard Development Company, L.P.Inventors: Kum Cheong Adam Chan, Chee Cheng Jeffrey Liang, Boon Siang Choo, Dale Shidla
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Patent number: 7975173Abstract: Fault tolerant operation is disclosed for a primary instance, such as a process, thread, application, processor, etc., using an active copy-cat instance, a.k.a. backup instance, that mirrors operations in the primary instance, but only after those operations have successfully completed in the primary instance. Fault tolerant logic monitors inputs and outputs of the primary instance and gates those inputs to the backup instance once a given input has been processed. The outputs of the backup instance are then compared with the outputs of the primary instance to ensure correct operation. The disclosed embodiments further relate to fault tolerant failover mechanism allowing the backup instance to take over for the primary instance in a fault situation wherein the primary and backup instances are loosely coupled, i.e. they need not be aware that they are operating in a fault tolerant environment.Type: GrantFiled: November 3, 2008Date of Patent: July 5, 2011Inventors: Paul J. Callaway, Robert C. Hagemann, III, Zuber Shethwala, Troy Reece, Paul Andrew Bauerschmidt, Enrico Ferrari
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Patent number: 7971099Abstract: A system and method are provided for improving recovery times in fallover conditions in a multinode data processing system by sending notification of the failure of a server node, which is acting as server for a client application running on a client node, to the client application. In the present invention, this notification is provided by the fallover node acting as backup for the server node. When a client application receives no response from a server for a long time, it assumes that the server has failed and initiates reconnection. The present invention speeds-up the reconnect initiated by the client application by having system level software proactively notify the client application about the server failure. This results in faster recovery for client applications.Type: GrantFiled: April 2, 2008Date of Patent: June 28, 2011Assignee: International Business Machines CorporationInventors: Michael K. Coffey, Manjunath B. Muttur
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Patent number: 7971094Abstract: A failover module generates a user interface to enable an administrative user to define a failover plan for a primary site. The failover plan includes user-specified information for use by multiple operations of a failover process for failing over a server system from the primary site to a failover site. The failover plan can be stored as a data object on a computer system at the failover site. In the event of a serious failure at the primary site, the failover process can be invoked and carried out on the failover site with little or no human intervention, based on the failover plan, to cause the server system to be failed over to the failover site, thereby substantially reducing downtime of the server system and its data.Type: GrantFiled: March 3, 2009Date of Patent: June 28, 2011Assignee: NetApp, Inc.Inventors: Paul M. Benn, Balamurali Palaiah
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Patent number: 7966615Abstract: A backup VM is allowed to enter live execution mode at instruction boundaries but not in the middle of emulation of a single instruction. This is accomplished by having the last log entry of multiple entries generated during emulation of an instruction to have an indication of a “go-live” point and by having the backup VM not replay log entries provided by the primary VM beyond the log entry that indicates the “go-live” point.Type: GrantFiled: November 6, 2008Date of Patent: June 21, 2011Assignee: VMware, Inc.Inventors: Ganesh Venkitachalam, Michael Nelson, Daniel J. Scales
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Patent number: 7958392Abstract: Assigning a processor to a logical partition in a computer supporting multiple logical partitions that include assigning priorities to partitions, detecting a checkstop of a failing processor of a partition, retrieving the failing processor's state, replacing by a hypervisor the failing processor with a replacement processor from a partition having a priority lower than the priority of the partition of the failing processor, and assigning the retrieved state of the failing processor as the state of the replacement processor.Type: GrantFiled: January 6, 2009Date of Patent: June 7, 2011Assignee: International Business Machines CorporationInventors: William J. Armstrong, Naresh Nayar, Gary R. Ricard
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Patent number: 7954153Abstract: A coprocessor includes a calculation unit for executing at least one command, and a securization device. The securization device includes an error detection circuit for monitoring the execution of the command so as to detect any execution error, putting the coprocessor into an error mode by default as soon as the execution of the command begins, and lifting the error mode at the end of the execution of the command if no error has been detected, an event detection circuit for monitoring the appearance of at least one event to be detected, and a masking circuit for masking the error mode while the event to be detected does not happen, and declaring the error mode to the outside of the coprocessor if the event to be detected happens while the coprocessor is in the error mode. Application in particular but not exclusively to coprocessors embedded in integrated circuits for smart cards.Type: GrantFiled: April 5, 2006Date of Patent: May 31, 2011Assignee: STMicroelectronics SAInventors: Frédéric Bancel, Nicolas Berard
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Patent number: 7950019Abstract: A computer implemented method, apparatus, and computer program product for a checkpoint process associated with a device driver in a workload partitioned environment. In response to initiation of a checkpoint process, a stream is frozen. The stream comprises a set of kernel modules driving a device. Freezing the stream prevents any module in the set of kernel modules from sending any messages, other than a checkpoint message, to another module in the set of kernel modules. The message block for each module in the set of kernel modules is updated with internal data to form a restart message. The internal data is data describing a state of the module in the set of kernel modules.Type: GrantFiled: May 21, 2007Date of Patent: May 24, 2011Assignee: International Business Machines CorporationInventors: David Jones Craft, Rajeev Mishra, Lance Warren Russell
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Patent number: 7948948Abstract: The present invention discloses a base band processing module N+M backup method based on switch, is characterized in that: a switch unit is added between RF transceiver unit and base band processing unit, and IQ signal forwarding between base band processing modules of the base band processing unit and RF transceiver modules of the RF transceiver unit is performed by the switch unit; handing over the functions of the base band processing module in trouble to a backup base band processing module by resetting the switch unit and modifying the path of receiving and transmitting IQ signal, therefore realizing the N+M backup for base band processing module. The present invention can effectively realize the N+M backup for the base band processing module by adding a switch unit, therefore solving the technical problem of complexity and high cost for wiring and interfacing when having a large number of BBP and TRX modules.Type: GrantFiled: December 21, 2004Date of Patent: May 24, 2011Assignee: ZTE CorporationInventors: Junwen Xu, Zhengrong Lai, Zhonglei Shao
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Patent number: 7944814Abstract: A system, method and apparatus for communication is provided which includes maintaining a primary and a secondary network media devices at substantially similar encryption state, wherein the secondary network media device is a redundant network media device. Similar encryption state may be maintained by copying reception and transmission switchover parameters from the primary network media device to the redundant network media device, at least once per 2X packets, and preferably every 213 packets that are either transmitted by, or received at, the primary network media device. The redundant network media device may receive packets by utilizing copied reception switchover parameters and transmit packets by estimating transmission switchover parameters based on copied transmission switchover parameters. The reception and transmission switchover parameters may be associated with Secure Real-time Transport Protocol or with PacketCable protocol.Type: GrantFiled: May 8, 2006Date of Patent: May 17, 2011Assignee: AudioCodes LtdInventors: Yuval Nissan, Ofer Idan
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Patent number: 7937616Abstract: A first logical partition in a first processing complex of a server cluster is operated in an active mode and a second logical partition in the processing complex is operated in a standby mode. Upon detection of a failure in a second processing complex of the server cluster. the standby mode logical partition in the first processing complex is activated to an active mode. In one embodiment, partition resources are transferred from an active mode logical partition to the logical partition activated from standby mode. Other embodiments are described and claimed.Type: GrantFiled: June 28, 2005Date of Patent: May 3, 2011Assignee: International Business Machines CorporationInventors: William Joseph Armstrong, Michael Howard Hartung, Yu-Cheng Hsu, Glenn Rowan Wightwick
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Patent number: 7934265Abstract: The present invention relates to a coprocessor comprising a calculation unit for executing a command, and a securization device for monitoring the execution of the command and supplying an error signal having an active value as soon as the execution of the command begins and an inactive value at the end of the execution of the command, if no abnormal progress in the execution of the command has been detected. The coprocessor further comprises means for preventing access to at least one unit of the coprocessor, while the error signal is on the active value. Application is provided particularly but not exclusively to the protection of integrated circuits for smart cards against attacks by fault injection.Type: GrantFiled: April 5, 2006Date of Patent: April 26, 2011Assignee: STMicroelectronics SAInventors: Frédéric Bancel, Nicolas Berard
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Patent number: 7925791Abstract: The present invention provides a system and method for detecting communication error among multiple nodes in a concurrent computing environment. A barrier synchronization point or regions are used to check for communication mismatch. The barrier synchronization can be placed anywhere in a concurrent computing program. If a communication error occurred before the barrier synchronization point, it would at least be detected when a node enters the barrier synchronization point. Once a node has reached the barrier synchronization point, it is not allowed to communicate with another node regarding data that is needed to execute the concurrent computing program, even if the other node has not reached the barrier synchronization point. Regions can also be used to detect a communication mismatch instead of barrier synchronization points. A concurrent program on each node is separated into one or more regions. Two nodes can only communicate with each other when their regions are compatible.Type: GrantFiled: July 17, 2006Date of Patent: April 12, 2011Assignee: The Math Works, Inc.Inventors: Edric Ellis, Jocelyn Luke Martin, Halldor Narfi Stefansson
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Patent number: 7917675Abstract: An industrial process control apparatus and method that includes a number of processors and a number of input/output modules. Each processor is connected to a plurality of the input/output modules by a unidirectional command line. Each input/output module is connected to a plurality of the processors by a unidirectional response line. The processors are arranged to issue an identifier request to all of the connected input/output modules and each input/output module is arranged to respond to the identifier request via the respective response line with a response that includes a unique identifier. Such a configuration allows each processor to identify the physical location of each respective input/output module.Type: GrantFiled: January 29, 2009Date of Patent: March 29, 2011Assignee: Rockwell Automation Technologies, Inc.Inventors: Kenneth John Murphy, Linda Murphy, legal representative, Thomas Bruce Meagher, Philip John Agar, Ian David Wynne Jones, Gerald Robert Creech
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Patent number: 7912619Abstract: An engine control system is provided having a control unit and a monitoring module. The monitoring module, together with the control unit, forms one structural unit and is designed as a detachable module having an independent electromagnetic shielding.Type: GrantFiled: May 7, 2008Date of Patent: March 22, 2011Assignee: MTU Aero Engines GmbHInventors: Armin Geissler, Thomas Goeler, Werner Riebesel