Abstract: Channel data obtained from a reproduced signal is input to a demodulation ROM as an address and demodulated. In the demodulated channel data, the data whose data pattern is not consistent with a 2-7 modulation method is recognized as an error data. When a resync code, given in the channel data at every 15 bytes is not detected within a predetermined time period, a resync code undetected signal is generated. The demodulated data is arranged in a matrix, and the position of the error data in the matrix and the resync code undetected generation position are specified. An error correction circuit carries out the error correction (erasure correction) by using these positions and an error correction code relating to one direction of a row or a column of the matrix.