Dynamic Data Storage Patents (Class 714/769)
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Patent number: 7178092Abstract: A disk drive is disclosed which has a read/write channel utilizing a turbo coding/decoding method. In decimating a parity sequence of an RSC code sequence, a puncture unit included in a turbo codec executes a decimation process based on a coding rate (puncture rate) determined in view of a dominant error event.Type: GrantFiled: January 14, 2003Date of Patent: February 13, 2007Assignee: Kabushiki Kaisha ToshibaInventor: Manabu Akamatsu
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Patent number: 7171594Abstract: Methods and systems are provided for transferring data and for pausing the transfer of data when certain conditions are met. In one embodiment, an error correcting code (ECC) encoder/decoder reads a codeword from a data storage device and decodes the codeword. The ECC encoder/decoder corrects any correctable errors in the codeword and outputs information regarding the condition of the codeword, such as the number of detected full errors and the number of erasures. The number of full errors is compared with a full error threshold value. When erasures are available, the number of erasures can be compared with an erasure threshold value. Both threshold values may be set at levels below the maximum levels at which errors can still be corrected. When either of the threshold values are exceeded, the transfer of data is paused and a processor is interrupted so that further action may be taken.Type: GrantFiled: March 6, 2002Date of Patent: January 30, 2007Assignee: Hewlett-Packard Development Company, L.P.Inventors: Stewart R. Wyatt, Robin Alexis Takasugi
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Patent number: 7162681Abstract: An information reproducing apparatus, in which a disk having correction data recorded thereon is placed, acquires region information indicative of a region corresponding to the correction data after load processing is performed by a ROM loader. Then, under the control of a CPU, the apparatus determines the correction data to be used for correcting a reproducing program based on the region information, reads the correction data from a lead out area or its outer region on the disk, temporarily retains the read correction data in a first RAM or a second RAM, and then stores the correction data to be resident in a nonvolatile first flash memory or a second flash memory, to correct the reproducing program based on the correction data. The information reproducing apparatus thereafter reproduces user data recorded on the disk according to the corrected reproducing program.Type: GrantFiled: June 12, 2002Date of Patent: January 9, 2007Assignee: Pioneer CorporationInventor: Kazuo Kuroda
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Patent number: 7159165Abstract: An optical recording medium, a data recording or reproducing apparatus, and a data recording or reproducing method used by the data recording or reproducing apparatus. In a method of recording data on an optical disc, each of a plurality of error correction code (ECC) blocks is divided into a plurality of partitions. Next, data from the partitions is interleaved so that each of the ECC blocks is alternately and equally selected to generate a recording block. The generated recording block is modulated and recorded on an optical disc. As a result, the optical recording medium, the data recording apparatus, and the data recording method used by the apparatus are compatible with the format of a conventional digital versatile disc (DVD) and have higher error correction rates. In a reproducing method, the recording block is deinterleaved.Type: GrantFiled: December 20, 2001Date of Patent: January 2, 2007Assignee: Samsung Electronics Co., Ltd.Inventors: Sung-hee Hwang, Yoon-woo Lee, Sung-hyu Han, Sang-hyun Ryu
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Patent number: 7159166Abstract: An error correction method is provided as follows: handling a 2-event error generated very frequently as an object of correction; sequentially finding CRC data for a generated event of an error handled as the defined object of correction at any arbitrary bit position of reproduced data by implementation of a cyclic-replacement process; carrying out an exclusive-addition process of the CRC data to CRC data of the reproduced data in order to virtually carry out a tentative-correction process on a 1-event error at a first bit position; further finding CRC data generated after the tentative-correction process in order to detect a 1-event error at a second bit position; and correcting the 1-event error completing the tentative-correction process at the first position and the 1-event error at the second bit position.Type: GrantFiled: September 17, 2003Date of Patent: January 2, 2007Assignee: Hitachi Global Storage Technologies Japan, Ltd.Inventor: Hiroyuki Tsuchinaga
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Patent number: 7154835Abstract: With two consecutive product-coded ECC blocks, EB1 and EB2, as a set, the rth row of first ECB block EB1 is followed by the rth row of second ECC block EB2 in such a way that the first row of first ECC block EB1 is followed by the first row of second ECB block EB2, which is followed by the second row of first ECC block ECB1, which is followed by the second row of second ECC block EB2, and so on, to interleave data on a row basis. That is, data of two ECC blocks, EB1 and EB2, is allocated alternately on a row basis. This allocation method allows an error to be distributed after reproduction even when a serious burst error extending 18 rows occurs in an ECC block.Type: GrantFiled: April 8, 2004Date of Patent: December 26, 2006Assignee: Victor Company of Japan, LimitedInventors: Kazumi Iwata, Atsushi Hayami
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Patent number: 7149945Abstract: In one embodiment, a memory controller comprises a cache line processing block for processing a cache line into a plurality of segments, an error correction code (ECC) generation block that forms ECC code words for each of the plurality of segments for storage in a plurality of memory components, an ECC correction block for correcting at least one single-byte erasure error in each erasure corrupted ECC code word retrieved from the plurality of memory components, and an error seeding block that enables a respective error to be inserted into each ECC code word of the cache line in response to a plurality of error registers.Type: GrantFiled: May 9, 2003Date of Patent: December 12, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventor: Christopher M. Brueggen
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Patent number: 7127657Abstract: A CD-ROM decoder for processing digital data while buffering the digital data in a buffer RAM. The CD-ROM decoder includes a host interface for storing the digital data in the buffer RAM. An EDC processing circuit generates an error detection code using the digital data read from the buffer RAM in a block unit. An ECC processing circuit generates an error correction code with the digital data and the error detection code. An internal RAM stores the digital data and adds the error detection code and the error correction code to the digital data when storing the digital data. A digital signal processor outputs the digital data, the error detection code, and the error correction code that are stored in the internal RAM in a block unit.Type: GrantFiled: February 20, 2003Date of Patent: October 24, 2006Assignee: Sanyo Electric Co., Ltd.Inventors: Tomofumi Watanabe, Yuuichiro Tsukamizu
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Patent number: 7124344Abstract: A data allocator allocates (N×kV×kH)-byte source data distributively in N (kV bytes×kH bytes) tw0-dimensional arrays and sends the data to a V coder and an H coder. The V coder codes each column of the tow-dimensional arrays according to an (nV, kV) code V, and the H coder codes each row of the two-dimensional arrays according to an (nH, kH) code H. The V and H coders send redundant data to a data allocator. The data allocator allocates the redundant data in a memory to obtain N (nV bytes×nH bytes) product-code codewords and outpouts each row of the product-code codewords in an alternating manner for the N product-code codewords.Type: GrantFiled: September 27, 2001Date of Patent: October 17, 2006Assignee: Hitachi, Ltd.Inventors: Shigeki Taira, Takeshi Maeda, Harukazu Miyamoto, Yukari Katayama
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Patent number: 7080306Abstract: A disk device for performing error-correction processing is loaded with a high-reliability disk to which a C1 code as a low-level error-correction code (ECC) is added for every sector, and a C2 code as a high-level ECC is added for every plurality of sectors. A host computer includes a device driver corresponding to the high-reliability disk. When data written to the high-reliability disk is read, low-level error-correction is performed based on the C1 code in units of one block corresponding to one sector, and the corrected data is notified to the host computer. Simultaneously, the C2 code along with the data for a plurality of blocks is loaded, and high-level error correction based on the C2 code is thereby performed.Type: GrantFiled: February 24, 2000Date of Patent: July 18, 2006Assignees: Alps Electric Co., Ltd., Sony CorporationInventors: Takayuki Sugawara, Hiroki Hirashima, Isao Asano, Kyoichi Shirane
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Patent number: 7076721Abstract: The present invention discloses an information processing method including the following steps: (1) a first step receiving an encoded information data series as input; (2) a second step selecting a candidate decoded data code series from a first candidate decoded data code series group, decoding the encoded information data series, and generating a first decoded data code series; (3) a third step detecting a position and contents of erroneous decoded data codes in the first decoded data code series that cannot exist in the information data code; (4) a fourth step correcting the erroneous decoded data code and generating a corrected data code; (5) a fifth step selecting a single decoded data code series out of a second candidate decoded data code series group, decoding the encoded information data code series again, and generating a second decoded data code series; (6) The second candidate decode data code series group includes candidate decoded data code series from the first candidate decoded data code seType: GrantFiled: October 28, 2003Date of Patent: July 11, 2006Assignee: Hitachi Global Storage Technologies Japan, Ltd.Inventor: Hideki Sawaguchi
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Patent number: 7062332Abstract: If it becomes necessary to add, to a past device information list (past list), a record of device information of a target removed from a network, and if the number of records in the past list is already at its maximum so that it is impossible to store any more records in the past list, a microprocessor of a controller decides the priority of the removed target, based on device information of the removed target and on information of the kind of controller as stored in a configuration ROM in the controller. From records stored in the past list, the microprocessor searches for a record having a priority lower than the priority of the removed target, one by one in order from the first record therein. If the microprocessor finds a record having such a lower priority, the microprocessor deletes from the past list such record having been first found, and adds to the past list a record of the device information regarding the removed target.Type: GrantFiled: September 9, 2004Date of Patent: June 13, 2006Assignee: Funai Electric Co., Ltd.Inventor: Masahiro Matsuda
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Patent number: 7058875Abstract: The present invention relates to a method of correcting data on a high-density recording medium such as a BD-ROM (Blu-ray ROM Disk) and a BD-RW (Blu-ray ReWritable Disk). In the present method, whether there is any error in a predetermined-sized LDC data block, which is included in a physical cluster, is determined based on if there is an error in sync data and BIS data neighboring the LDC data block, and, if determined to be erroneous, error correcting operation for the LDC block is conducted.Type: GrantFiled: September 2, 2003Date of Patent: June 6, 2006Assignee: LG Electronics Inc.Inventors: Ik Beom Jeon, Sang Woon Suh
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Patent number: 7055081Abstract: In a magnetic recording device, a system and method for correcting errors in decoding a read data input signal. The system and method include multiple decoding channels, each channel processing the read data input signal and generating an output signal, where the output signal includes a data signal when no error is detected, and an error detection code when an error is detected. The system and method also include multiple error correction code (ECC) decoders, each decoder associated with and receiving the output signal of one of the channels and generating a corrected data signal when the received output signal is an error detection code and the error is correctable. The system and method further include a controller for selecting from the decoders one of the corrected data signals.Type: GrantFiled: March 2, 2001Date of Patent: May 30, 2006Assignee: Storage Technology CorporationInventors: Keith Gary Boyer, Kevin M. Horn
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Patent number: 7054373Abstract: A data-demodulating method for demodulating a variable-length code (d, k; m, n; r) having a basic code length of n bits to data having a basic data length of m bits. A train of codes is received, and a sync signal having a pattern that breaks a maximum run is detected. The pattern is repeated twice continuously and the minimum run is repeated no more than six times. The first bit of the sync signal is “1” when the train of modulated codes that immediately precedes the sync signal is included in a termination table used to terminate, at a desired position, a code when less than a predetermined number of variable length codes are available.Type: GrantFiled: March 24, 2005Date of Patent: May 30, 2006Assignee: Sony CorporationInventors: Toshiyuki Nakagawa, Yoshihide Shimpuku, Tatsuya Narahara
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Patent number: 7050506Abstract: A method of modulating data having a basic data length of m bits, to a variable-length code (d, k; m, n; r) having a basic code length of n bits. A sync signal is added to a received train of codes after a minimum run. The sync signal has a pattern that is repeated twice continuously. The minimum run is repeated no more than six times; and the sync signal exhibits seven types of sync signal IDs, with any adjacent two bits of a sync signal ID being spaced apart by a distance of 2.Type: GrantFiled: March 10, 2005Date of Patent: May 23, 2006Assignee: Sony CorporationInventors: Toshiyuki Nakagawa, Yoshihide Shimpuku, Tatsuya Narahara
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Patent number: 7047476Abstract: A code error corrector that enables high speed reproduction of DVD data with a high error correction capability. The data read from the DVD is stored in a DRAM. A PI correction circuit, which performs error correction with an inner parity, and a PO correction circuit, which performs error correction with an outer parity, alternately perform error correction for a predetermined number of times on the data stored in the DRAM. The detection circuit checks whether an error is included in the error corrected data whenever error correction is performed. If an error is not detected, the repeating of the error correction is stopped even if the error correction has not been performed for the predetermined number of times.Type: GrantFiled: June 19, 2003Date of Patent: May 16, 2006Assignee: Sanyo Electric Co., Ltd.Inventors: Hiroki Nagai, Shin-ichiro Tomisawa
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Patent number: 7046736Abstract: A data-demodulating apparatus for demodulating a variable-length code (d, k; m, n; r) having a basic code length of n bits to data having a basic data length of m bits. A train of codes is received, and a sync signal having a pattern that breaks a maximum run is detected. The pattern is repeated twice continuously and the minimum run is repeated no more than six times. The first bit of the sync signal is “1” when the train of modulated codes that immediately precedes the sync signal is included in a termination table used to terminate, at a desired position, a code when less than a predetermined number of variable length codes are available.Type: GrantFiled: March 24, 2005Date of Patent: May 16, 2006Assignee: Sony CorporationInventors: Toshiyuki Nakagawa, Yoshihide Shimpuku, Tatsuya Narahara
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Patent number: 7046735Abstract: Apparatus for modulating data having a basic data length of m bits, to a variable-length code (d, k; m, n; r) having a basic code length of n bits. A sync signal is added to a received train of codes after a minimum run. The sync signal has a pattern that is repeated twice continuously. The minimum run is repeated no more than six times; and the sync signal exhibits seven types of sync signal IDs, with any adjacent two bits of a sync signal ID being spaced apart by a distance of 2.Type: GrantFiled: March 24, 2005Date of Patent: May 16, 2006Assignee: Sony CorporationInventors: Toshiyuki Nakagawa, Yoshihide Shimpuku, Tatsuya Narahara
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Patent number: 7039848Abstract: A recording medium includes an area in which data encoded with an error correction code is recorded. In the recording medium, data which contains an error uncorrectable with the error correction code, and data which does not contain an error uncorrectable with the error correction code are recorded in predetermined pattern.Type: GrantFiled: December 16, 2002Date of Patent: May 2, 2006Assignee: Sony CorporationInventors: Tatsuya Inokuchi, Yoichiro Sako, Shunsuke Furukawa, Takashi Kihara
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Patent number: 7039913Abstract: An ID information, user data, and a control information are disposed each in one block, and coded for error correction. The user data and control information are disposed in an ECC block 1, while the ID information is disposed in an ECC block 2. The ECC blocks 1 and 2 are coded separately for error correction. The blocks thus coded for error correction are disposed in one physical structure, data is modulated, a sync signal is added to the modulated data, and then the data is written to an optical disc having the above data format.Type: GrantFiled: July 15, 1999Date of Patent: May 2, 2006Assignee: Sony CorporationInventor: Susumu Sensyu
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Patent number: 7024614Abstract: A disk drive is disclosed comprising a microprocessor for executing a disk command. The microprocessor initializes a configuration data structure comprising a plurality of configuration parameters with default values. The microprocessor modifies at least one of the configuration parameters with a custom value to generate a custom configuration data structure, and the microprocessor executes the disk command using the custom configuration data structure.Type: GrantFiled: December 24, 2002Date of Patent: April 4, 2006Assignee: Western Digital Technologies, Inc.Inventors: Gregory B. Thelin, Michael S. Rothberg
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Patent number: 7024525Abstract: Setting a plurality of table entries in a storage device includes subdividing the table entries into a N tasks, placing each of the N tasks in a memory location disposed within the storage device and accessible by a plurality of internal devices, the plurality of the internal devices accessing the memory location to retrieve at least one of the N tasks, and each of the plurality of the internal devices setting table entries corresponding to at least one of the N tasks retrieved from the memory location. Setting table entries may also include setting logical device table entries to indicate corresponding tracks contain invalid data in connection with operation of remote data transfer between multiple storage devices.Type: GrantFiled: August 10, 2005Date of Patent: April 4, 2006Assignee: EMC CorporationInventors: Benjamin W. Yoder, Mark J. Halstead, David Meiri, Alexandr Veprinsky
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Patent number: 7020825Abstract: A data processor that reduces the chip area of a semiconductor substrate. The data processor includes a detection circuit for generating an error detection code with digital data. A correction circuit generates an error correction code with the digital data that includes the error detection code. A control circuit controls the detection processing circuit and the correction processing circuit in accordance with a control program. The data processor further includes a first external memory and a serial/parallel conversion circuit. The first external memory stores a control program. The serial/parallel conversion circuit receives data of the control program in a serial state from the first external memory and provides a second external memory with the control program data in a parallel state when the data processor is activated.Type: GrantFiled: April 24, 2003Date of Patent: March 28, 2006Assignee: Sanyo Electric Co., Ltd.Inventors: Tomofumi Watanabe, Takayuki Suzuki
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Patent number: 7017100Abstract: A signal processing method multiplexes/arranges digital data of a specific unit to form a predetermined unit, adds an error correction code to the predetermined unit to constitute an error correction coded block, replaces a part of the error correction coded block with specific data, and outputs the error correction coded block with the specific data being replaced to a transmission medium or a recording medium.Type: GrantFiled: November 8, 2002Date of Patent: March 21, 2006Assignee: Kabushiki Kaisha ToshibaInventors: Tadashi Kojima, Hisashi Yamada, Kouya Tochikubo, Hideki Mimura, Taku Kato, Tooru Kamibayashi, Akio Tanaka
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Patent number: 7009793Abstract: A hard disk controller generates a read gate signal RG which has a predefined read start time and read end time set based on a sector pulse as a reference. A read data demodulation unit reproduces read data from a readout signal of medium by executing a read based on the read gate signal RG. A read gate optimization unit detects errors of read data demodulated by the data demodulation unit while varying the read start time and the read end time of the read gate signal RG, determines the read start time and the read end time at which the detected errors will be minimized and sets these in the read gate generation unit.Type: GrantFiled: February 11, 2004Date of Patent: March 7, 2006Assignee: Fujitsu LimitedInventor: Yuichiro Yamazaki
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Patent number: 7003714Abstract: A data storage system, such as RAID, upgraded dynamically including multiple stages, providing error checking data without taking the system off-line. Checksums are computed from the data and placed in block 63 of the same disk. The combination of parity bits across the parity disk, the remaining uncorrupted data in the data disks, and checksums within each disk includes sufficient information to enable restoration of corrupt data. The system is upgraded by reserving permanent checksum blocks, writing the checksums to a volume block number, and placing the checksums in permanently reserved checksum block locations after first moving data already there to unreserved blocks.Type: GrantFiled: April 26, 2004Date of Patent: February 21, 2006Assignee: Network Appliance, Inc.Inventors: Rajesh Sundaram, Srinivvasan Viswanathan, Alan Rowe, Steven R. Kleiman, John K. Edwards
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Patent number: 7003711Abstract: An information recording medium includes a management area where management information is recorded and a plurality of physical sector areas used to record a plurality of physical sector data blocks, which are generated by combining some data contained in a plurality of ECC blocks.Type: GrantFiled: February 6, 2002Date of Patent: February 21, 2006Assignee: Kabushiki Kaisha ToshibaInventors: Chosaku Noda, Hideo Ando, Koichi Hirayama
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Patent number: 7000152Abstract: A method for updating a defect list in a DVD can include processing sectors on the DVD during a playback operation; adding references to selected ones of the processed sectors to a defect candidate list; identifying defective sectors among the selected ones of the processed sectors; and, adding references to the identified defective sectors to the defect list. Additionally, the method can include removing from the defect candidate references to each sector for which a corresponding reference has been added to the defect list. The step of adding references to selected ones of the processed sectors to a defect candidate list can include detecting an unrecoverable error during the playback operation; identifying a processed sector associated with the unrecoverable error; and, adding a reference to the identified sector to the defect candidate list.Type: GrantFiled: November 7, 2000Date of Patent: February 14, 2006Assignee: Thomson LicensingInventor: Shu Lin
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Patent number: 6996764Abstract: At a preceding stage of a PR-channel APP decoder out of two APP decoders constituting a turbo decoder is disposed a logarithmic-likelihood computing circuit that computes logarithmic likelihoods L(y?i|yi) of a reproduced signal y?i, which is soft information. At a succeeding stage of the PR-channel APP decoder, on the other hand, a likelihood-transform RLL demodulator and a likelihood-transform RLL modulator capable of treating logarithmic likelihood ratios, which are soft information, are disposed between this APP decoder and a convolutional-code APP decoder. Thus, both RLL demodulation and turbo decoding can be fulfilled, and a turbo decoding of high error-correcting capability can be used to reproduce channel data ai recorded on a recording medium. As a result, the recording density of the recording medium is enhanced.Type: GrantFiled: April 18, 2002Date of Patent: February 7, 2006Assignee: Sharp Kabushiki KaishaInventor: Eiji Yamada
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Patent number: 6993688Abstract: A method is provided for reducing growth errors in disc drive. First, a number of sectors to be read is determined. Data is then read from all sectors of the number of sectors on a disc during a first disc revolution. Next, error sectors having a number of errors above a predetermined threshold are identified. The error sectors are then corrected and written to the disc during a second disc revolution. In addition, a disc drive having a controller for implementing the above method is provided.Type: GrantFiled: February 7, 2002Date of Patent: January 31, 2006Assignee: Seagate Technology LLCInventors: Hui Su, Gregory P. Moller
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Patent number: 6986095Abstract: For reducing time required for error correction in an error correction device, data are transferred from a buffer memory not only to a syndrome calculator but also to an error detector at the same time, and until the syndrome calculator detects an error-containing code, the error detector performs error detection in parallel with the syndrome calculation done by the syndrome calculator. During error detection after the error corrector corrects the error, mid-term results of the error detection obtained before an error-containing code is detected are used. Consequently, it becomes unnecessary to transfer all data from the buffer memory to the error detector, thereby making execution of an error detection process possible at a halfway point.Type: GrantFiled: May 4, 2001Date of Patent: January 10, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Toshinori Maeda, Toru Kakiage
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Patent number: 6983022Abstract: A data-modulating apparatus for modulating data having a basic data length of m bits, to a variable-length code(d, k; m, n: r) having a basic code length of n bits. A sync signal is added to a recieved train of codes after a minimum run, the sync signal having a pattern that breaks a maximum run. The pattern is repeated twice continuously, and the minimum run is repeated no more than six times. The first bit of the sync signal is “1” when the train of modulated codes that immediately precedes the sync signal is included in the termination table used to terminate, at a desired position, a code when less than a predetermined number of variable length codes are available.Type: GrantFiled: March 10, 2005Date of Patent: January 3, 2006Assignee: Sony CorporationInventors: Toshiyuki Nakagawa, Yoshihide Shimpuku, Tatsuya Narahara
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Patent number: 6980606Abstract: A branch metric calculation unit calculates a set of branch metric values for subsequent samples of the sampled input signal. Each of the set of branch metric values is an indication for the likelihood that an amplitude value of a sample corresponds to a particular state, a state being defined as a sequence of n-ary digits. A delay unit, which forms part of a delay chain of delay units, includes a first delay unit of the delay chain which is coupled to the branch metric calculation unit. A path metric calculation chain of path metric calculation units includes one or more path metric calculation units having first inputs coupled to a delay unit and second inputs coupled to a preceding path metric calculation unit. The path metric calculation unit calculates the path metric values from the branch metric values, a path metric value being on indication for the likelihood that a sequence of samples corresponds to a sequence of states.Type: GrantFiled: October 2, 2001Date of Patent: December 27, 2005Assignee: Koninklijke Philips Electronics N.V.Inventors: Rob Otte, Willem Marie Julia Marcel Coene, Johannes Wilhelmus Maria Bergmans
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Patent number: 6981205Abstract: To improve the probability of error correction, thereby generating correct read data. Data is read from the same sector by a number of times and a majority decision is done in the same address, thereby the most frequently read value is regarded as the true data value in the address. For example, for an address 00, “00” is handled as a true data value.Type: GrantFiled: October 23, 2002Date of Patent: December 27, 2005Assignee: Lenovo (Singapore) PTE LTDInventors: Yukio Fukushima, Katsuhiko Katoh, Shunsuke Kobayashi, Takashi Kuroda, Yuzo Nakagawa, Fuminori Sai, Emi Shimono, Tetsuya Tamura, Tetsuo Ueda
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Patent number: 6961892Abstract: An address information detecting apparatus in accordance with the present invention is arranged such that a first interpolation address generating section generates a first interpolation address according to a consistent signal supplied from an address comparison section, and a second interpolation address generating section generates a second interpolation address according to an error detection signal supplied from a CRC error detecting section. When a detected address is consistent with at least either of the first and second interpolation addresses and also no error is discovered according to the error detection signal, the detected address is adopted as absolute location information, whereas in situations other than the above, the first interpolation address is adopted as the absolute location information. On this account, even if an address error is mis-detected, the malfunction of the apparatus is prevented and proper recording/reproduction can be carried out.Type: GrantFiled: July 3, 2002Date of Patent: November 1, 2005Assignee: Sharp Kabushiki KaishaInventor: Masaaki Hanano
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Patent number: 6959412Abstract: A method of encoding data includes representing the data as number(s) in a first base. The method further includes converting the number(s) into a number(s) in a second base. The resultant number in the second base can be viewed as data suitable for encoding using an ECC algorithm. After being ECC encoded, the data may be further modulation encoded. Modulation encoding may include transforming each symbol to a value that constrains run lengths of a binary value (e.g., zero). A decoding method and system checks a received data block for erroneous symbols, maps each received, encoded symbol to an associated ECC-encoded transform pair. The ECC encoded data may be decoded and corrected using the ECC and the locations of identified erroneous symbols. Finally, the corrected data sequence is converted from the second base back to the first base, from which the original data is retrieved.Type: GrantFiled: June 27, 2002Date of Patent: October 25, 2005Assignee: Seagate Technology LLCInventors: Gregory Lee Silvus, Kent Douglas Anderson
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Patent number: 6950039Abstract: An information encoding apparatus for encoding N pieces of information, the information encoding apparatus includes a scrambling pattern generation section for generating M scrambling patterns (N>M?1; where M and N are each an integer); a scrambled information generation section for applying, to each of the N pieces of information, one corresponding scrambling pattern among the M scrambling patterns so as to generate N pieces of scrambled information; and an encoded information generation section for supplying the N pieces of scrambled information with N parities, respectively, so as to generate encoded information. Each of at least one of the M scrambling patterns is applied to two or more of the N pieces of information.Type: GrantFiled: March 11, 2004Date of Patent: September 27, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshikazu Yamamoto, Hisae Tanaka, Motoshi Ito
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Patent number: 6948113Abstract: A method and apparatus for an error-correction buffer having self-throttling data burst control in a disc drive. One aspect of the present invention provides an arbitration-throttling control circuit for use in a disc drive to self-throttle the data transfer of an error-correction buffer. The arbitration-throttling control circuit includes a control circuit having an error-correction buffer interface and a disc-drive main buffer memory interface for controlling data transfer from the error-correction buffer to a disc-drive main buffer in a plurality of data bursts. The control circuit arbitrates for access to transfer data into the disc-drive main buffer such that a series of data bursts from the error-correction buffer to the disc-drive main buffer are spread substantially evenly over a period of time.Type: GrantFiled: April 20, 2000Date of Patent: September 20, 2005Assignee: Seagate Technology LLCInventor: Jimmie R. Shaver
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Patent number: 6944726Abstract: Setting a plurality of table entries in a storage device includes subdividing the table entries into a N tasks, placing each of the N tasks in a memory location disposed within the storage device and accessible by a plurality of internal devices, the plurality of the internal devices accessing the memory location to retrieve at least one of the N tasks, and each of the plurality of the internal devices setting table entries corresponding to at least one of the N tasks retrieved from the memory location. Setting table entries may also include setting logical device table entries to indicate corresponding tracks contain invalid data in connection with operation of remote data transfer between multiple storage devices.Type: GrantFiled: August 20, 2002Date of Patent: September 13, 2005Assignee: EMC CorporationInventors: Benjamin W. Yoder, Mark J. Halstead, David Meiri, Alexandr Veprinsky
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Patent number: 6920589Abstract: The present invention relates to method and apparatus that records/reproduces data to/from an optical disk to rearrange user data such as video and/or audio data or to restore original data order by scanning each ECC block in a U-pattern. The present method arranges data in a data block in U-pattern scanning order on the block to randomize data sequence, and records the data block, of which data order has been randomized, sequentially along a track of a writable disk, whereby it is possible to recover individually a long burst error due to track-wise scratch, dust, fingerprint, or the like because an burst-error is scattered in a restored ECC block.Type: GrantFiled: November 6, 2002Date of Patent: July 19, 2005Assignee: LG Electronics Inc.Inventor: Sang Woon Suh
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Patent number: 6920599Abstract: Positions in which errors have occurred are found more accurately and erasure correction is performed more effectively than in cases where TA flags or error flags issued by the R/W channel are utilized as information indicating the positions in which errors have occurred, [this being accomplished] by reading the same sector on the magnetic disk a plurality of times, storing the plurality of NRZ data thus obtained, comparing these NRZ data in byte units, judging that an error has occurred in byte positions where the NRZ data reproduced in each read operation differs, and utilizing these positions as erasure pointers for erasure correction.Type: GrantFiled: February 7, 2002Date of Patent: July 19, 2005Assignee: Hitachi Global Storage Technologies Japan, Ltd.Inventor: Nobuhiro Kuwamura
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Patent number: 6920005Abstract: A storage apparatus provided with an error recovery procedure (ERP) and a read error recovery method in the storage apparatus.Type: GrantFiled: February 3, 2004Date of Patent: July 19, 2005Assignee: Samsung Electronics Co., Ltd.Inventor: Sung-joong Yun
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Patent number: 6918079Abstract: If a large minimum data unit for recorded data is used to record a small data amount of management information, the recording time is long, and furthermore when a WO (write once) is used as the recording medium, the number of recording operations which can be performed is restricted. To solve the above problems, the present invention can record data in a management area in units smaller than ordinary units for recorded data to suitably record information in a limited management area and thereby efficiently use the user data area. At that time, the present invention simplifies interleave processing usually applied to ordinary recorded data, and performs the simplified interleave processing on a data structure (for data of small size) of the present invention so as to ensure the signal processing compatibility between the ordinary data and data having the data structure according to the present invention.Type: GrantFiled: April 8, 2002Date of Patent: July 12, 2005Assignee: Hitachi, Ltd.Inventors: Osamu Kawamae, Taku Hoshizawa, Harukazu Miyamoto, Shigeki Taira, Yukari Katayama
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Patent number: 6912682Abstract: A signal processor performs error correction on data which has been subjected to predetermined signal processing, for each predetermined block unit, by an error correction block, in parallel with an operation of sequentially storing the data in a cache memory. Then, error detection is performed on the data for each predetermined block unit by a descrambling/error detection block, and the data is stored in a buffer memory. Based on the results of the error detection and the error correction, when there exists some error in the data, the data with the error, which is stored in the buffer memory, is read out to be subjected to error correction again. When there is no error, the data corresponding to one block and stored in the buffer memory is transmitted to a host computer without performing error correction again.Type: GrantFiled: September 8, 2000Date of Patent: June 28, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Toru Aoki
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Patent number: 6910174Abstract: An error correction code (ECC) block for a data storage disk, includes an array of data that is 88 rows by 172 columns. Each row includes ten bytes of inner parity code and each column includes sixteen bytes of outer parity making the array 104 rows by 182 columns. The ECC block is divided into eight sectors, each sector having eleven rows of data and two associated rows of outer parity, for a total of thirteen rows per sector. The ECC block in accordance with the present invention is half the size of a conventional ECC block but has a higher ratio of parity bytes to data. Consequently, the ECC block of the present invention is particularly advantageous with small form factor disks and first-surface media, i.e., disks with the recording layer on the exterior of the disk or under a very thin transparent layer.Type: GrantFiled: June 1, 2001Date of Patent: June 21, 2005Assignee: DPHI Acquisitions, Inc.Inventor: Stanton M. Keeler
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Patent number: 6907559Abstract: DVD data is read from an optical disc. Double buffering is used for outer error correction syndromes, the syndrome for one ECC frame being accumulated in one syndrome buffer, while error correction calculations for preceding data block are performed using a syndrome accumulated previously in another syndrome buffer). The syndrome buffers are used in alternating fashion as further blocks of data are received, while the flow of data to a main buffer is uninterrupted. This reduces buffering requirements in the decoder, and relaxes time constraints on the error correction calculations. A multi-beam implementation is disclosed, providing higher throughput.Type: GrantFiled: December 20, 2001Date of Patent: June 14, 2005Assignee: Koninklijke Philips Electronics N.V.Inventors: Trevor G.R. Hall, Bruce Murray
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Patent number: 6891831Abstract: The invention is related to coding and decoding data, more particularly in microwave radio link systems. According to the invention, the sequence of data to be encoded at a transmitting end is split into at least two blocks, if the sequence is longer than a first predetermined length M. The splitting is performed so that the length first block is equal to the first predetermined length M. If the remaining sequence is shorter than a second predetermined length N, the second block comprises all of the remaining sequence. If the remaining sequence is longer than the second predetermined length N, the length of the second block is found by subtracting from the length of the remaining sequence the highest integer multiple of the second predetermined length, and the rest of the sequence is split into blocks of length N. If the sequence is shorter than the first predetermined length M, only one block is produced, and the sequence is padded with dummy values to form a sequence of length M.Type: GrantFiled: October 5, 2000Date of Patent: May 10, 2005Assignee: Nokia CorporationInventor: Juha Pihlaja
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Patent number: 6889352Abstract: A digital signal forming method and apparatus therefore for improved error correction capability without requiring a change to the number of error correcting codes includes forming a plurality of data sectors from an information stream, forming sector data blocks by dividing up each data sector, adding error correction codes to the sector data blocks, and combining the sector data blocks to produce interleaved allocations (also known as recording sectors).Type: GrantFiled: February 28, 2001Date of Patent: May 3, 2005Assignee: Hitachi, Ltd.Inventor: Hiroshi Hirayama
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Patent number: 6883126Abstract: An adaptive error recovery routine allows for the recovery from errors in read data of a disk drive. In one embodiment, a disk drive is provided which has an error memory having error memory elements used to record an error type and recovery step for each error recovered from the disk drive. If another error is detected that is of the same type and which is in a location close to a recorded error, the error recovery step used for the previous error is performed for the new error. If the previous error recovery step is not successful, the disk drive performs error recovery using an existing error recovery table, and omits the previous error recovery step.Type: GrantFiled: November 7, 2001Date of Patent: April 19, 2005Assignee: Maxtor CorporationInventors: Lace J. Herman, Jerry Moline