Abstract: This document discloses a system and method for securing data files selected from a series of data files. The system comprises a transformation module, an artificial neural network (ANN), a clustering module and a backpropagation module whereby these modules are configured to identify data files that contain malware or anomalies. When such data files are detected, the system will then initiate a series of measures to identify other data files that may be similarly afflicted by the detected malware. These data files are then secured to prevent the malware from affecting a host machine and/or any storage/peripheral devices linked to the host machine.

Abstract: The present disclosure provides a data encoding method, a decoding method, a related device, and a storage medium. The data encoding method first passes a first bit stream of an original encoded data through a logical operation to obtain a second bit stream. Then, through signal determination, negating processing, and insertion of corresponding flag bit, encoded data having a certain jump amplitude is obtained. A problem that signal is prone to error in transmission process is solved, reliability of coding is improved, and signal transmission is facilitated.

Abstract: An information processing apparatus includes: a memory; and a processor configured to: acquire an instruction sequence including plural instructions; generate plural candidates of new instruction sequences capable of obtaining an execution result as same as in the instruction sequence, by replacing at least a part of plural nop instructions included in the instruction sequence with a wait instruction that waits for completion of all preceding instructions; delete any one of the nop instructions and the wait instruction from each of the new instruction sequences, when the execution result does not change in case any one of the nop instructions and the wait instruction is deleted from the new instruction sequences in the candidates; and select a one candidate among the candidates subjected to the delete, the one candidate including the number of instructions equal to or less than a certain number, and having a smallest number of execution cycles.

Abstract: A host and method for interleaving data in a storage system for enhanced quality of service are provided. In one embodiment, a host is provided comprising an interface configured to communicate with a storage system comprising a memory. The processor is configured to determine a skip length for interleaving data to be stored in the storage system; interleave data according to the determined skip length; and send the interleaved data to the storage system for storage. Other embodiments are provided.

Abstract: Disclosed is a memory controller comprising: a memory unit including tables, in which various segments are stored; a calculator configured to update a parity for the segments stored in each of the tables whenever the table is updated when a segment is currently inputted, detect an error in the table based on a previously updated parity and a currently updated parity corresponding to the table; and a bit inverter configured to correct the detected error, and an operating method therefor.

Abstract: Systems, apparatuses, and methods for generating error correction codes (ECCs) with two check symbols are disclosed. In one embodiment, a system receives a data word of length N?2 symbols, wherein N is a positive integer greater than 2, wherein each symbol has m bits, and wherein m is positive integer. The system generates a code word of length N symbols from the data word in accordance with a linear code defined by a parity check matrix. The parity check matrix is generated based on powers of ?, wherein ? is equal to ? raised to the (2m/4?1) power, ? is equal to a raised to the (2m/2+1) power, and ? is a primitive element of GF(2m). In another embodiment, the system receives a (N, N?2) code word and decodes the code word by generating a syndrome S from the code word using the parity check matrix.

Abstract: An apparatus and method therefor for a receiver are disclosed. In this apparatus, at least one delay line is configured to receive input data from a communication lane and provide repetitions of the input data delayed with respect to one another. An exclusive disjunction combinatorial circuit is configured to receive the input data and the repetitions thereof and to generate a discontinuity-detection signal for codeword alignment responsive to successive linear combination by exclusive disjunction of the input data and the repetitions thereof to cancel out portions of repeated sequences of the input data for detection of at least one type of discontinuity in the input data.

Abstract: Isolation circuits for digital communications and methods to provide isolation for digital communications are disclosed. An example isolation circuit includes an isolation barrier, a burst encoder in a first circuit, and an edge pattern detector in a second circuit. The example isolation barrier electrically isolates the first circuit from the second circuit. The example burst encoder generates a first pattern in response to receiving a rising edge on an input signal and generates a second pattern in response to receiving a falling edge on the input signal. The example edge pattern detector detects the first pattern or the second pattern received from the burst encoder via the isolation barrier, sets an output signal at a first signal level in response to detecting the first pattern, and sets the output signal at a second signal level in response to detecting the second pattern.

Abstract: The present invention relates to an interleaving and de-interleaving method, an interleaver and a de-interleaver. The interleaving method includes: receiving N×M frames of data, and sequentially storing, with each frame as a unit, the N×M frames of data in storage space indicated by N×M addresses of a first storage unit; transferring the data stored in the storage space indicated by an ((X?1)×M+Y+1)th address of the first storage unit to the storage space indicated by a (Y×N+X)th address of a second storage unit; and according to an address sequence, outputting the data stored in the space indicated by the N×M addresses of the second storage unit frame by frame. The interleaving and de-interleaving solutions of the present invention have low implementation complexity, and high capacity of correcting a burst bit error.

Abstract: A communications system can provide methods of dynamically interleaving streams, including methods for dynamically introducing greater amounts of interleaving as a stream is transmitted independently of any source block structure to spread out losses or errors in the channel over a much larger period of time within the original stream than if interleaving were not introduced, provide superior protection against packet loss or packet corruption when used with FEC coding, provide superior protection against network jitter, and allow content zapping time and the content transition time to be reduced to a minimum and minimal content transition times. Streams may be partitioned into sub-streams, delivering the sub-streams to receivers along different paths through a network and receiving concurrently different sub-streams at a receiver sent from potentially different servers.

Abstract: A network shaping engine can be used to optimize network traffic by employing means to prioritize data packets assigned to a network traffic class over other network traffic. The network shaping engine accomplishes network traffic optimization by determining whether received data packets comprise a traffic class mark or indicia that indicates the data packets are part of a minimum latency traffic class. After analyzing the packets, the network optimization engine sorts the data packets according to the identified traffic classes and transmits the packets. Data packets comprising a traffic class marking are transmitted according to a first transmission scheme while data packets that do not comprise a traffic class marking are transmitted according to a second transmission scheme that differs from the first transmission scheme.

Abstract: An apparatus includes a circuit configured to at least one of (i) encode first data to produce encoded data or (ii) decode second data to produce decoded data. The circuit is configured to operate according to a predetermined matrix. The predetermined matrix is represented by a two-dimensional grid of elements. Each element of the predetermined matrix labeled with a hyphen corresponds to a zero matrix. Each element of the predetermined matrix labeled with a number corresponds to a respective cyclic-permutation matrix.

Abstract: Method and system encodes a signal according to a code rate that includes a ratio of uncoded bits to coded bits. An outer encoder encodes the signal into code words. An interleaver converts the code words into a byte sequence for wireless transmission. An inner encoder executes a convolutional code to generate an encoded signal. The encoded signal is transmitted over a plurality of subcarriers associated with a wide bandwidth channel having a spectral efficiency associated with the code rate. The outer encoder includes a Reed-Solomon encoder having a rate that increases the code rate of uncoded bits to coded bits.

Abstract: An interleaving method in a mobile communication system is provided. The interleaving method includes encoding a plurality of bits to output encoded bits in a sequence, interleaving the encoded bits based on a modulation order to generate interleaved encoded bits comprising consecutive bits having a size based on the modulation order, the consecutive bits corresponding to consecutive bits of the encoded bits, scrambling the interleaved encoded bits with a scrambling code to generate scrambled bits, and modulating the scrambled bits based on the modulation order to output at least one symbol.

Abstract: A method of data validation is provided. In one implementation, the method includes performing a cyclic redundancy check (CRC) on data transmitted over a channel having L lanes. In one implementation, the performing includes performing the CRC using n CRC bits and a CRC polynomial, where n is an integer equal to or greater than one and where L is an integer equal to or greater than one and represents the number of lanes in the channel. Further, in one implementation, the CRC polynomial is selected based on L. In one implementation, the method includes: performing a CRC on data, where the performing includes performing the CRC using n CRC bits, where n is an integer equal to or greater than one; and performing a checksum on the data, where the performing the checksum includes performing the checksum using m checksum bits, where m is an integer equal to or greater than one, where n plus m bits are allocated for validating the data.

Abstract: In cable modem termination systems (CMTS) and other information transmission systems, a method for changing the interleave depth associated with each data stream is provided. This may be done dynamically, and for any subset of downstream devices such as modems. The interleave depth may be set on an individual device level. Embodiments may decrease data receiving latency on devices that do not suffer from error rates, such as caused by burst noise, while maintaining throughput on devices with high error rates.

Abstract: An apparatus includes a circuit configured to at least one of (i) encode first data to produce encoded data or (ii) decode second data to produce decoded data. The circuit is configured to operate according to a predetermined matrix. Each element of the predetermined matrix labeled with a hyphen corresponds to a zero matrix. Each element of the predetermined matrix labeled with a number corresponds to a respective cyclic-permutation matrix.

Abstract: Disclosed herein is a decoding device including: an extracting section, a storing section, an allocating section, and a decoding section. The extracting section acquires data containing plural code words and information other than the plural code words in one frame, and extracts the plural code words from the data every one code word. The storing section at least stores the one code word extracted by the extracting section. The allocating section sets time obtained by dividing time for the one frame by the number of code words contained in the one frame as time allocated to decoding of one code word. The decoding section decodes the code word within the time allocated by the allocating section.

Abstract: An arrangement of interleavers allocates bits from an input symbol across sub-symbols transmitted via sub-carriers of multiple orthogonal frequency division multiplex (OFDM) carriers. The input bits are allocated in a fashion to provide separation across subcarriers, and rotation of sub-symbols across the OFDM carriers provides additional robustness in the present of signal path impairments.

Abstract: A multistage difference cyclic permutation unit (106) for performing multistage cyclic permutation, an address administration unit (104) for administering addresses of the cumulative LLR memory (101), a received value arrangement unit (103) for generating records during writing of received values to the cumulative LLR memory (101), and a control unit (110) for generating parameters to control each unit from information of a parity check matrix and the current cyclic permutation size are prepared. The address administration unit (104) controls reading/writing addresses of the cumulative LLR memory (101) based on a reading start address from the cumulative LLR memory (101) corresponding to the column block. After the start of reading of a column block, the control unit (110) generates a reading start address in the next decoding of the column block and stores it into the address administration unit (104).

Abstract: At least one implementation herein enables interleaver and deinterleaver buffer modification during Showtime. That is, at least one implementation herein enables a multicarrier controller apparatus to reallocate interleaver and deinterleaver buffer memory to accommodate data rate changes in the upstream and downstream communication channels.

Abstract: The present invention relates to data processing apparatus and method, and a program which make it possible to scatter burst errors with respect to both codes of a product code. A block-wise interleaver performs interleaving A, which is a process of inputting data in the order of the column direction as one direction, and reading the data in the order of the direction diagonally downward to the right, NB bits by NB bits (=block by block) with respect to ND×NB×NA bits of a product code. Next, the block-wise interleaver performs interleaving B, which is a process of inputting data in the order of the column direction as one direction, and reading the data in the order of the row direction as the other direction, NB bits by NB bits with respect to (NC?ND)×NB×NA bits representing the parity portion of an inner code indicated by P, of the product code. The present invention can be applied to, for example, a recording/reproducing apparatus.

Abstract: A wireless bit-interleaved coded OFDM (BI-COFDM) multiple-in-multiple-out (MIMO) system that improves the diversity seen by a convolutional decoder. The bit stream is interleaved first, then bits are mapped into symbols and then symbols are parsed into Nt separate streams, where t is the number of transmitters. A deinterleaver then performs the inverse permutation before sending the symbols to a Viturbi decoder. In another embodiment, a transmitting side bit-interleaver transforms an encoded and punctured bit stream using a first permutation, groups the transformed bit stream according to a desired constellation on one of Nt antennae, splits the transformed bit stream into separate streams accordingly and bit-interleaves/symbol-maps using a plurality of bit-interleavers/symbol-mappers to permute each stream using a second permutation. A receiving side performs the inverse operations of the transmitting side.

Abstract: An interleaving method to which time-first-mapping is applied in a mobile communication system is provided. The interleaving method includes writing coded bits into an interleaver on a row-by-row basis, and reading the coded bits written in the interleaver on a column-by-column basis, wherein the coded bits are written by groups having a size according to a modulation order.

Abstract: A loss correction encoding device having an improved capability of loss correction using LDPC-CC is disclosed. In the loss correction encoding device (120), a rearranging unit (122) rearranges information data contained in n information packets according to the constraint length Kmax and the encoding rate (q?1)/q of a cheek polynomial of the loss correction code used in a loss correction encoding unit (123). Specifically, the rearranging unit (122) rearranges the information data in such a way that continuous Kmax×(q?1) pieces of information data after rearrangement are contained in different information packets. The rearranging unit (122) distributes the information data to information blocks from n information packets (n satisfies formula (1)). Kmax×(q?1)?n??(1).

Abstract: Systems, devices, and methods are disclosed herein using a pre-interleaving process to be performed at the transmitter. Data is rearranged at the transmitter, and the rearranged data is transmitted over the communication channel in an order that is more suitable for parallel processing at the decoder. Because processing at the transmitter is bit-wise rather than the multi-bit, soft-decision information at the decoder, pre-interleaving may reduce use system resources when compared to a re-interleaving process at the decoder.

Abstract: A communications device including a low-density parity check (LDPC) encoder and a transmitter. The LDPC encoder is configured to (i) receive data, and (ii) in response to the received data, generate encoded data using a predetermined LDPC matrix, in which the predetermined LDPC matrix is specified by a predetermined base matrix. The transmitter is configured to transmit the encoded data over a communications channel.

Abstract: An interleaver that implements the LCS turbo interleaver algorithm utilized by the CDMA2000 standard is described. The interleaver includes a first computation unit for receiving an input address and computing a first sequential interleaved address during a first clock cycle in response thereto. A second computation unit is included for receiving an input address and computing a second sequential interleaved address during the first clock cycle in response thereto. The interleaver further includes a comparator for determining whether the first or the second sequential interleaved address is invalid and generating a signal in response thereto. The output of the comparator provides a control signal to a switch which selects the first or the second sequential interleaved address as an output interleaved address for the first clock cycle. The interleaver is further designed to move in a forward direction or a reverse direction.

Abstract: The method allows to obtain, starting from an initial S-random interleaver permutation stored in memory devices and having a size N, a final S-random permutation having a smaller size K<N by successive pruning operations which yield the final permutation, through an iterative process which is performed by using electronic processing devices, and in which in successive steps selected elements are eliminated in accordance with predetermined criteria. The final permutation is generated using a reference vector having a dimension or size equal to that of the initial permutation. Said reference vector is generated by said processing devices in such a way that for each pruning step, if the element has been eliminated on the basis of a predetermined criterion, one element of the reference vector is generated in such a way that the value and the position thereof in the reference vector are indicative of the value of the element eliminated.

Abstract: A pattern-dependent error correction method and system for a code group alignment finite state machine (FSM) are disclosed. A state corrector generates a start-of-stream delimiter (SSD) detected signal to the FSM when the FSM is in an idle state and at least one condition due to a lost SSD signal is met; and the state corrector generates an idle detected signal to the FSM when at least one condition due to a lost idle signal is met. A pattern corrector generates a corrected code pattern {J,K} to FSM when the FSM is in an idle state and at least one condition due to a false idle state is met; and the pattern corrector generates a corrected code pattern {T,R} to the FSM when the FSM is in a data state, a start of stream state or a data error state, and at least one condition due to a false packet end is met.

Abstract: A digital data recording/reproducing method includes the steps of: interleaving data on a PI code for each PI code of a 208-row ECC block; and converting a short burst error into random errors by dispersing errors on the PI codes. Moreover, the digital data recording/reproducing method increases correction capability against several bytes to several tens bytes of errors generated at random without changing burst error correction length by performing this processing for respective PI codes by using interleave rules that are different as much as possible from one another.

Abstract: An arrangement of interleavers allocates bits from an input symbol across sub-symbols transmitted via sub-carriers of multiple orthogonal frequency division multiplex (OFDM) carriers. The input bits are allocated in a fashion to provide separation across subcarriers, and rotation of sub-symbols across the OFDM carriers provides additional robustness in the present of signal path impairments.

Abstract: A signal transmission method in a radio multiplex transmission system that includes serial-to-parallel converting of serial data to be transmitted into N parallel data series and independently performing an error-correcting encoding process on the parallel signals of the N data series. The method further includes parallel-to-serial converting of the parallel signals encoded with error-correcting codes, performing an interleaving process on the parallel-to-serial converted signals and serial-to-parallel converting the interleaved signals into L parallel data series and transmitting each of the L data series. The transmitted signals are then received and separated into M data series and are parallel-to-serial converted and a deinterleaving process is performed.

Abstract: A network communication device includes a host interface, which is coupled to communicate with a host processor, having a memory, so as to receive a work request to convey one or more data blocks over a network. The work request specifies a memory region of a given data size, and at least one data integrity field (DIF), having a given field size, is associated with the data blocks. Network interface circuitry is configured to execute an input/output (I/O) data transfer operation responsively to the work request so as to transfer to or from the memory a quantity of data that differs from the data size of the memory region by a multiple of the field size, while adding the at least one DIF to the transferred data or removing the at least one DIF from the transferred data.

Abstract: In cable modem termination systems (CMTS) and other information transmission systems, a method for changing the interleave depth associated with each data stream is provided. This may be done dynamically, and for any subset of downstream devices such as modems. The interleave depth may be set on an individual device level. Embodiments may decrease data receiving latency on devices that do not suffer from error rates, such as caused by burst noise, while maintaining throughput on devices with high error rates.

Abstract: The present invention is a device for detecting short burst errors. The device includes a first signal input, wherein the first signal input is configured to receive a first signal. The device includes a second signal input, wherein the second signal input is configured to receive a second signal. The device includes a logic gate, wherein the logic gate is operable for receiving the first signal via the first signal input, receiving the second signal via the second signal input, and generating a logic output gate signal based on the received first signal and the second signal. Furthermore, the device includes a filter, wherein the filter is configured for receiving the logic output gate signal from the logic gate and generates a filter output signal based upon the received logic output gate signal, wherein the filter output signal is operable for flagging errors.

Abstract: An iterative receiver and an iterative decoder are provided. The iterative receiver includes: an external decoder to decode the detected received signal; an impurity adder to add an impurity to an output signal of the external decoder; an interleaver to perform interleaving between the internal detector and the external decoder; and a de-interleaver to perform de-interleaving between the internal detector and the external decoder.

Abstract: A system and method for detecting burst noise during quadrature amplitude modulation (QAM) communications are provided. A QAM signal is acquired at a receiver in communication with a network. The QAM signal is demodulated at the receiver to identify a plurality of symbols. Amplitudes for each of the plurality of symbols are determined, and are compared to a predetermined threshold. For each amplitude that is greater than the predetermined threshold, information is recorded at the receiver relating to a burst noise event. The magnitude of the burst noise can be determined by measuring a difference between a received constellation point and a perimeter constellation point closest to the received constellation point. The information about the burst noise event can be transmitted to an error correction module for reducing future burst noise in the network. Equalizer coefficients and tracking loop performance can be adjusted/enhanced using the burst noise information.

Abstract: A cascade encoding method and apparatus are applied to a handheld television system or other fields. The method includes the following: A. Reed-Solomon (RS) encoding is performed on inputted Medium Access Control (MAC) packets, and coded MAC packets are outputted; and B. Low density parity check code (LDPC) encoding is performed on the coded MAC packets, and LDPC encoding blocks are outputted. The apparatus includes an RS coder and an LDPC coder. The RS encoding and LDPC encoding are cascaded to encode an inputted code flow, so as to reduce an error rate. Meanwhile, bytes in one RS encoding data block are dispersed into different LDPC blocks to be encoded through byte interleaving, thereby sufficiently utilizing error code characteristics of the RS encoding and the LDPC encoding for decoding, and improving error correction capability of a system.

Abstract: A digital communication device is provided for decoding a data stream to generate a receiver output. In the digital communication device, a burst error detector determines burst noise locations corresponding to the data stream according to an error-check equation and accordingly generates a burst error indicator. Thereafter, an inner decoder decodes the data stream to generate an inner decoded stream, comprising an erasure marker for performing an erasure marking process on the inner decoded stream based on the burst error indicator to generate an erasure indicator corresponding to the inner decoded stream. An outer decoder then decodes the inner decoded stream with reference to the erasure indicator to generate the receiver output.

Abstract: A multiple-input multiple-output (MIMO) transmitter including a scrambler and a forward error correction encoder. The scrambler is configured to receive user data and generate scrambled data in response to the user data. The forward error correction encoder is configured to generate encoded data, in response to the scrambled data, using a low density parity check (LDPC) matrix, wherein the LDPC matrix is derived from a specified base matrix.

Abstract: In an information processing device, error detection information is generated from additional information and a header is generated from error detection information. An encoded header is then generated by appending a header-error correction code to the header and encoded additional information is generated by appending an information-error correction code to the additional information. Finally, an information-appended image is generated by integratedly appending the encoded header and the encoded additional information to the target image.

Abstract: A method of recovering data in a line signal which is predicted to be subjected to repetitive noise impulses, the line signal comprising a series of data frames, the method comprising the steps of: predicting a group comprising one or more frames in said line signal which are expected to be corrupted by a noise signal; blanking said group of one or more frames which are predicted to be corrupted; determining the preceding and succeeding frames adjacent to said group; and including in each said group of one or more frames one or more parity blocks wherein if said noise signal deviates from its predicted timing interval or duration and corrupts the data carried in one or more of said frames adjacent to said group, the corrupted data is recovered using one or more of said parity blocks of said group of blanked frames and the other one of said adjacent frames.

Abstract: An interleaving method to which time-first-mapping is applied for a plurality of channel-coded and rate-matched code blocks in a mobile communication system is provided. The interleaving method includes determining sizes of a horizontal area and a vertical area of an interleaver, generating modulation groups with adjacent coded bits in a vertical direction according to a modulation scheme, sequentially writing the modulation groups in the horizontal area on a row-by-row basis, and sequentially reading the coded bits written in the interleaver in the vertical area on a column-by-column basis.

Abstract: The present invention provides a method for enhancing reliability of information transmission by (a) establishing a matrix based on the length of bits of valid information in frame time slots; and creating a new matrix by presetting Error Correction Coding (ECC) for rows and columns of said matrix; (b) adopting the 1st Interleaving method to re-allocate bits which have been processed twice by using said ECC in said new matrix, to both ends of said frame time slots; and (c) adopting the 2nd Interleaving method to re-allocate the remaining bits in said new matrix to the middle of said frame time slots. After processed like this, the anti-interfering ability of the bits at both ends of TDMA frame time slot can be significantly enhanced, and the bit-error rate is decreased most, and all redundancy bits of Hamming codes can be arrayed at both ends of TDMA frame time slot.

Abstract: A system and method for erasure flagging for errors-and-erasures decoding in storage devices includes determining a deviation measure between a read/write head position relative to a track of symbols in storage media. A reliability value is determined for the symbols based on the deviation measure. Flagging the symbols with a reliability value below a threshold as erasures is performed. The symbols are decoded using errors-and-erasures decoding in an iterative procedure.

Abstract: A multiprotocol encapsulation forward error correction (MPE-FEC) frame comprising datagrams and FEC data is shown wherein an MPE encapsulator places datagrams in MPE sections and FEC data in MPE-FEC sections. A time slicing block forms a sequence of bursts and dividing the MPE-FEC frame between bursts, such that MPE sections are sent in at least two bursts. The time slicing block adds a burst number parameter to headers of the MPE and MPE-FEC sections to enable a terminal to determine whether to expect further bursts carrying data from the MPE-FEC frame.

Abstract: A system, method, and device for detecting short burst errors in a queue-based system is disclosed. A first detector performs a data detection on a first input data set at a first time and on a second input data set at a second time. A second detector performs a data re-detection on input data sets. A decoder decodes derivations of the outputs of the first and second detector. A short burst error detector may perform a short burst error detection on decoded data and erase any detected errors. An output data buffer stores and orders the decoded data for output.

Abstract: An encoding system for encoding error control codes may include a first encoder configured to encode an input bit stream to generate first bit streams of C-bits, where c is an integer greater than zero, and a second encoder may be configured to receive the first bit streams and shuffle data of the received first bit streams to generate second bit streams. The data shuffling of the first bit streams may adjust an error distribution of the second bit streams. An encoding method may include encoding an input bit stream to generate first bit streams of C-bits, and receiving the first bit streams and shuffling data of the received first bit streams to generate second bit streams. An error distribution of the second bit streams may be adjusted based on the data shuffling.

Abstract: An arrangement of interleavers allocates bits from an input symbol across sub-symbols transmitted via sub-carriers of multiple orthogonal frequency division multiplex (OFDM) carriers. The input bits are allocated in a fashion to provide separation across subcarriers, and rotation of sub-symbols across the OFDM carriers provides additional robustness in the present of signal path impairments.