Abstract: One aspect of the invention is a method of decoding an auxiliary code embedded in an audio signal. The method performs a statistical decoding of a multibit auxiliary code embedded in an audio signal. The auxiliary code has been repetitively embedded in the audio signal. The method decodes code values of the auxiliary code from two or more different portions of the audio signal, each having the multibit auxiliary code. It then uses the code values decoded from two or more different portions to determine statistically the code values of the auxiliary code. Another aspect of the invention is another method of decoding an auxiliary code embedded in an audio signal. The method receives an audio signal suspected of being embedded with an auxiliary code. It evaluates a statistical feature of a portion of the audio signal to decode code values of the auxiliary code from the audio signal. It then determines a code value in the auxiliary code based on the statistical feature.

Abstract: A signal detector to detect data in an input signal. The signal detector includes a Viterbi-like detector to generate a most likely path corresponding to the data in the input signal. A linear post-processor determines at least one most likely error event in the most likely path, and generates revised paths based on the at least one most likely error event. A non-linear post-processor computes path metrics corresponding to each of the revised paths as a function of a non-linear noise model and selects one of the revised paths based on the path metrics.

Abstract: A digital transmission system utilizing data coding at the transmitter and data decoding at the receiver, the decoding being iterative, reliability data about soft decisions being calculated for each iteration. The last iteration results in a hard decision. Soft decisions are transformed so as to normalize the mean value of the reliability data, using evolutive weighting of the soft decisions with the received data. The coding is preferably a product code concatenated with a block code such as, for example, a Reed Solomon code. Such coding is well suited to upstream transmission in an interactive satellite communication system.

Abstract: In order to decode a sequence ?=(?1, . . . , ?i, . . . , ?n) where ?i is the received electrical signal corresponding to a transmitted signal ai representing the ith binary element vi of a word v=(v1, . . . , vn) chosen in a code C of words satisfying v·hT=0, where h is a row n-tuplet on the set {0,1 }, whose number of 1 is denoted w, an item of extrinsic information ?ext[A(i,h)]=P[ai=?1|A(i,h)]/P[ai=+1|A(i,h)] is determined on each of the elements vi covered by h, A(i,h) being the set of the received values ?j covered by h, with the exception of ?i, and P[ai|A(i,h)] being the probability that the ith signal transmitted was ai. This gives ?ext[A(i,h)]=[S1(i)+S3(i)+ . . . ]/[1+S2(i)+S4(i)+ . . .

Abstract: A method and apparatus for processing modulation symbols for soft input decoders using an efficient method of calculating an accurate log-likelihood ratio without relying on approximations is described. In contrast to other techniques that calculate distance metrics based on the individual constellation points, the method of the invention analyzes distances based on different groupings of points, where a given group (e.g., one of the II+k or II?k sets) is defined by the same bit (1 or 0) in the same bit position. A recursive scheme is preferably used where previous computations are saved and used for subsequent computations or iterations and the decoupled processing of real and imaginary components associated with the I and Q components.

Abstract: A method for efficient decoding of block product code format signals, using a (22p)QAM signal constellation for mapping of a received signal, with p=2, 3, 4, 5, . . . A received signal value rx, corresponding to an x=I or x=Q coordinate, is converted to a p-tuple (B(p-1)x, . . . , B0x) corresponding to a “closest” I-coordinate or Q-coordinate numerical value, and a p-stage algorithm is applied to the signal values rx and to the p-tuples (B(p-1)x, . . . , B0x) to determine a p-tuple (r(p-1)x, . . . , r0x) representing a decoded p-bit value for the received signal value rx. Depending upon a communication channel parameter Eb/N0 and the bit error ratio BER associated with each of the p bits, the received signal values rx may be suitable for some or all communications activities (e.g., HDTV, SDTV, mobile comm).

Abstract: The present invention relates to a method of source decoding variable-length codeword sequences, said decoding being based on an associated state diagram comprising a plurality of states (S) and on a code (C). It is characterized in that it comprises a step of reducing the states (S) in the state diagram in such a way that, at a bit time (Bj), only a number N of states in a group (G) of states is saved on the basis of a criterion derived from a partial metric computation and otherwise independently of an alphabet of said code (C), a group (G) being associated with a bit time (Bj). A group (G) corresponds to all the states (S) calculated at each bit time (Bj).

Abstract: A Viterbi equalizer includes a digital signal processor with has a first and a second associated hardware data path. The first data path is intended for carrying out ACS operations and calculates state metrics of target states in a trellis diagram. Depending on the configuration, the second hardware data path calculates either transition metrics from previous states to target states in the trellis diagram, or soft output values.

Abstract: Disclosed is an apparatus for stopping iterative decoding in a turbo decoder performing iterative decoding on a received frame comprised of information bits and then outputting the iteratively decoded results. A turbo decoder sequentially outputs absolute LLR (Log Likelihood Ratio) values associated with the respective information bits of the received frame by the iterative decoding, and stops the iterative decoding in response to a stop command for the iterative decoding. A minimum LLR detector selects a minimum value M(i) among the sequentially output absolute LLR values. A controller issues a command to stop the iterative decoding, if the minimum value M(i) is larger than a first threshold determined based on a minimum value Fmin among absolute LLR values output through previous iterative decoding.

Abstract: Techniques to improve the performance of a Turbo decoder when scale information for the bits in a code segment to be decoded is not known. A number of hypotheses are formed for the code segment, with each hypothesis corresponding to a particular set of one or more values for a set of one or more parameters used for decoding the code segment. For the MAP decoding scheme, these parameters may be for the sequence of scaling factors used to scale the bits prior to decoding and/or a scale used to evaluate a (e.g., min*) function for the MAP decoding. The code segment is decoded based on the MAP decoding scheme and in accordance with each hypothesis. The quality of the decoded result for each hypothesis is determined based on one or more performance metrics. The decoded bits for the best hypothesis are provided as the Turbo decoder output.

Abstract: In a method, and a signal processing arrangement, for coding information, the information symbol sequences are first sorted in accordance with the probability of occurrence of the symbols in the sequences, and are then mapped to the natural binary code. This allows redundant information contained in the symbol sequences to be used for decoding the bit positions.

Abstract: This invention is method of decoding a context based adaptive binary arithmetic encoded bit stream. The invention determines a maximum number of iterations for decoding a next symbol. This preferably employs a left most bit detect command. The invention considers the bit stream bit by bit until detection of a bit having a first digital state of the maximum number of iterations. If the maximum number of iterations occurs first, the invention decodes the considered bits. If a bit having the first digital state occurs first, the invention selects a number of next bits from the bit stream dependent upon the determined position within the coding table and decodes a symbol corresponding to the maximum number of bits and the selected number of next bits. The invention preferably pre-calculates an order symbol contexts corresponding to an order of determination of a code tree encompassing all possible codes and decodes symbols dependent upon a current context within the pre-calculated.

Abstract: A method for performing a table look-up operation on a first table having N entries includes generating a second table having kN entries based on the first table. The method includes generating a first data field for the second table including table index values having a second interval derived from a first interval of the table index values of the first table and represented by an n-bit binary number; and generating a second data field including computed table values derived from the computed table values of the first table or computed based on the function defining the second data field. The method further includes computing an index value z, extracting address bits from the index value z, where the address bits are data bits more significant than the (n-1)th bit of the index value z, and addressing the second table using the address bits.

Abstract: An apparatus and method for implementing a decoder for convolutionally encoded symbols (e.g., a viterbi decoder) is described. In one embodiment, a file of all the initial states (or their equivalents) and the nth surviving states associated with the initial states is stored along with the path metric. The initial states (or their equivalents) are an index to a previous file. A new file or files are then generated. An appropriate criterion is utilized to select a final surviving state. The path can be traced back through a plurality of files and the “most likely” path determined. The identifying binary numbers of the final states of each file and the binary numbers of an original initial state determine the “most likely” sequence of convolutionally-encoded symbols received by the decoder.

Abstract: Briefly, a method to decode a block of information of a turbo code to produce a decoded block. The method may determine from a structure of an error detection code one or more possible error patterns and may generate a reliability metric based on one or more of the one or more possible error patterns and the decoded block.

Abstract: A magnetic recording and/or reproducing apparatus includes an equalization section for equalizing a signal sequence which is reproduced from a magnetic recording medium and outputting an equalized waveform, and a conversion section for converting the equalized waveform into a maximum likelihood sequence by carrying out metric calculation based on average values of the equalized waveform.

Abstract: A method evaluates and optimizes an error-correcting code to be transmitted through a noisy channel and to be decoded by an iterative message-passing decoder. The error-correcting code is represented by a parity check matrix which is modeled as a bipartite graph having variable nodes and check nodes. A set of message passing rules is provided for the decoder. The decoder is analyzed to obtain a set of density evolution rules including operators and operands which are then transformed to projective operators and projected operands to generate a set of projective message passing rules. The projective message passing rules are applied iteratively to the error-correcting code modeled by the bipartite graph until a termination condition is reached. Error rates of selected bits of the error-correcting code are then determined by evaluating the corresponding operands. The error rates can be passed to an optimizer to optimize the error-correcting code.

Abstract: A decoding method and apparatus include providing capability for decoding data symbols that were encoded in a transmitter by either a serial-concatenated code or turbo code in a parallel processing fashion. The receiver upon knowing the encoding method may reconfigure the selection of data symbols from a table to accommodate the appropriate decoding process. Initially a data symbol estimate for a number of data symbols of a plurality of data symbols Xi, Yi, and Wi are determined. The estimates of data symbols Xi, Yi, and Wi passing to a first and second decision nodes include estimates for the variables in one or more encoding equations. A new estimate for the data symbol Xi is determined based on the estimate determined at the initial step and the new estimate for each occurrence of the data symbol Xi at the first and second decision nodes.

Abstract: A method is provided to decode data encoded by any block code in a manner that substantially improves the error correction capability of the block codes, and that is independent of the encoder. The structure associated with the method desirably allows the testing of those hypotheses that are known to exist, such that one can use the a priori knowledge of the possible set of hypotheses to only search from among them. The method of decoding data is both advantageous and desirable since knowing the subset of the code word space that is being utilized in essence allows the distance between the code words to be increased yielding significant decoding benefits.

Abstract: In order to rapidly determine a most likely code word at a decoder provided in a digital data transmission system using block codes or convolutional codes for the purposes of combating a noisy channel environment, an adaptively controllable threshold is introduced so as to discriminate a largest metric with a small amount of computations. The metric is the measure of closeness of a signal transmitted to the decoder to one of plural code words previously stored in the decoder. A counter counts the number of metrics each exceeding the threshold, and informs a controller of the count result, if the count result is more than one, the controller raises the threshold, on the contrary, if the count result is zero then the controller lowers the threshold, both are performed in an effort to narrow down one metric in excess of the threshold. The threshold thus adaptively controlled is compared with each of plural metrics. If the count result becomes one, it implies that the largest metric has been determined.

Abstract: An information reproducing apparatus has an equalizing filter which performs partial response equalization of a detection signal detected by a detecting section and which outputs an equalized signal, a variable gain amplifier which corrects the potential of the equalized signal in accordance with a correction amount determined in accordance with a plurality of reference levels that are used for maximum-likelihood decoding and a plurality of peak levels in a histogram of equalized signals corresponding to the plurality of reference levels, and a maximum-likelihood decoder which performs the maximum-likelihood decoding by referencing the reference levels, in accordance with the equalized signal that has been corrected. The apparatus controls the signal amplitude of the equalized signal to an appropriate value, thereby implementing high-reliable decoding processing.

Abstract: A Reduced-State Sequence Estimation (RSSE) method is disclosed, whereby states in a trellis structure associated, for example, with a Viterbi algorithm are partitioned into a plurality of hyper-states. During a hyper-state decision interval, a hyper-soft value is calculated. The calculated hyper-soft value is a measurement of the accuracy of the hyper-state decision made. The calculated hyper-soft value can be used by an equalizer to generate soft-value information for decoding. A soft-value generated from such a hyper-soft value combined with bit soft-value in an RSSE algorithm is significantly more accurate than a soft-value that can be generated for a DFSE algorithm (i.e., without such a hyper-soft value).

Abstract: A Bandband Processor for Wireless Communications is presented. The invention encompasses several improved Turbo codes method to provide a more practical and simpler method for implementation a Turbo Codes Decoder in ASIC or DSP coding. (1) A plurality of pipelined pipelined Log-MAP decoders are used for iterative decoding of received data. (2) In a pipeline mode, Decoder A decodes data from the De-interleaver RAM memory while the Decoder B decodes data from the De-interleaver RAM memory at the same time. (3) Log-MAP decoders are simpler to implement in ASIC with only Adder circuits, and are low-power consumption. (4) Pipelined Log-MAP decoders method provide high speed data throughput, one output per clock cycle.

Abstract: Adders each add up an addition value sent from a metric calculator and a state metric read from a memory. A maximum value selector generates a first likelihood when a data bit is 1, based on the addition values added up by the adders. A maximum value selector generates a second likelihood when a data bit is 0, based on the addition values added up by the adders. A subtracter subtracts the second likelihood from the first likelihood to generate a likelihood ratio, and a subtracter subtracts data from the likelihood ratio and generates extrinsic information. A re-normalizer multiplies the extrinsic information by a predetermined value to re-normalize it and temporarily stores it in a memory. The extrinsic information stored in the memory is used as the prior probability information for the next iterative decoding.

Abstract: The method of the present invention decodes a received symbol that represents data bits including message bits and parity-check bits. The method comprises (a) mapping the symbol onto a received signal point in a signal space, the signal point having an in-phase component (I) and a quadrature phase component (Q) in the signal space; (b) computing reliability information for each data bit, the reliability information associated with a distance di={square root over ((I−Ii)2+(Q−Qi)2)} between the received signal point (I, Q) and a reference constellation point (Ii, Qi) in the signal space, where i=0, 1, . . .

Abstract: A baseband processor is provided having Turbo Codes Decoders with Diversity processing for computing signals from separate antennas. The invention decodes multipath signals that have arrived at the terminal via different routes after being reflected from buildings, trees or hills. The Turbo Codes Decoder with Diversity processing increases the signal to noise ratio (SNR) more than 6 dB which enables the 3rd Generation Wireless system to deliver data rates from up to 2 Mbit/s. The invention provides several improved Turbo Codes Decoder methods and devices that provide a more suitable, practical and simpler method for implementation a Turbo Codes Decoder in ASIC or DSP codes. A plurality of parallel Turbo Codes Decoder blocks are provided to compute soft-decoded data RXDa, RXDb from two different receiver path. Several pipelined Log-MAP decoders are used for iterative decoding of received data. A Sliding Window of Block N data is used on the inputted data for pipeline operations.

Abstract: A method and apparatus for computing soft decision input metrics to a turbo decoder includes circuits associated with eight-ary phase shift keyed (8PSK) modulation and sixteen-ary quadrature amplitude modulation (16QAM). In both implementations log-likelihood ratio (LLR) metrics on code symbols are estimated as products of various constant values and various combinations of the in-phase and quadrature components of a demodulated soft decision. In the implementation associated with the 16QAM modulation scheme, an estimate of the carrier-signal-to-interference (C/I) ratio is also used to estimate some of the LLR metrics. Estimates of the LLR metrics may also be obtained in association with generalized square QAM and M-ary PSK modulation schemes including, e.g., 64QAM, 256QAM, and 16PSK.

Abstract: A method and apparatus for Viterbi detector state metric re-normalization. The method includes fabricating a Viterbi detector (138) having a predetermined number of states, wherein the Viterbi detector (138) stores a state metric value and a branch metric value for each state, and wherein the Viterbi detector (138) implements a trellis diagram. The method includes constructing a Viterbi detector (138) which can support a state metric value having g+h′ number of bits. The number of bits needed to represent the branch metric value is represented by (g) and the additional number of bits needed to represent the state metric value is represented by (h′). The additional number of bits (h′) is less than the additional number of bits (h) determined using the following inequality: 2h−1−h≧K−1, wherein K represent the constraint length of the trellis diagram.

Abstract: Received symbols are decoded in a communication system using a maximum likelihood block noncoherent decoding algorithm. The noncoherent decoding algorithm utilizes a set of test words determined for a given block of symbols based on a corresponding set of crossover angles which specify transitions between the test words. Advantageously, the decoding algorithm provides exact maximum likelihood block decoding having a complexity which is independent of the data rate of the symbols and linear-logarithmic in the block length.

Abstract: This invention presents a unique implementation of the extrinsic block the turbo decoder that solves the problem of generation and use of precision extension and normalization in the alpha and beta metrics blocks. Both alpha metric inputs and beta metric inputs are processed via a circle boundary detector indicating the quadrant of the two's complement input and a precision extend block receiving an input and a corresponding circle boundary input. An extrinsics block includes a two's complement adder of the precision extended alpha and beta metrics inputs. The proposed solution obviates the need for normalization in the alpha and beta metric blocks.

Abstract: A method quantizes an input signal of N samples into a string of k symbols drawn from a q-ary alphabet. A complementary method reproduces a minimally distorted version of the input signal from the quantized string, given some distortion measure. First, an [N,k]q linear error-correcting code that has a sparse generator factor graph representation is selected. A fixed mapping from q-ary symbols to samples is selected. A soft-input decoder and an encoder for the SGFG codes is selected. A cost function is determined from the input signal and a distortion measure, using the fixed mapping. The decoder determines an information block corresponding to a code word of the SGFG code with a low cost for the input signal. The input signal can be reproduced using the encoder for the SGFG code, in combination with the fixed mapping.

Abstract: A signal processing device and method are provided. The signal processing device and method perform maximum-likelihood decoding of data transmitted at an arbitrary data rate among a plurality of predetermined data rates after error detection coding and error correction coding.

Abstract: A digital signal decoding device according to an aspect of the present invention is a digital signal decoding device for generating a binary code sequence by maximum likelihood estimation from a convolutionally encoded input signal sequence, includes an add-compare-select unit configured to compare only two metric values one unit time before the calculation time of a predetermined branch metric value calculated from the input signal sequence at two successive times at each time, to add the predetermined branch metric value to the two metric values independently of the compare process, to select one of the two sums in accordance with the comparison result of the two metric values, and to output the selected value as a metric value to be used at the next time.

Abstract: A method and apparatus for performing automatic speech recognition (ASR) in a distributed ASR system for use over a wireless channel takes advantage of probabilistic information concerning the likelihood that a given, portion of the data has been accurately decoded to a particular value. The probability of error in each feature in a transmitted feature set is employed to improve speech recognition performance under adverse channel conditions. Bit error probabilities for each of the bits which are used to encode a given ASR feature are used to compute the confidence level that the system may have in the decoded value of that feature. Features that have been corrupted with high probability are advantageously either not used or are weighted less in the acoustic distance computation performed by the speech recognizer.

Abstract: A maximum a posteriori (MAP) detector/decoder employs an algorithm that computes log-likelihood value with an a posteriori probability (APP) value employing a number N of previous state sequences greater than or equal to two (N≧2). By defining the APP with more previous state sequences, the set of &agr; values may be calculated for a current state and then reduced. After generating the reduced set of &agr; values, the full set of &bgr; values may be generated for calculation of log-likelihood values. By calculating a set of &agr; values that may be decimated by, for example, N, the amount of memory required to store the &agr; values used in subsequent computations is reduced.

Abstract: Control circuitry for a disk drive system that has improved data detection by using log likelihood values and erasure pointers. The control circuitry is comprised of a log likelihood modification system and a decoder. The log likelihood modification system receives log likelihood values that represent data and erasure pointers. The erasure pointers point to at least one of the log likelihood values that has been corrupted in some manner. The log likelihood modification system sets the log likelihood values, that the erasure pointer points to, to an error value to generate modified log likelihood values. The log likelihood modification system transfers the modified log likelihood values to the decoder. The decoder processes the modified log likelihood values based on code constraints to generate estimated log likelihood values. The decoder then decodes the data from the estimated log likelihood values.

Abstract: The present invention discloses a method and apparatus for efficiently reading and storing state metrics in memory to enhance high-speed ACS Viterbi decoder implementations. The method includes applying an addressing scheme that determines the address locations of source state metrics during a process cycle. The source state metrics are then read from the address locations during the process cycle and applied to an add-compare-select butterfly operation of a Viterbi algorithm implementation to generate target state metrics. The method then stores each of the target state metrics into the address locations previously occupied by the source state metrics. The method further provides an addressing scheme that determines the address locations of the source state metrics based on a process cycle counter that is incremented and rotated in accordance with the process cycle.

Abstract: The present invention provides a novel method and apparatus for decoding digital information transmitted through the communication channel or recorded on a recording medium. The method and apparatus are preferably applied in the systems where data is encoded using regular LDPC codes with parity check matrices composed from circulants (a matrix is called a circulant if all its column or row are cyclic shifts each other).

Abstract: A audio decoding device includes an error correction processing means 13 for generating interpolation process information, a soft decision information generating means 12a for generating a soft decision information indicating a current situation of the transmission line based on coded data, a audio decoding processing means 14 for applying an interpolation process to the audio code in unit of bit based on interpolation information and soft decision information and then decoding the audio code which is subjected to the interpolation process to generate audio data, and a audio output processing means 15 for outputting the audio data.

Abstract: A system for block encoding and block decoding of servo data with a rate (M/N) code, where M is an integer greater than 1 and N is an integer that is greater than M. Two codes are described for the encoding and decoding processes: a rate (2/6) code and a rate (2/8) code. In general, block encoding and block decoding maps between M servo data bits and N coded symbol bits. Such block encoding with a rate (M/N) code may be employed in a magnetic recording system for encoding servo data that is written to a servo data sector on a magnetic recording medium. Encoded servo data is read from the magnetic medium and block decoded. A forced maximum-likelihood, partial-response (PRML) detector is used to detect the N coded symbol bits from channel samples read from the magnetic medium. Block encoding provides greater coding gain for a detector when the characteristics of the block code are used to improve performance of the PRML detector that is used to detect the N coded symbol bits.

Abstract: An encoder and a decoder each having an error correcting operation, and a data transmission apparatus using them for data transmission in a multilevel modulation system. In transmission data is converted into parallel data. One bit thereof is inputted to a convolutional encoder to output two bits. Two bit data and another signal of the parallel data not inputted to the convolutional encoder are respectively separated into real part and imaginary part to independently decide signal points for the parallel data. In reception an area is similarly decided independently for real and imaginary parts and metric is assigned for the data. Real and imaginary parts are combined with each other for Viterbi decoding. Result thereof is fed to a convolutional encoder similar in constitution to that on transmission side. Using convolutional encoding output and decided area, transmission data is decoded.

Abstract: A method of terminating iteration calculations in the decoding of a received convolutionally coded signal includes a first step of providing a turbo decoder with a first and second recursion processors connected in an iterative loop. Each processor has an associated extrinsic input and output. A next step includes cross-correlating the input and output of at least one of the processors to provide a cross-correlation value at each iteration. A next step includes terminating the iterations when the measure of the cross-correlation value index exceeds a predetermined threshold.

Abstract: A method of monitoring the performance of a Viterbi detector by using the deviations from the noiseless case of the path difference of the two branches entering the minimal state for a number of samples.

Abstract: A weighting device utilizes soft reliability values and class weighting factors to detect errors in digitized information. The soft reliability values can be provided by a decoder that processes the information according to a predetermined coding scheme. Bits representing the encoded information are classified accorded to classes defined by a bit sensitivity analysis. The bit sensitivity analysis can be based on subjective and/or objective criteria. As incoming bits are received by the weighting device, they are classified and class reliability values are computed for each class based on the soft reliability values. The class reliability values are then weighted to produce weighted class reliability values. Error concealment algorithms, coding rate determination, and coding rate requests can be activated based on the weighted class reliability values.

Abstract: A method of encoding a plural-bit data word as a plurality of multi-level symbols, where each of the plurality of multi-level symbols has a value selected from a predetermined plurality of levels. The method includes first translating each one of the selected bit positions of the plural-bit data word to one of the levels. When the contents of a predetermined one of the bits of the data word is a predetermined value, the method provides a second translation of each of the selected bit positions of the plural-bit data word to one of the levels. The method further includes generating a plural-bit offset word from predetermined bit positions of the data word and generating the multi-level symbols by addition of the offset word to the translated levels. One embodiment of the invention provides that the multi-level symbols are assigned a five-level code and the codes are treated as twos-complement numbers.

Abstract: A method establishes a phase reference signal for trellis demodulating CPM modulated received signals by using phase reference signals and symbol timing estimates. Branch metrics signals representing the highest-probability path through the trellis are calculated to produce beat estimates of the modulation data. The branch metrics signals are phase shifted to produce phase shifted branch metrics (PSBM) for each path. At each symbol interval, the highest probability PSEM (HPPSBM) signal for the path is selected. The selected phase shifted branch metric adjusts the value of the phase reference signals. Another method estimates the transmitted signal from at least the estimated data and the phase reference signal. The estimated transmitted signal is phase shifted to produce phase shifted estimated transmitted signals, which are correlated with the received data signals to produce phase error signals, which are smoothed and correct the phase reference signal.

Abstract: A method and a system for decoding information signals encoded in accordance with a multi-state encoding scheme and transmitted over a multi-dimensional transmission channel by computing a distance of a received word from a codeword. One-dimensional (1D) input signals are processed in a pair of symbol decoders, implemented as look-up tables, to produce a pair of 1D errors, with each representing a distance metric between the input signal and a symbol in a set of symbols. The 1D errors are combined based on the multi-state encoding scheme in order to produce a set of multi-dimensional error terms. Each of the multi-dimensional error terms corresponds to a distance between a received word and a nearest codeword.

Abstract: Disclosed is an apparatus for detecting a signal received from a channel signal and for transforming this signal into a binary code sequence via a signal processing apparatus, which can perform a maximum likelihood detection of the reproduced data from an optical disk with reduced complexity. Accordingly, a method to detect a signal (EBS) received from a channel signal (HF), comprises the steps of digitizing the signal received from the channel, equalizing the digitized signal (Ak), generating branch metrics (b_mp, b_pm) from the equalized signal (Bk), determining the minimum (b_ml) of the generated branch metrics (b_mp, b_pm), determining a merge (m−, m+, m0) from the minimum (b_ml), and generating a bitstream signal from the succession of merges (m−, m+, m0).

Abstract: A maximum likelihood decoder includes metric generators for generating metrics based on a plurality of partial responses and a Viterbi decoder for realizing maximum likelihood decoding by using a synthetic metric generated by synthesizing the metrics. A first partial response is an original partial response. A second partial response is a differential response generated by subtraction by shifting the first partial response by 1 clock. Alternatively, the differential response may be generated by subtraction by shifting the first partial response by 2 clocks. The second partial response may be a response generated by addition by shifting the first partial response by 2 clocks. Alternatively, the second partial response may be an integration response generated by adding all previous samples of the first partial response.

Abstract: A turbo decoder system utilizing a MAP decoding algorithm has a predetermined number of turbo decoder modules for decoding segments of a turbo code component code word in parallel, thereby expanding the block-length and data rate capability of the turbo decoder. Upon completion of any half iteration of the MAP decoding algorithm, the a posteriori bit probability estimates are provided to an interleave/de-interleave-and-convert-data function block wherein they are re-ordered, segmented, used to modify the original received data samples, and provided back to the respective turbo decoder modules as input data samples for the systematic bits. Decoding continues in this manner until a predetermined number of half iterations is performed, and data decisions are made on the final a posteriori estimates.