Process Scheduling Patents (Class 718/102)
  • Patent number: 9256476
    Abstract: A technique for expediting the unloading of an operating system kernel module that executes read-copy update (RCU) callback processing code in a computing system having one or more processors. According to embodiments of the disclosed technique, an RCU callback is enqueued so that it can be processed by the kernel module's callback processing code following completion of a grace period in which each of the one or more processors has passed through a quiescent state. An expediting operation is performed to expedite processing of the RCU callback. The RCU callback is then processed and the kernel module is unloaded.
    Type: Grant
    Filed: December 10, 2011
    Date of Patent: February 9, 2016
    Assignee: International Business Machines Corporation
    Inventor: Paul E. McKenney
  • Patent number: 9250952
    Abstract: There is provided a method to schedule execution of a plurality of batch jobs by a computer system. The method includes: reading one or more constraints that constrain the execution of the plurality of batch jobs by the computer system and a current load on the computer system; grouping the plurality of batch jobs into at least one run frequency that includes at least one batch job; setting the at least one run frequency to a first run frequency; computing a load generated by each batch job in the first run frequency on the computer system based on each batch job's start time; and determining an optimized start time for each batch job in the first run frequency that meets the one or more constraints and that distributes each batch job's load on the computer system using each batch job's computed load and the current load.
    Type: Grant
    Filed: November 11, 2013
    Date of Patent: February 2, 2016
    Assignee: eBay Inc.
    Inventor: Josep M. Ferrandiz
  • Patent number: 9250962
    Abstract: Techniques are described for scheduling received tasks in a data center in a manner that accounts for operating costs of the data center. Embodiments of the invention generally include comparing cost-saving methods of scheduling a task to the operating parameters of completing a task—e.g., a maximum amount of time allotted to complete a task. If the task can be scheduled to reduce operating costs (e.g., rescheduled to a time when power is cheaper) and still be performed within the operating parameters, then that cost-saving method is used to create a workload plan to implement the task. In another embodiment, several cost-saving methods are compared to determine the most profitable.
    Type: Grant
    Filed: January 10, 2011
    Date of Patent: February 2, 2016
    Assignee: International Business Machines Corporation
    Inventors: Brad L. Brech, Murthy V. Devarakonda, Bret W. Lehman, Stacey Ramos
  • Patent number: 9251103
    Abstract: The present application is directed to a memory-access-multiplexing memory controller that can multiplex memory accesses from multiple hardware threads, cores, and processors according to externally specified policies or parameters, including policies or parameters set by management layers within a virtualized computer system. A memory-access-multiplexing memory controller provides, at the physical-hardware level, a basis for ensuring rational and policy-driven sharing of the memory-access resource among multiple hardware threads, cores, and/or processors.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: February 2, 2016
    Assignee: VMware, Inc.
    Inventor: Bhavesh Mehta
  • Patent number: 9244722
    Abstract: A workload manager is operable with a distributed transaction processor having a plurality of processing regions and comprises: a transaction initiator region for initiating a transaction; a transaction router component for routing an initiated transaction to one of the plurality of processing regions; an affinity controller component for restricting transaction routing operations to maintain affinities; the affinity controller component characterised in comprising a unit of work affinity component operable with a resource manager at the one of the plurality of processing regions to activate an affinity responsive to completion of a recoverable data operation at the one of the plurality of processing regions.
    Type: Grant
    Filed: December 23, 2010
    Date of Patent: January 26, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: George M. Burgess, Paul Johnson, Ian J. Mitchell
  • Patent number: 9245218
    Abstract: An image forming apparatus capable of communicating with a server apparatus, includes a receiving unit configured to receive a packet from the server apparatus, a determining unit configured to determine whether a packet received by the receiving unit is a specific packet, a power supply control unit which, when the determining unit determines that a packet received by the receiving unit is the specific packet, brings the image forming apparatus into a first power condition which enables the image forming apparatus to start quickly using data stored in a volatile memory, and a start control unit configured to start the image forming apparatus quickly using data stored in the volatile memory.
    Type: Grant
    Filed: September 5, 2014
    Date of Patent: January 26, 2016
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yuji Naya, Keishi Inaba, Koji Shimizu, Kohei Asano, Kiyokazu Umimura, Yuichi Konosu
  • Patent number: 9244729
    Abstract: The present invention provides a method and system for the dynamic distribution of an array in a parallel computing environment. The present invention obtains a criterion for distributing an array and performs flexible portioning based on the obtained criterion. In some embodiment analysis may be performed based on the criterion. The flexible portioning is then performed based on the analysis.
    Type: Grant
    Filed: July 31, 2013
    Date of Patent: January 26, 2016
    Assignee: The MathWorks, Inc.
    Inventors: Penelope Anderson, Cleve Moler, Sheung Hun Cheng, Patrick D Quillen
  • Patent number: 9235458
    Abstract: A method of delegating work of a computer program across a mixed computing environment is provided. The method includes: performing on one or more processors: allocating a container structure on a first context; delegating a new operation to a second context based on the container; receiving the results of the new operation; and storing the results in the container.
    Type: Grant
    Filed: January 6, 2011
    Date of Patent: January 12, 2016
    Assignee: International Business Machines Corporation
    Inventors: Harry J. Beatty, III, Peter C. Elmendorf, Charles Gates, Chen Luo
  • Patent number: 9235441
    Abstract: Techniques are described for scheduling received tasks in a data center in a manner that accounts for operating costs of the data center. Embodiments of the invention generally include comparing cost-saving methods of scheduling a task to the operating parameters of completing a task—e.g., a maximum amount of time allotted to complete a task. If the task can be scheduled to reduce operating costs (e.g., rescheduled to a time when power is cheaper) and still be performed within the operating parameters, then that cost-saving method is used to create a workload plan to implement the task. In another embodiment, several cost-saving methods are compared to determine the most profitable.
    Type: Grant
    Filed: December 10, 2012
    Date of Patent: January 12, 2016
    Assignee: International Business Machines Corporation
    Inventors: Brad L. Brech, Murthy V. Devarakonda, Bret W. Lehman, Stacey Ramos
  • Patent number: 9235440
    Abstract: This disclosure describes monitoring the execution of jobs in a work plan. In an embodiment, a system maintains a risk level associated with the critical job to represent whether the execution of a job preceding the critical job has a problem, and it maintains the list associated with the critical job so as to quickly identify the preceding job which may cause a delay to the critical job execution.
    Type: Grant
    Filed: March 12, 2014
    Date of Patent: January 12, 2016
    Assignee: International Business Machines Corporation
    Inventors: Marco Cardelli, Pietro Lannucci, Valeria Perticara, Randa Salem
  • Patent number: 9229690
    Abstract: A method for computer code parallelization, comprising: providing sequential computer code by a user; defining structure of the sequential computer code, the structure comprises a plurality of code processes; generating automatically a plurality of parallelized computer codes corresponding to the sequential computer code, each having different configuration of parallelizing the plurality of code processes; running the plurality of parallelized computer codes on a multi-core processing platform; evaluating performance of the processing platform during running of each of the parallelized computer codes; and ranking each of the parallelized computer codes according to the performance evaluation.
    Type: Grant
    Filed: August 13, 2014
    Date of Patent: January 5, 2016
    Assignee: METIS-MP Ltd.
    Inventors: Efraim Shoham, Gil-Ad Meir, Evgeny Maximov, Ram Segal
  • Patent number: 9229765
    Abstract: A method to guarantee real time processing of a soft real time operating system in a multicore platform by executing a thread while varying a core in which the thread is executed and apparatus are provided. The method includes assigning priority to a task thread, executing the task thread, determining a core in which the task thread is to be executed, and if the core is determined, transferring the task thread to the determined core.
    Type: Grant
    Filed: December 12, 2012
    Date of Patent: January 5, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hee Kuk Lee, Yoon Soo Kim
  • Patent number: 9229878
    Abstract: Systems and methods for memory page offloading in multi-processor computer systems. An example method may comprise: detecting, by a computer system, a memory pressure condition on a first node; invalidating a page table entry for a memory page residing on the first node; copying the memory page to a second node; and updating the page table entry for the memory page to reference the second node.
    Type: Grant
    Filed: June 10, 2013
    Date of Patent: January 5, 2016
    Assignee: Red Hat Israel, Ltd.
    Inventors: Ronen Hod, Michael Tsirkin
  • Patent number: 9218042
    Abstract: A mechanism is provided in a data processing system for runtime based enforcement of energy policies collaboratively. The application runtime environment executing within a virtual machine on the data processing system receives notification of a change in energy policy for the virtual machine or the physical host it is running on. Responsive to determining the virtual machine is to be run under a power cap based on the notification of a change in energy policy, the application runtime environment dynamically modifies execution of an application in the application runtime environment or requests the execution environment for delaying enforcement of energy policies. The application comprises a set of application modules.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: December 22, 2015
    Assignee: International Business Machines Corporation
    Inventors: Pradipta K. Banerjee, Ashish Billore
  • Patent number: 9213637
    Abstract: In one embodiment of the invention, a memory system includes non-volatile-memory-devices (NVMDs) coupled to memory channels to share busses and a memory controller coupled to the memory channels in communication between the plurality of NVMDs. Each NVMD independently executes a read, write, or erase operation at a time. The memory controller includes channel schedulers to schedule control and data transfers associated with the read, write, and erase operations on the memory channels; and high priority and low priority queues coupled to the channel schedulers. The channel schedulers prioritize operations waiting in the high priority queues over operations waiting in the low priority queues. The channel schedulers further prioritize read operations waiting in either the high priority queue or the low priority queue over write and erase operations waiting in each respective queue.
    Type: Grant
    Filed: February 3, 2015
    Date of Patent: December 15, 2015
    Assignee: Virident Systems, Inc.
    Inventors: Vijay Karamcheti, Shibabrata Mondal, Ajith Kumar
  • Patent number: 9213574
    Abstract: A method, system and a computer program product for determining resources allocation in a distributed computing environment. An embodiment may include identifying resources in a distributed computing environment, computing provisioning parameters, computing configuration parameters and quantifying service parameters in response to a set of service level agreements (SLA). The embodiment may further include iteratively computing a completion time required for completion of the assigned task and a cost. Embodiments may further include computing an optimal resources configuration and computing at least one of an optimal completion time and an optimal cost corresponding to the optimal resources configuration. Embodiments may further include dynamically modifying the optimal resources configuration in response to at least one change in at least one of provisioning parameters, computing parameters and quantifying service parameters.
    Type: Grant
    Filed: January 30, 2010
    Date of Patent: December 15, 2015
    Assignee: International Business Machines Corporation
    Inventors: Tanveer A Faruquie, Hima P Karanam, Mukesh K Mohania, L Venkata Subramaniam, Girish Venkatachaliah
  • Patent number: 9213586
    Abstract: Computer-implemented systems and methods regulate access to a plurality of resources in a pool of resources without requiring individual locks associated with each resource. Access to one of the plurality of resources is requested, where a resource queue for managing threads waiting to access a resource is associated with each of the plurality of resources. A resource queue lock associated with the resource is acquired, where a resource queue lock is associated with multiple resources.
    Type: Grant
    Filed: March 18, 2009
    Date of Patent: December 15, 2015
    Assignee: SAS INSTITUTE INC.
    Inventor: Charles Scott Shorb
  • Patent number: 9207984
    Abstract: Aspects of a data environment, such as various capacities of data stores and instances, can be managed using a separate control environment. A monitoring component of the control environment can periodically communicate with the data environment to obtain performance information. The information is analyzed, using algorithms such as trending and extrapolation algorithms, to determine any recommended scaling of resources in the data environment. The scaling can be performed automatically, or as authorized by a customer. A workflow can be instantiated that includes tasks necessary to perform the scaling. The scaling of storage capacity can be performed without affecting the availability of the data store.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: December 8, 2015
    Assignee: Amazon Technologies, Inc.
    Inventors: Swaminathan Sivasubramanian, Grant Alexander MacDonald McAlister, Milovan Milovanovic
  • Patent number: 9207997
    Abstract: Apparatus, systems, and methods may operate to construct a memory barrier to protect a thread-specific use counter by serializing parallel instruction execution. If a reader thread is new and a writer thread is not waiting to access data to be read by the reader thread, the thread-specific use counter is created and associated with a read data structure and a write data structure. The thread-specific use counter may be incremented if a writer thread is not waiting. If the writer thread is waiting to access the data after the thread-specific use counter is created, then the thread-specific use counter is decremented without accessing the data by the reader thread. Otherwise, the data is accessed by the reader thread and then the thread-specific use counter is decremented. Additional apparatus, systems, and methods are disclosed.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: December 8, 2015
    Assignee: Novell, Inc.
    Inventor: Pradeep Kumar Rathi
  • Patent number: 9207745
    Abstract: A method for managing performance and power utilization of a processor in an information handling system (IHS) employing a balanced fully-multithreaded load threshold is disclosed. The method includes providing a maximum current thread utilization (Umax) and a minimum current thread utilization (Umin) among all current thread utilizations of the processor and determining a current performance state (P state) of the processor. The method also includes increasing a current P state of the processor to a next P state of the processor towards a maximum P state (Pmax) of the processor when the current P state of the processor is between Umax and Umin and the current utilization rate of the processor is less than a first threshold utilization rate. The method further includes engaging the processor in a turbo mode when the current P state of the processor reaches the Pmax and the current utilization of the processor is greater than the first threshold utilization rate of the processor.
    Type: Grant
    Filed: July 24, 2014
    Date of Patent: December 8, 2015
    Assignee: Dell Products L.P.
    Inventors: Vijay B. Nijhawan, Gregory N. Darnell, Wuxian Wu
  • Patent number: 9201683
    Abstract: A method for parallel processing implemented by a first core in a network unit, comprising locking an ingress queue if the ingress queue is not locked by another core, searching for an unlocked task queue from a first default subset of a plurality of task queues when the ingress queue is locked by another core, wherein the first subset is different from a second default subset of the plurality of task queues from which a second core begins a search for an unlocked task queue, and searching a remainder of the plurality of task queues for an unlocked task queue when all of the first default subset of task queues are locked and the ingress queue is locked.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: December 1, 2015
    Assignee: Futurewei Technologies, Inc.
    Inventors: Jun Xu, Dong Wang, Guang Zhao
  • Patent number: 9203975
    Abstract: A system and method are provided for enabling user lifecycle management for individual users of media and network services offered by a telecommunications, cable or media provider. The method comprises providing a first component to create and maintain individual users and associated profile information, and mapping subscriptions or entitlements to those users via interfacing to underlying information technology systems. The method also comprises components to associate network service information to these users, in order to enable authorized, personalized and seamless access to multiple network services across multiple devices. The method is also used to enable new, one-to-one relationships between telecommunications, cable, and media operators and the consumers of their services.
    Type: Grant
    Filed: August 7, 2012
    Date of Patent: December 1, 2015
    Assignee: UXP Systems Inc.
    Inventors: Gemini Waghmare, Jay Deen, Jingyu Wang, Leor Rosenberg, Lucia Rozborova
  • Patent number: 9201737
    Abstract: A computer readable medium and method for providing checkpointing to Windows application groups. The checkpointing may be triggered asynchronously using Asynchronous Procedure Calls. The computer readable medium includes computer-executable instructions for execution by a processing system. The computer-executable instructions may be for reviewing one or more command line arguments to determine whether to start at least one of the application groups, and when determining to start the at least one of the application groups, creating a process table in a shared memory to store information about each process of the at least one of the application groups. Further, the instructions may be for registering with a kernel module to create an application group barrier, creating a named pipe for applications of the application group to register and unregister, triggering a checkpoint thread to initiate an application group checkpoint; and launching an initial application of the applications of the application group.
    Type: Grant
    Filed: November 4, 2014
    Date of Patent: December 1, 2015
    Assignee: Open Invention Network, LLC
    Inventors: Keith Richard Backensto, Allan Havemose
  • Patent number: 9201708
    Abstract: Methods, systems, and machine readable medium for multi-thread safe system level modeling simulation (SLMS) of a target system on a host system. An example of a SLMS is a SYSTEMC simulation. During the SLMS, SLMS processes are executed in parallel via a plurality of threads. SLMS processes represent functional behaviors of components within the target system, such as functional behaviors of processor cores. Deferred execution may be used to defer execution of operations of SLMS processes that access a shared resource. Multi-thread safe direct memory interface (DMI) access may be used by a SLMS process to access a region of the memory in a multi-thread safe manner. Access to regions of the memory may also be guarded if they are at risk of being in a transient state when being accessed by more than one SLMS process.
    Type: Grant
    Filed: August 20, 2013
    Date of Patent: December 1, 2015
    Assignee: Synopsys, Inc.
    Inventors: Jan M. J. Janssen, Thorsten H. Grötker, Christoph Schumacher, Dietmar Petras, Rainer Leupers
  • Patent number: 9195506
    Abstract: A middleware processor provisioning process provisions a plurality of processors in a multi-processor environment. The processing capability of the multiprocessor environment is subdivided and multiple instances of service applications start protected processes to service a plurality of user processing requests, where the number of protected processes may exceed the number of processors. A single processing queue is created for each processor. User processing requests are portioned and dispatched across the plurality of processing queues and are serviced by protected processes from corresponding service applications, thereby efficiently using available processing resources while servicing the user processing requests in a desired manner.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: November 24, 2015
    Assignee: International Business Machines Corporation
    Inventors: Paul M. Bird, David Kalmuk
  • Patent number: 9198076
    Abstract: A wireless end-user device has a wireless wide-area network (WWAN) modem. One or more processors classify whether an application associated with an Internet access request is interacting with a user. In at least one power control state, the Internet access request is disallowed because the application is classified as not interacting with a user. In at least one other power control state, a similar Internet access request is allowed.
    Type: Grant
    Filed: April 16, 2015
    Date of Patent: November 24, 2015
    Assignee: Headwater Partners I LLC
    Inventors: Gregory G. Raleigh, James Lavine, Alireza Raissinia
  • Patent number: 9195294
    Abstract: A mechanism is provided in a data processing system for runtime based enforcement of energy policies collaboratively. The application runtime environment executing within a virtual machine on the data processing system receives notification of a change in energy policy for the virtual machine or the physical host it is running on. Responsive to determining the virtual machine is to be run under a power cap based on the notification of a change in energy policy, the application runtime environment dynamically modifies execution of an application in the application runtime environment or requests the execution environment for delaying enforcement of energy policies. The application comprises a set of application modules.
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: November 24, 2015
    Assignee: International Business Machines Corporation
    Inventors: Pradipta K. Banerjee, Ashish Billore
  • Patent number: 9189283
    Abstract: A system includes a client management component, a monitor component, and a hardware resource component, each of which is implemented in hardware. The client management component chooses a selected client from one or more clients for which a given task is to be fulfilled by a selected hardware resource of one or more hardware resources. The monitor component receives the given task and an identifier of the selected client from the client management component and monitors completion of the given task for the selected client by the selected hardware resource. The hardware resource management receives the given task from the monitor component, chooses the selected hardware resource that is to fulfill the given task, and launches the given task on the selected hardware resource.
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: November 17, 2015
    Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Bradley R. Larson, Mary T. Prenn
  • Patent number: 9189290
    Abstract: A technique includes distributing a plurality of tasks among a plurality of worker nodes to perform a processing operation on an array. Each task is associated with a set of a least one data block of the array, and an order of the tasks is defined by an array-based programming language. Distribution of the tasks includes, for at least one of the worker nodes, selectively reordering the order defined by the array-based programming language to regulate an amount of data transferred to the worker node.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: November 17, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Indrajit Roy, Erik Tamas Bodzsar, Robert Schreiber
  • Patent number: 9189279
    Abstract: An assignment method executed by a given core of a multi-core processor includes identifying for each core, the number of storage areas to be used by a given thread and the number of storage areas used by threads already assigned; detecting for each core, a highest value from the number of storage areas used by the threads already assigned; determining whether a sum of a greater value of the detected highest value of a core selected as a candidate assignment destination and the number of storage areas to be used by the given thread, and the detected highest value of the cores excluding the selected core, is at most the number of storage areas of the shared resource; and assigning the given thread to the selected core, when the sum is at most the number of storage areas of the shared resource.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: November 17, 2015
    Assignee: FUJITSU LIMITED
    Inventors: Koji Kurihara, Koichiro Yamashita, Takahisa Suzuki, Hiromasa Yamauchi, Toshiya Otomo, Naoki Odate
  • Patent number: 9189243
    Abstract: A method for rolling back speculative threads in symmetric-multiprocessing (SMP) environments is disclosed. In one embodiment, such a method includes detecting an aborted thread at runtime and determining whether the aborted thread is an oldest aborted thread. In the event the aborted thread is the oldest aborted thread, the method sets a high-priority request for allocation to an absolute thread number associated with the oldest aborted thread. The method further detects that the high-priority request is set and, in response, clears the high-priority request and sets an allocation token to the absolute thread number associated with the oldest aborted thread, thereby allowing the oldest aborted thread to retry a work unit associated with the absolute thread number. A corresponding apparatus and computer program product are also disclosed.
    Type: Grant
    Filed: September 30, 2012
    Date of Patent: November 17, 2015
    Assignee: International Business Machines Corporation
    Inventors: Khaled A. Mohammed, Martin Ohmacht, Raul E. Silvera, Kai-Ting A. Wang
  • Patent number: 9189151
    Abstract: A computing device may include a touchscreen and logic configured to monitor a processing load for a plurality of central processing units at particular intervals and adjust a number of active central processing units, of the plurality of central processing units, based on the monitored processing load. The logic may further be configured to detect a touchscreen event associated with the touchscreen and activate one or more additional central processing units, of the plurality of central processing units, in response to detecting the touchscreen event.
    Type: Grant
    Filed: September 6, 2013
    Date of Patent: November 17, 2015
    Assignee: Sony Corporation
    Inventors: Magnus Johansson, Björn Davidsson
  • Patent number: 9189267
    Abstract: Methods and systems for implementing virtual processors are disclosed. For example, in an embodiment a processing apparatus configured to act as a plurality of virtual processors includes a first virtual program space that includes a first program execution memory, the first program execution memory including code to run a non-real-time operating system capable of supporting a one or more non-real-time applications, a second virtual program space that includes a second program execution memory, the second program execution memory including code to run one or more real-time processes, and a central processing unit (CPU) configured to operate in a first operating mode and a second operating mode, the CPU being configured to perform operating system and application activities using the first virtual program space for the first operating mode without using the second virtual program space and without appreciably interfering with the one or more real-time processes that are running in the second operating mode.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: November 17, 2015
    Assignee: Marvell World Trade Ltd.
    Inventors: Timor Kardashov, Maxim Kovalenko, Arie Elias, Guy Ray
  • Patent number: 9191299
    Abstract: A system includes a plurality of queues configured to hold tasks and state information associated with such tasks. The system further includes a plurality of listeners configured to query one of the plurality of queues for a task, receive, in response to querying one of the plurality of queues for a task, a task together with state information associated with the task, effect processing of the received task, and communicate a result of the received task to another queue of the plurality of queues, the another queue of the plurality of queues being selected based on the processing of the received task.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: November 17, 2015
    Assignee: ALLSCRIPTS SOFTWARE, LLC
    Inventor: Jason Daniel Petit
  • Patent number: 9191452
    Abstract: A method for optimizing completion building is disclosed. The method involves receiving a work request by a host channel adapter (HCA), caching a portion of the work request in a completion cache in the HCA, wherein the cached portion of the work request includes information for building a completion for the work request, receiving, by the HCA, a response to the work request, querying the completion cache upon receiving the response to the work request to obtain the cached portion of the work request, and building the completion for the work request using the cached portion of the work request, wherein the completion informs a software application of at least a status of the work request as executed by the HCA.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: November 17, 2015
    Assignee: Oracle International Corporation
    Inventors: Brian Edward Manula, Magne Vigulf Sandven, Haakon Ording Bugge
  • Patent number: 9183210
    Abstract: A directory operational block data structure is provided by a processor within a memory. The directory operational block data structure allows configuration of a directory of a file system, at an operating-system level, with at least one executable program to be executed in response to configurable operating-system level directory events associated with the directory. A first program is attached within the directory operational block data structure to execute in response to a specified directory event. The attached first program is executed at the operating-system level in response to detection of the specified directory event.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: November 10, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Prashanth S. Krishna
  • Patent number: 9183043
    Abstract: Particular techniques for improving the scalability of concurrent programs (e.g., lock-based applications) may be effective in some environments and for some workloads, but not others. The systems described herein may automatically choose appropriate ones of these techniques to apply when executing lock-based applications at runtime, based on observations of the application in the current environment and with the current workload. In one example, two techniques for improving lock scalability (e.g., transactional lock elision using hardware transactional memory, and optimistic software techniques) may be integrated together. A lightweight runtime library built for this purpose may adapt its approach to managing concurrency by dynamically selecting one or more of these techniques (at different times) during execution of a given application.
    Type: Grant
    Filed: April 16, 2014
    Date of Patent: November 10, 2015
    Assignee: Oracle International Corporation
    Inventors: David Dice, Alex Kogan, Yosef Lev, Timothy M. Merrifield, Mark S. Moir
  • Patent number: 9183017
    Abstract: In an embodiment, a request is received for a first partition to execute on a first virtual processor. If the first physical processor is available at a first node, the first virtual processor is dispatched to execute at the first physical processor at the first node that is the home node of the first virtual processor. If the first physical processor is not available, a determination is made whether the first physical processor is assigned to a second virtual processor and a home node of the second virtual processor is not the first node. If the first physical processor is assigned to a second virtual processor and the home node of the second virtual processor is not the first node, execution of the second virtual processor is stopped on the first physical processor and the first virtual processor is dispatched to the first physical processor.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: November 10, 2015
    Assignee: International Business Machines Corporation
    Inventors: Stuart Z. Jacobs, David A. Larson, Naresh Nayar
  • Patent number: 9176968
    Abstract: A directory operational block data structure is provided by a processor within a memory. The directory operational block data structure allows configuration of a directory of a file system, at an operating-system level, with at least one executable program to be executed in response to configurable operating-system level directory events associated with the directory. A first program is attached within the directory operational block data structure to execute in response to a specified directory event. The attached first program is executed at the operating-system level in response to detection of the specified directory event.
    Type: Grant
    Filed: October 18, 2013
    Date of Patent: November 3, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Prashanth S. Krishna
  • Patent number: 9176783
    Abstract: A process generates a sample based on an event. The process identifies, with a dispatch monitor, a next dispatched monitored thread that is dispatched by a current processor. The process sets a processor affinity of the next dispatched monitored thread such that the next dispatched monitored thread runs only on the current processor without being able to migrate to a different processor. The process also retrieves, with a sampled thread that runs on the current processor, a next dispatched monitored thread call stack after the processor affinity of the next dispatched monitored thread has been set to the processor. The process restores the processor affinity of the next dispatched monitored thread after the next dispatched monitored thread call stack has been obtained.
    Type: Grant
    Filed: May 24, 2010
    Date of Patent: November 3, 2015
    Assignee: International Business Machines Corporation
    Inventors: Kean G. Kuiper, Frank E. Levine, Enio M. Pineda
  • Patent number: 9170840
    Abstract: Duration sensitive scheduling in a computing environment, the computing environment including a computer configured to support a virtual machine, including: identifying, by a duration sensitive scheduler, a processing job to be executed by the virtual machine, wherein the virtual machine includes an entitlement specification that identifies physical resources of the computer that are designated for exclusive use by the virtual machine; determining, by the duration sensitive scheduler, a duration required to complete the processing job; identifying, by the duration sensitive scheduler, a time slot at which the physical resources of the computer that are identified in the entitlement specification are available for use by the virtual machine; scheduling, by the duration sensitive scheduler, the processing job for execution on the virtual machine during the time slot at which the physical resources of the computer that are identified in the entitlement specification are available for use by the virtual machine.
    Type: Grant
    Filed: November 2, 2011
    Date of Patent: October 27, 2015
    Assignee: Lenova Enterprise Solutions (Singapore) Pte. Ltd.
    Inventors: James J. Bozek, Nils P. Hansson, Edward S. Suffern, James L. Wooldridge
  • Patent number: 9170849
    Abstract: Systems and methods are presented for providing resources by way of a platform as a service in a distributed computing environment to perform a job. Resources of the system, job performing on the system, and schedulers of the jobs performing on the system are decoupled in a manner that allows a job to easily migrate among resources. It is contemplated that the migration of jobs from a first pool of resource to a second pool of resource is performed by the system without human intervention. The migration of a job may utilize different schedulers for the different resources. Further, it is contemplated that a pool of resources may automatically allocate additional or fewer resources in response to a migration of a job.
    Type: Grant
    Filed: January 9, 2012
    Date of Patent: October 27, 2015
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Bradley Gene Calder, Ju Wang, Vaman Bedekar, Sriram Sankaran, Marvin McNett, II, Pradeep Kumar Gunda, Yang Zhang, Shyam Antony, Kavitha Manivannan, Arild E. Skjolsvold, Hemal Khatri
  • Patent number: 9170841
    Abstract: A multiprocessor system includes a plurality of processors, each including a task scheduler that determines a task execution order of tasks in a task set to be executed by the processors within a task period which is defined as a period in repeated execution of the task sets; and a scheduler management device having a command unit configured to issue a command for at least one of the task schedulers to change the task execution order, wherein each of the at least one of the task schedulers, when receiving the command from the command unit, changes the task execution order of the corresponding processor.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: October 27, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Kiyokazu Fukuzaki, Masanori Henmi, Hazuki Okabayashi, Hiroyuki Murata, Takatsugu Sawai, Hiroyuki Shigeta
  • Patent number: 9164789
    Abstract: A method and system for managing multiple queues providing a communication path between a virtual machine and a hypervisor in a virtual machine system. The multiple queues are bundled together and identified on a polled list. When one of the queues on the polled list is used to communicate a request from the virtual machine to the hypervisor, a virtual machine exit is performed and a virtual machine exit is disabled for all of the queues on the polled list. The queues on the polled list are assigned to an initial host CPU to service requests from the virtual machine. If a particular queue on the polled list experiences a load that exceeds a load threshold, the particular queue is removed from the polled list and assigned to a different host CPU.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: October 20, 2015
    Assignee: Red Hat Israel, Ltd.
    Inventors: Michael Tsirkin, Ronen Hod
  • Patent number: 9158596
    Abstract: A partitioned ticket lock may control access to a shared resource, and may include a single ticket value field and multiple grant value fields. Each grant value may be the sole occupant of a respective cache line, an event count or sequencer instance, or a sub-lock. The number of grant values may be configurable and/or adaptable during runtime. To acquire the lock, a thread may obtain a value from the ticket value field using a fetch-and-increment type operation, and generate an identifier of a particular grant value field by applying a mathematical or logical function to the obtained ticket value. The thread may be granted the lock when the value of that grant value field matches the obtained ticket value. Releasing the lock may include computing a new ticket value, generating an identifier of another grant value field, and storing the new ticket value in the other grant value field.
    Type: Grant
    Filed: March 18, 2011
    Date of Patent: October 13, 2015
    Assignee: Oracle International Corporation
    Inventor: David Dice
  • Patent number: 9147160
    Abstract: Embodiments of a system and method for asynchronous explanation and explanation-based constraint problem solving are generally described herein. In one or more embodiments, an apparatus includes an asynchronous constraint satisfaction problem solving module (ACSPSM), the ACSPSM can be executable by one or more processors. The ACSPSM can be configured to propagate at least one constraint to a plurality of variables by reducing a speculative propagation range of a first variable when a first value in the speculative propagation range of the first variable is in conflict with the constraint. The ACSPSM can be configured to update an explanation for the reduction in the speculative propagation range of the first variable, or backtrack when a choice of a second value for a second variable would result in the speculative propagation range of the first variable becoming empty. The ACSPSM can be multi-threaded.
    Type: Grant
    Filed: January 18, 2013
    Date of Patent: September 29, 2015
    Assignee: Raytheon Company
    Inventor: Aleksey Nogin
  • Patent number: 9146609
    Abstract: According to one embodiment, a method for thread consolidation is provided for a system that includes an operating system and a multi-core processing chip in communication with an accelerator chip. The method includes running an application having software threads on the operating system, mapping the software threads to physical cores in the multi-core processing chip, identifying one or more idle hardware threads in the multi-core processing chip and identifying one or more idle accelerator units in the accelerator chip. The method also includes executing the software threads on the physical cores and the accelerator unit. The method also includes the controller module consolidating the software threads executing on the physical cores, resulting in one or more idle physical cores and a consolidated physical core. The method also includes the controller module activating a power savings mode for the one or more idle physical cores.
    Type: Grant
    Filed: November 20, 2012
    Date of Patent: September 29, 2015
    Assignee: International Business Machines Corporation
    Inventors: Pradip Bose, Alper Buyuktosunoglu, Bryan S. Rosenburg, Kyung D. Ryu, Augusto J. Vega
  • Patent number: 9141433
    Abstract: A computing device associated with a cloud computing environment identifies a first worker cloud computing device from a group of worker cloud computing devices with available resources sufficient to meet required resources for a highest-priority task associated with a computing job including a group of prioritized tasks. A determination is made as to whether an ownership conflict would result from an assignment of the highest-priority task to the first worker cloud computing device based upon ownership information associated with the computing job and ownership information associated with at least one other task assigned to the first worker cloud computing device. The highest-priority task is assigned to the first worker cloud computing device in response to determining that the ownership conflict would not result from the assignment of the highest-priority task to the first worker cloud computing device.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: September 22, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ronald P. Doyle, David L. Kaminsky
  • Patent number: 9141173
    Abstract: According to one embodiment, a method for thread consolidation is provided for a system that includes an operating system and a multi-core processing chip in communication with an accelerator chip. The method includes running an application having software threads on the operating system, mapping the software threads to physical cores in the multi-core processing chip, identifying one or more idle hardware threads in the multi-core processing chip and identifying one or more idle accelerator units in the accelerator chip. The method also includes executing the software threads on the physical cores and the accelerator unit. The method also includes the controller module consolidating the software threads executing on the physical cores, resulting in one or more idle physical cores and a consolidated physical core. The method also includes the controller module activating a power savings mode for the one or more idle physical cores.
    Type: Grant
    Filed: August 15, 2013
    Date of Patent: September 22, 2015
    Assignee: International Business Machines Corporation
    Inventors: Pradip Bose, Alper Buyuktosunoglu, Bryan S. Rosenburg, Kyung D. Ryu, Augusto J. Vega
  • Patent number: 9141422
    Abstract: A parallel execution runtime allows tasks to be executed concurrently in a runtime environment. The parallel execution runtime delegates the implementation of task queuing, dispatch, and thread management to one or more plug-in schedulers in a runtime environment of a computer system. The plug-in schedulers may be provided by user code or other suitable sources and include interfaces that operate in conjunction with the runtime. The runtime tracks the schedulers and maintains control of all aspects of the execution of tasks from user code including task initialization, task status, task waiting, task cancellation, task continuations, and task exception handling.
    Type: Grant
    Filed: May 18, 2010
    Date of Patent: September 22, 2015
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Stephen H. Toub, Huseyin S. Yildiz, Joseph E. Hoag, John J. Duffy, Danny Shih