Abstract: Hardware based isolation for secure execution of virtual machines (VMs). At least one virtual machine is executed via operation of a hypervisor and an ultravisor. A first memory component is configured for access by the hypervisor and the ultravisor, and a second memory component is configured for access by the ultravisor and not by the hypervisor. A first mode of operation is operated, such that the virtual machine is executed using the hypervisor, wherein the first memory component is accessible to the virtual machine and the second memory component is not accessible to the virtual machine. A second mode of operation is operated, such that the virtual machine is executed using the ultravisor, wherein the first memory component and the second memory component are accessible to the virtual machine, thereby executing application code and operating system code using the second memory component without code changes.

Abstract: Techniques to implement physically aware kernels are described. A kernel or operating system controlling resources and processing on a computer is rendered environmentally aware. The physical environment of a computer is measured by one or more sensors. The measurements or observations are evaluated. When a pre-specified environmental condition exists according the measurements or observations, the kernel is adapted accordingly. The core behavior of the kernel, such as how it manages memory or how it manages processes, is modified in light of sensed environmental conditions. That is, kernel-level functionality, as opposed to user-space application code, is modified in response to specific environmental conditions. An embodiment may have a policy engine that monitors sensor observations and an enforcement module that reaches into the kernel to modify the kernel based on conclusions reached by the policy engine. In another embodiment, the kernel itself stores, monitors, and responds to environment data.

Abstract: A method and apparatus for scheduling instructions of a shader program for a graphics processing unit (GPU) with a fixed number of registers. The method and apparatus include computing, via a processing unit (PU), a liveness-based register usage across all basic blocks in the shader program, computing, via the PU, the range of numbers of waves of a plurality of registers for the shader program, assessing the impact of available post-register allocation optimizations, computing, via the PU, the scoring data based on number of waves of the plurality of registers, and computing, via the PU, the number of waves for execution for the plurality of registers.

Abstract: A method for operating a multithread processing system is provided, including assigning, by a controller, a subset of a plurality of tasks to a plurality of threads during a time N, collecting, by the controller, data during the time N concerning the operation of the plurality of threads, analyzing, by the controller, the data to determine at least one condition concerning the operation of the plurality of threads during the time N, and adjusting, by the controller, a number of the plurality of threads available in time N+1 in accordance with the at least one condition.

Abstract: Techniques are provided for restoring threads within a processing core. The techniques include, for a first thread group included in a plurality of thread groups, executing a context restore routine to restore from a memory a first portion of a context associated with the first thread group, determining whether the first thread group completed an assigned function, and, if the first thread group completed the assigned function, then exiting the context restore routine, or if the first thread group did not complete the assigned function, then executing one or more operations associated with a trap handler routine.

Abstract: The present disclosure is directed to packet processing via reconfigurable packet processing system. A network device is configured to identify a processing order of multiple function units based on a first flow parameter of a first packet, execute a first function unit according to the processing order, update a processing status for the first packet to indicate processing by the first function unit is complete, and transmit the first packet responsive to determining from the processing status that the processing order has been completed. The network device is configured to receive a second packet including a second flow parameter, identify the second packet as a response packet of the first packet based on the first and second flow parameters, identify a reverse of the first processing order of the multiple function units, and execute a second function unit according to the reverse processing order.

Abstract: A semiconductor device including a register controller and a processor which includes a register is provided. The register includes a first circuit and a second circuit which includes a plurality of memory portions. The first circuit and the plurality of memory portions can store data by an arithmetic process of the processor. Which of the plurality of memory portions the data is stored in depends on a routine by which the data is processed. The register controller switches the routine in response to an interrupt signal. The register controller can make any one of the plurality of memory portions which corresponds to the routine store the data in the first circuit every time the routine is switched. The register controller can make data stored in any one of the plurality of memory portions which corresponds to the routine be stored in the first circuit every time the routine is switched.

Abstract: An information processing system includes a GW and a portable communication device. The GW includes a transmitter that transmits, to the portable communication device that is located within a given area, a request to transmit information; a receiver that receives a response to the request to transmit information from the portable communication device; and a data acquisition controller that, when the number of responses received is larger than a maximum allowable number to the GW, adjusts the area to which the request to transmit information is transmitted such that the number of responses is equal to or smaller than the maximum allowable number and that, when the number of responses is equal to or smaller than the maximum allowable number to the GW, adjusts an area to which the request to transmit information is transmitted, which is an area different from the area to which the request has been transmitted.

Abstract: In an embodiment, an integrated circuit may include one or more processors. Each processor may include multiple processor cores, and each core has a different design/implementation and performance level. For example, a core may be implemented for high performance, and another core may be implemented at a lower maximum performance, but may be optimized for efficiency. Additionally, in some embodiments, some features of the instruction set architecture implemented by the processor may be implemented in only one of the cores that make up the processor. If such a feature is invoked by a code sequence while a different core is active, the processor may swap cores to the core the implements the feature. Alternatively, an exception may be taken and an exception handler may be executed to identify the feature and activate the corresponding core.

Abstract: A computer hardware system configured to perform runtime analysis and runtime control of a multithreaded computer program includes at least one processor. The at least one processor is configured to initiate and/or perform the following. A plurality of the threads are folded, under control of a supervisor thread, together to be executed as a single folded thread. The execution of the folded thread is monitored to determine a status of the threads. At least one indicator corresponding, to the determined status of the threads, is presented in a user interface.

Abstract: A method includes running a scale-up hypervisor on a server complex including at least one server and running a single operating system and at least one application on top of the scale-up hypervisor. The method further includes identifying a firmware update available for a first hardware component within the server complex. The scale-up hypervisor removes all workload from the first hardware component, and the identified firmware update is applied to the first hardware component while the first hardware component is idle and the hypervisor continues running the single operating system and the at least one application. Preferably, the method may be used to sequentially apply firmware updates to various hardware components across the plurality of servers without ever shutting down the entire plurality of servers.

Abstract: A job scheduler system includes one or more hardware processors, a memory including a job group queue stored in the memory, and a job scheduler engine configured to create a first job group in the job group queue, the first job group includes a generation counter having an initial value, receive a first request to steal the first job group, determine a state of the first job group based at least in part on the generation counter, the state indicating that the first job group is available to steal, based on the determining the state of the first job group, atomically increment the generation counter, thereby making the first job group unavailable for stealing, and alter an execution order of the first job group ahead of at least one other job group in the job group queue.

Abstract: A method and computer system for compiling, by a computing device, a list of hosting software classes included in the hosting software fix pack when a fix is available. An execution path of each application hosted on a hosting software may be recorded. The execution path may be stored in a data store for each application. It may be determined which operations of each application interact with the hosting software. The operations of each application used at runtime that interact with the hosting software may be stored, including storing invoked hosting software operations and classes used by the operations of each application. The invoked hosting software operations and classes may be compared with corresponding operations and classes provided in the list included in the hosting software fix pack. A list of each intersection of the comparison for each application impacted by the hosting software fix pack may be generated.

Abstract: One or more techniques and/or systems are provided for implementing a reverse protocol launch. For example, the reverse protocol launch may be implemented between apps (e.g., as an app-to-app protocol) such that a user may navigate between apps in a contextually relevant manner using the reverse protocol launch. In an example, a search app may display vacation search results based upon a search query. Responsive to a selection of a vacation movie search result, a transition to a movie app may occur. A context, specifying a contextual state of the search app (e.g., information regarding the vacation search results, the search query, etc.), may be sent to the movie app. The movie app may implement a reverse protocol launch using the context to transition from the movie app back to the search app in the contextual state (e.g., the search app may be repopulated with the vacation search results, etc.).

Abstract: A computer-implemented system and method for flexibly taking actions upon activation of rule-based triggers are provided. A collection of documents is stored in a storage device within a computing environment. An activity of a user performed on a document from the collection is observed. At least one of an application, operation, key word, time, place, project, topic, different document from the collection, and different user is identified. A connection associated with the user is determined to at least one of the application, operation, key word, time, place, project, topic, different document from the collection, and different user based on the observed activity. A rule based on the connection and the observed activity is defined. The rule and a corresponding action are stored as a trigger. Rule satisfaction by at least one of a further activity, event, and stimuli activates the trigger, which causes performance of the corresponding action.

Abstract: Functionality is disclosed herein for using a context sensitive framework to identify relevant applications to a current context and to provide data received from the relevant applications to a user. Instead of a user having to manually locate and launch an application, relevant applications determined by a contextual service may provide data in response to receiving the context data. The applications that are identified as relevant to the context determine the application data to provide to the contextual service. The contextual service selects at least a portion of the application data to provide for display within a user interface. In some configurations, the selected application data is displayed within a user interface that maintains a same look and feel regardless of the application data that is displayed.

Abstract: A method for task scheduling and an electronic device using the same are provided. The method for scheduling tasks in an electronic device includes assigning a task to one of first processing units functionally connected to the electronic device, measuring a task load of the task, and controlling migration of the task to one of second processing units functionally connected to the electronic device based on the task load.

Abstract: A computing platform 20 runs a compartmented operating system 22 and includes a trusted device 23 for forming an integrity metric which a user can interrogate to confirm integrity of the operating system. Also, the integrity of an individual compartment 24 is verified by examining status information for that compartment including, for example, the identity of any open network connections, the identity of any running processes, and the status of a section of file space allocated to that compartment 24. Hence, the integrity of an individual compartment 24 of the compartmented operating system 22 can be demonstrated.

Abstract: A method may include associating, with a timer-B, a second application in a terminal device; setting the terminal device in a standby mode; and executing the second application when a processor in the terminal device wakes up after the timer-B measures a second amount of elapsed time. The timer-B may not initiate wake-up of the processor. The method may further include determining whether the second application is associated with the timer-B or a timer-A when the terminal device receives a command of setting the terminal device in the standby mode; and when the second application is determined as being associated with the timer-A, unassociating the second application with the timer-A. The timer-A may initiate wake-up of the processor when the timer-A measures another second amount of elapsed time while the terminal device is the standby mode. A timer associated with a first application may initiate wakeup of the processor.

Abstract: A system provides complex branch execution hardware and a hardware-based Multiplexer (MUX) to multiplex a fetch address of a future branch and a preloaded branch fetch address to create an index hash value that is used to index a branch target prediction table for execution by a processor core, in order to reduce branch mis-prediction by preloading.

Abstract: Some embodiments relate to techniques for receiving a query from a device, the query comprising content; determining based at least in part on the content of the query that an application is to be launched on the device; and causing the device to launch the application using at least some information determined from the content of the query. Some embodiments relate to techniques for receiving a free-form query from a user; transferring a representation of the query to at least one computer; and receiving from the at least one computer at least one instruction to launch an application on the device.

Abstract: Embodiments relate to thread context restoration. One aspect is a multithreading computer system including a configuration with a core configurable between a single thread (ST) mode and a multithreading (MT) mode. The ST mode addresses a primary thread and the MT mode addresses the primary thread and one or more secondary threads on shared resources of the core. A multithreading facility is configured to control utilization of the configuration to perform a method including disabling one or more secondary threads based on switching from MT mode to ST mode. A thread context of secondary threads is made unavailable to programs. Based on a last-set program-specified maximum thread-id indicating MT, the thread context is obtained by a) executing a set MT instruction to resume the MT mode, and b) based on being in the resumed MT mode, accessing the thread context.

Abstract: A time slice group (TSG) is a grouping of different streams of work (referred to herein as “channels”) that share the same context information. The set of channels belonging to a TSG are processed in a pre-determined order. However, when a channel stalls while processing, the next channel with independent work can be switched to fully load the parallel processing unit. Importantly, because each channel in the TSG shares the same context information, a context switch operation is not needed when the processing of a particular channel in the TSG stops and the processing of a next channel in the TSG begins. Therefore, multiple independent streams of work are allowed to run concurrently within a single context increasing utilization of parallel processing units.

Abstract: Detecting stalling of a software process in a computer system includes receiving identification of a task thread group executing in a work process executing on a computer system. The task thread group includes one or more threads and the receiving includes receiving identification of the one or more threads by a control process executing on a computer system. The detecting includes detecting whether there is a thread state change for the task thread group, marking the task as running responsive to detecting a thread state change for the task thread group, marking the task as stalled responsive to detecting an absence of a thread state change for at least a predefined amount of time, and marking the work process as stalled responsive detecting an absence of a predetermined signal from the work process for at least a predefined amount of time.

Abstract: A system and method for creating switchable desktops each with its own authorization. The system provides a custom authentication and authorization data store that defines permission sets called roles, and lists which roles each user may assume. The system also provides a custom virtual desktop manager that creates new virtual desktops using the permissions defined by the roles. When a user requests a new virtual desktop and role from the desktop manager, the manager requests new virtual desktop components from the operating system. The desktop manager intercepts a request by the operating system to the Local Security Authority module for permissions to grant the new virtual desktop. The manager substitutes the user's requested role permissions for the permissions granted by the LSA module. The LSA module and operating system grant those role permissions in a newly created virtual desktop.

Abstract: Embodiments include an apparatus comprising a processor and a computer readable storage medium having computer usable program code. The computer usable program code can be configured to determine whether priority of a requested task is higher than a priority of a currently executing task. The computer usable program code can be further configured to determine whether a value indicates that the currently executing task can be interrupted. The computer usable program code can be configured to trigger execution of the requested task on the processor, if the value indicates that the currently executed task can be interrupted. The computer usable program code can be further configured to wait for lapse of a time period and, interrupt the currently executing task upon detection of lapse of the time period or detection of a change to the value, if the value indicates that the currently executing task cannot be interrupted.

Abstract: Various embodiments can control access to a computing resource (e.g., a memory resource) by detecting that a high priority activity is accessing the resource and preventing a lower priority activity from accessing the resource. The lower priority activity can be allowed access to the resource after the high priority activity is finished accessing the resource. Various embodiments enable memory operations to be mapped to account for changes in data ordering that can occur when a lower priority activity is suppressed. For example, when an activity requests that data be written to a logical memory region, a mapping is created that maps the logical memory region to a physical memory region. The data can then be written to the physical memory region.

Abstract: In accordance with the concepts described herein, a system for providing data storage includes at least one virtual server comprising at least one virtual storage device; at least one physical server comprising at least one physical storage device; a data structure, stored on each of the at least one physical storage devices, the data structure comprising: at least one table of contents, the table of contents configured to map storage locations within the virtual storage device to node structures that provide pointers to corresponding storage locations within the physical storage device; a tree structure having a predetermined number of hierarchical levels, each level containing node structures, the node structures containing pointers that point to other node structures or to data locations on the physical storage device; and one or more core software modules executed by one or more virtual machines, one or more physical machines or both and configured to receive requests to access data in the storage locatio

Abstract: The speed of task scheduling by a multitask OS is increased. A task processor includes a CPU, a save circuit, and a task control circuit. The CPU is provided with a processing register and an execution control circuit operative to load data from a memory into a processing register and execute a task in accordance with the data in the processing register. The save circuit is provided with a plurality of save registers respectively associated with a plurality of tasks. In executing a predetermined system call, the execution control circuit notifies the task control circuit as such. The task control circuit switches between tasks for execution upon receipt of the system call signal, by saving, in the save register associated with a task being executed, the data in the processing register, selecting a task to be executed next, and loading data in the save register associated with the selected task into the processing register.

Abstract: A method that tests the real-time behavior of an operating system having a first time system (e.g., a SMI tracer real-time extension) responsible for the real-time behavior of the operating system, wherein a test routine is periodically called for execution and the actual point in time of execution of the test routine is compared with an expected periodic point in time of execution of the test routine.

Abstract: A method to circumvent malicious software via a system configured to bypass a device driver stack and, consequently, also bypass the malicious software that may be adversely affecting the device driver stack by using an alternative stack such as a crash dump I/O stack. The crash dump I/O stack is poorly documented relative to the device driver stack and functions independently from the device driver stack.

Abstract: A system is provided that monitors a first and second virtual server on a first physical server containing a physical processor, monitors physical processor usage wherein capacity is allocated to a first entitlement comprising a first percentage of the capacity guaranteed to the first virtual server, to a second entitlement comprising a second percentage guaranteed to the second virtual server, and to a third percentage one of unallocated and partially and totally allocated to a virtual server based on need, and wherein the percentages total to one hundred percent. The system monitors usage of a first virtual processor associated with the first virtual server, receives a request for first virtual processor utilization by percentage, determines utilization comprising first virtual processor usage divided by a first allocated processing capacity comprising the first entitlement and a portion of the third percentage currently allocated to the first virtual server, and reports the utilization.

Abstract: A method and system for managing software application states selects a plurality of stateful applications for reinstatement at a later time. A set of data contexts is generated based on the selected applications. The set of data contexts is pushed onto a data stack. Thereafter the set of data contexts is popped from the data stack for reinstatement. Each step or function may be initiated automatically or through user input, and may be used in a single-user, multi-user or collaborative setting.

Abstract: A data processing apparatus is described which comprises processing circuitry responsive to data processing instructions to execute integer data processing operations and floating point data processing operations, a first set of integer registers useable by the processing circuitry in executing the integer data processing operations, and a second set of floating point registers useable by the processing circuitry in executing the floating point data processing operations.

Abstract: Apparatuses for reducing power consumption in a programmable logic device (PLD) with a self power down mechanism are disclosed. Methods and a machine readable medium for restoring a prior known state are provided. The prior known state is stored in a memory module before the PLD is powered down and the same state is restored from the memory module when the PLD is powered up. The memory module may be an internal or an external non-volatile or volatile memory source. One sector of the memory may be used to store the previous known state. The memory sector can be partitioned into different sections. One section may be used as a header section associated with a data storage section. Partitioning the memory sector into different sections and utilizing multiple addresses from each section ensure less read and write cycles during the powering down and the powering up of the PLD.

Abstract: Embodiments relate to code stack management. An aspect includes a processor configured to execute a software application. Another aspect includes a code stack memory area and a data stack memory area, the code stack memory area being separate from the data stack memory area. Another aspect includes maintaining a data stack in the data stack memory area, the data stack comprising a plurality of stack frames comprising one or more data variables corresponding to the execution of the software application. Another aspect includes maintaining a code stack in the code stack memory area, the code stack comprising a plurality of code stack entries comprising executable computer code corresponding to the execution of the software application.

Abstract: The invention relates to a server system for providing at least one service. The system having an interface for connecting a server to a user's computer, an authentication device that is designed and provided for request personal identification data of a user who logs onto the server via the user computer and to permit the user computer access if authentication is successful, and a server protection system. The server protection system is designed and provides to compare additional user's computer specific identification data with identification data stored in advance on the server, after successful authentication by the authentication device, and to grant authorization to the user's computer to access the service or services depending on the comparison of the user's computer specific identification data. The invention also relates to a method for providing at least one service and the method for executing an application program.

Abstract: A method for efficient execution of a guest in a virtualized computing environment is provided. The method comprises causing an execution of at least one virtual machine on a computing hardware, the virtual machine executes a hypervisor in a first security ring; and causing an execution of a single guest program on one of the at least one virtual machines, the single guest program comprises a kernel being executed in the first security ring and at least one application being executed in a second security ring.

Abstract: In an information processing terminal, a second screen activation monitoring unit that has received a focus OFF notification sends a domain switch request notification to a domain control unit, and the domain control unit that has received the notification sends a domain switch notification to a first OS. Then, the first OS sends a focus ON notification to a first screen activation monitoring unit and further sends the focus OFF notification to a first application. A resource is thereby released by the first application that is implemented to release an acquired resource upon receiving the focus OFF notification.

Abstract: Methods and systems for running multiple operating systems in a single embedded or mobile device (include PDA, cellular phone and other devices) are disclosed. The invention allows a mobile device that normally can only run a single operating system to run another operating system while preserving the state and data of the original operating system. Guest OS is packaged into special format recognizable by the host OS that still can be executed in place by the system. The Methods include: •Change the memory protection bits for the original OS; •Fake a reduced physical memory space for guest OS; •Use special memory device driver to claim memories of host OS; •Backup whole image of the current OS and data to external memory card.

Abstract: Locale objects are dynamically built from locale source files when requested at run-time. When a locale object is dynamically built, it is stored in global memory so it may be read by multiple applications. Dynamically building locale objects when requested allows software to operate with a relatively small number of locale objects instead of with hundreds or thousands of locale objects, as is known in the art. The result is significant savings in system-wide resources while still allowing for access to a large number of possible locales.

Abstract: Locale objects are dynamically built from locale source files when requested at run-time. When a locale object is dynamically built, it is stored in global memory so it may be read by multiple applications. Dynamically building locale objects when requested allows software to operate with a relatively small number of locale objects instead of with hundreds or thousands of locale objects, as is known in the art. The result is significant savings in system-wide resources while still allowing for access to a large number of possible locales.

Abstract: This method includes steps for the parallel management of a first list and of a second list. The first list corresponds to a list of tasks to be carried out. The second list corresponds to a list of variables indicating the presence or absence of tasks to be carried out. The list of tasks is managed in a “FIFO” manner, that is to say that the first task inputted into the list is the first task to be executed. A task interruption is managed using a “Test And Set” function executed on the elements of the second list, the “Test And Set” function being a function which cannot be interrupted and including the following steps: reading the value of the element in question, storing the read value in a local memory, and assigning a predetermined value to the element which has just been read.

Abstract: A program (e.g., an operating system) is provided a warning that it has a grace period in which to perform a function, such as cleanup (e.g., complete, stop and/or move a dispatchable unit). The program is being warned, in one example, that it is losing access to its shared resources. For instance, in a virtual environment, a guest program is warned that it is about to lose its central processing unit resources, and therefore, it is to perform a function, such as cleanup.

Abstract: A method of processing a job is presented. A packet selector determines a candidate job list including an ordered listing of candidate jobs. Each candidate job in the ordered listing belongs to a communication stream. Jobs in the candidate job list that are eligible for execution are identified by determining whether a preceding job belonging to the same communication stream as the candidate job is present in the candidate job list, and, for each candidate job in the candidate job list, determining whether a preceding job belonging to the same communication stream as the candidate job is being prepared for execution. The packet selector determines a priority for each eligible candidate job in the candidate job list by at least comparing the communication stream of each candidate job to a communication stream of a first job executing within the data processor.

Abstract: Systems and methods for automatically switching scene modes of a monitor may comprise processes and corresponding modules for sending a request to a driver to activate hardware modules of a graphics processing unit (GPU) based on a requirement of a launched application program and then recording identifiers of the activated hardware modules on a list. A record of a scene mode associated with one or more activated hardware modules on the list is located within a scene mode profile table and then the corresponding monitor parameters previously associated with the scene mode are read. The monitor is then automatically adjusted according to the monitor parameters read.

Abstract: A method, information processing system, and computer program product record an execution of a program instruction. A determination is made that a thread has entered a program unit. Another determination is made that that the thread is associated with at least one attribute that matches a set of thread recording criteria. An instruction recording mechanism for the thread is dynamically activated in response to the at least one attribute of the thread matching the set of thread recording criteria.

Abstract: Systems and methods for managing context switches among threads in a processing system. A processor may perform a context switch between threads using separate context registers. A context switch allows a processor to switch from processing a thread that is waiting for data to one that is ready for additional processing. The processor includes control registers with entries which may indicate that an associated context is waiting for data from an external source.

Abstract: An apparatus, program product and method initiate, in connection with a context switch operation, a prefetch of data likely to be used by a thread prior to resuming execution of that thread. As a result, once it is known that a context switch will be performed to a particular thread, data may be prefetched on behalf of that thread so that when execution of the thread is resumed, more of the working state for the thread is likely to be cached, or at least in the process of being retrieved into cache memory, thus reducing cache-related performance penalties associated with context switching.

Abstract: A method of detecting stack overflows includes the following steps: storing in at least one dedicated register at least one data item chosen from: a data item (SPHaut) indicating a maximum permitted value for a stack pointer, and a data item (SPBas) indicating a minimum permitted value for said stack pointer; effecting a comparison between a current value (SP) or past value (SPMin, SPMax) of said stack pointer and said data item or each of said data items; and generating a stack overflow exception if said comparison indicates that said current or past value of said stack pointer is greater than said maximum permitted value or less than said minimum permitted value. A processor for implementing such a method is also provided.