Shaping Or Removal Of Materials (e.g., Etching, Etc.) Patents (Class 977/888)
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Publication number: 20120091094Abstract: The present invention provides a method for forming a nanostructure. The method includes the steps of providing a substrate; forming a plurality of nanoparticles on the substrate; forming a film on the substrate and between every two adjacent nanoparticles of the nanoparticles; removing the nanoparticles; forming a resist layer on the film; performing a wet etching for removing the film and a portion of the substrate under the film to form a plurality of protruding portions; and removing the resist layer to expose the plurality of the protruding portions. The method of the present invention is performed without vacuum environment and photolithography, such that the method of the present invention is simple when compared with the prior art.Type: ApplicationFiled: January 27, 2011Publication date: April 19, 2012Applicant: AUROTEK CORPORATIONInventor: Sheng-Ru Lee
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Publication number: 20120087966Abstract: A resilient foam material having an active antimicrobial bound to, incorporated within, and projecting from its surface is provided for incapacitating or destroying microbes. The antimicrobial has an atomic structure that is capable of mechanically piercing or lysing a microbe thereby incapacitating or destroying the microbe. The resilient antimicrobial foam material may be manufactured into a resilient antimicrobial foam product for drawing across a surface and mechanically incapacitating or destroying microbes on the surface. The resilient antimicrobial foam material may be manufactured into a membrane for providing a sterile barrier for a surface. The resilient antimicrobial foam material is manufactured by combining the antimicrobial with a foam polymer material, heating the foam polymer material under pressure to a temperate that does not deactivate the antimicrobial, incorporating a blowing agent, cooling the material, and extruding the material.Type: ApplicationFiled: October 11, 2011Publication date: April 12, 2012Applicant: OBE Goods, LLCInventor: Jan Frances HAVILAND
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Publication number: 20120088066Abstract: An article having a nanostructured surface and a method of making the same are described. The article can include a substrate and a nanostructured layer bonded to the substrate. The nanostructured layer can include a plurality of spaced apart nanostructured features comprising a contiguous, protrusive material and the nanostructured features can be sufficiently small that the nanostructured layer is optically transparent. A surface of the nanostructured features can be coated with a continuous hydrophobic coating. The method can include providing a substrate; depositing a film on the substrate; decomposing the film to form a decomposed film; and etching the decomposed film to form the nanostructured layer.Type: ApplicationFiled: October 29, 2010Publication date: April 12, 2012Applicant: UT-Battelle, LLCInventors: Tolga Aytug, John T. Simpson, David K. Christen
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Publication number: 20120088656Abstract: Provided herein is a nanostructure refined by suspending an unrefined nanostructure with a solvent, dispersing the suspended nanostructure in an acidic solution and agitating the acidic solution to produce a refined nanostructure.Type: ApplicationFiled: October 6, 2011Publication date: April 12, 2012Applicant: The Research Foundation of State University of New YorkInventors: Stanislaus WONG, Christopher Koenigsmann
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Publication number: 20120080405Abstract: In a nano filter structure for breathing and a manufacturing method of the nano filter structure, a semiconductor process technology is used for manufacturing a nano filter structure comprising a top gate, a bottom gate, a plurality of sidewall gates and a plurality of supports. The sidewall gates include a plurality of filterable gratings, and the filterable gratings are controlled precisely to a nanoscale by a semiconductor process technology. Therefore, the nano filterable gratings can be manufactured easily and quickly, and the multilayer design of the filterable gratings enhances the aperture ratio of a filter material, such that users can inhale or exhale easily through the filter material.Type: ApplicationFiled: December 9, 2011Publication date: April 5, 2012Inventor: Shu-Yuan CHUANG
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Patent number: 8147914Abstract: Disclosed is a structure made of a trench patterned substrate having a pre-determined trench period and a pre-determined mesa to trench width ratio, and a block copolymer on top of the trench patterned substrate. The block copolymer has at least an organic block and a silicon-containing block, wherein the block copolymer can have either perpendicular or parallel cylinders. The structure is annealed under a pre-determined vapor pressure for a predetermined annealing time period, wherein the pre-determined trench period, the pre-determined mesa to trench width ratio, the predetermined vapor pressure and the predetermined annealing time period are chosen such that cylinders formed in the block copolymer are either perpendicular or parallel with respect to the trench-patterned substrate. A method is also described to form the above-mentioned structure.Type: GrantFiled: June 11, 2008Date of Patent: April 3, 2012Assignee: Massachusetts Institute of TechnologyInventors: Yeon Sik Jung, Caroline A. Ross
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Publication number: 20120065309Abstract: A method for making a polymer composite comprises mixing, a thermosetting polymer precursor, and 0.01 to 30 wt % of a derivatized nanoparticle based on the total weight of the polymer composite, the derivatized nanoparticle including functional groups comprising carboxy, epoxy, ether, ketone, amine, hydroxy, alkoxy, alkyl, aryl, aralkyl, alkaryl, lactone, functionalized polymeric or oligomeric groups, or a combination comprising at least one of the forgoing functional groups.Type: ApplicationFiled: September 9, 2010Publication date: March 15, 2012Applicant: Baker Hughes IncorporatedInventors: Gaurav Agrawal, Soma Chakraborty, Ping Duan, Michael H. Johnson
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Publication number: 20120061124Abstract: In accordance with various example embodiments, an apparatus includes two or more circuit nodes and a conductive material that is located between and configured to electrically couple the circuit nodes. The conductive material includes a network of elongated portions of at least one electrospun Cu-based nanostructure. Each elongated portion has an aspect ratio of at least 50,000 and a length that is greater than 100 microns, and at least one fused crossing point that joins with a fused crossing point of another of the elongated portions. The network of elongated portions is distributed and aligned in the conductive material to set a conductance level and a transparency level along the network, along at least one direction.Type: ApplicationFiled: August 22, 2011Publication date: March 15, 2012Inventors: Yi Cui, Hui Wu, Liangbing Hu
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Publication number: 20120064327Abstract: Fiber-like or film-like moldings are produced from a plastified mixture which, based on its weight, is from 60 to 10% by weight of a carrier component and from 40 to 90% by weight of a phase change material. The carrier component contains from 5 to 20% by weight of a polymer or polymer blend from the group of LDPE (low density polyethylene), HDPE (high density polyethylene), PMMA (polymethyl methacrylate), polycarbonate, or mixtures thereof, from 5 to 20% by weight of a styrene block copolymer, and from 0 to 20% by weight of one or more additives. Especially suitable phase change materials include natural and synthetic paraffins, polyethylene glycol (=polyethylene oxide), and mixtures thereof. The plasticized mixture is extruded through a spinneret or a slit die at a temperature of from 130 to 220° C. and is stretched.Type: ApplicationFiled: February 1, 2011Publication date: March 15, 2012Inventors: Angelo Schütz, Stefan Reinemann
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Publication number: 20120062355Abstract: A nanoflat resistor includes a first aluminum electrode (360), a second aluminum electrode (370); and nanoporous alumina (365) separating the first and second aluminum electrodes (360, 370). A substantially planar resistor layer (330) overlies the first and second aluminum electrodes (360, 370) and nanoporous alumina (365). Electrical current passes from the first aluminum electrode (360), through a portion of the planar resistor layer (350) overlying the nanoporous alumina (365) and into the second aluminum electrode (370). A method for constructing a nanoflat resistor (390) is also provided.Type: ApplicationFiled: May 19, 2009Publication date: March 15, 2012Inventors: Arjang Fartash, Peter Mardilovich
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Publication number: 20120056232Abstract: A semiconductor light emitting device includes a structural body, a first electrode layer, an intermediate layer and a second electrode layer. The structural body includes a first semiconductor layer of first conductivity type, a second semiconductor layer of second conductivity type, and a light emitting layer between the first and second semiconductor layers. The first electrode layer is on a side of the second semiconductor layer opposite to the first semiconductor layer; the first electrode layer includes a metal portion and plural opening portions piercing the metal portion along a direction from the first semiconductor layer toward the second semiconductor layer, having an equivalent circular diameter not less than 10 nanometers and not more than 5 micrometers. The intermediate layer is between the first and second semiconductor layers in ohmic contact with the second semiconductor layer. The second electrode layer is electrically connected to the first semiconductor layer.Type: ApplicationFiled: March 1, 2011Publication date: March 8, 2012Applicant: Kabushiki Kaisha ToshibaInventors: Akira Fujimoto, Koji Asakawa, Ryota Kitagawa, Takanobu Kamakura, Shinji Nunotani, Eishi Tsutsumi, Masaaki Ogawa
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Publication number: 20120056155Abstract: A semiconductor light emitting device includes a structural body, a first electrode layer, and a second electrode layer. The structural body includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, and a light emitting layer between the first semiconductor layer and the second semiconductor layer. The first electrode layer includes a metal portion, a plurality of first opening portions, and at least one second opening portion. The metal portion has a thickness of not less than 10 nanometers and not more than 200 nanometers along a direction from the first semiconductor layer toward the second semiconductor layer. The plurality of first opening portions each have a circle equivalent diameter of not less than 10 nanometers and not more than 1 micrometer. The at least one second opening portion has a circle equivalent diameter of more than 1 micrometer and not more than 30 micrometers.Type: ApplicationFiled: March 1, 2011Publication date: March 8, 2012Applicant: Kabushiki Kaisha ToshibaInventors: Koji Asakawa, Akira Fujimoto, Ryota Kitagawa, Takanobu Kamakura, Shinji Nunotani, Eishi Tsutsumi, Masaaki Ogawa
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Publication number: 20120056222Abstract: A semiconductor light emitting device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a light emitting layer, a first electrode layer, and a second electrode layer. The light emitting layer is between the first semiconductor layer and the second semiconductor layer. The first electrode layer is on a side of the second semiconductor layer opposite to the first semiconductor layer. The first electrode layer includes a metal portion and a plurality of opening portions piercing the metal portion along a direction from the first semiconductor layer toward the second semiconductor layer. The metal portion contacts the second semiconductor layer. An equivalent circular diameter of a configuration of the opening portions as viewed along the direction is not less than 10 nanometers and not more than 5 micrometers.Type: ApplicationFiled: March 1, 2011Publication date: March 8, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Ryota KITAGAWA, Akira FUJIMOTO, Koji ASAKAWA, Eishi TSUTSUMI, Takanobu KAMAKURA, Shinji NUNOTANI, Masaaki OGAWA
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Patent number: 8123961Abstract: Methods for fabricating sublithographic, nanoscale arrays of openings and linear microchannels utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. Embodiments of the invention use a self-templating or multilayer approach to induce ordering of a self-assembling block copolymer film to an underlying base film to produce a multilayered film having an ordered array of nanostructures that can be removed to provide openings in the film which, in some embodiments, can be used as a template or mask to etch openings in an underlying material layer.Type: GrantFiled: April 20, 2007Date of Patent: February 28, 2012Assignee: Micron Technology, Inc.Inventor: Dan B. Millward
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Patent number: 8123962Abstract: Methods for fabricating sublithographic, nanoscale microstructures arrays including openings and linear microchannels utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. In some embodiments, the films can be used as a template or mask to etch openings in an underlying material layer.Type: GrantFiled: June 12, 2007Date of Patent: February 28, 2012Assignee: Micron Technology, Inc.Inventors: Dan B. Millward, Donald Westmoreland, Gurtej Sandhu
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Patent number: 8123960Abstract: Methods for fabricating sublithographic, nanoscale microchannels utilizing an aqueous emulsion of an amphiphilic agent and a water-soluble, hydrogel-forming polymer, and films and devices formed from these methods are provided.Type: GrantFiled: March 22, 2007Date of Patent: February 28, 2012Assignee: Micron Technology, Inc.Inventor: Dan B. Millward
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Patent number: 8119528Abstract: A process for preparing a phase change memory semiconductor device comprising a (plurality of) nanoscale electrode(s) for alternately switching a chalcogenide phase change material from its high resistance (amorphous) state to its low resistance (crystalline) state, whereby a reduced amount of current is employed, and wherein the plurality of nanoscale electrodes, when present, have substantially the same dimensions.Type: GrantFiled: August 19, 2008Date of Patent: February 21, 2012Assignee: International Business Machines CorporationInventors: Alejandro G Schrott, Eric A Joseph, Mary Beth Rothwell, Matthew J Breitwisch, Chung H Lam, Bipin Rajendran, Sarunya Bangsaruntip
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Patent number: 8114723Abstract: A structure, memory devices using the structure, and methods of fabricating the structure. The structure includes: an array of nano-fins, each nano-fin comprising an elongated block of semiconductor material extending axially along a first direction, the nano-fins arranged in groups of at least two nano-fins each, wherein ends of nano-fins of each adjacent group of nano-fins are staggered with respect to each other on both a first and a second side of the array; wherein nano-fins of each group of nano-fins are electrically connected to a common contact that is specific to each group of nano-fins such that the common contacts comprise a first common contact on the first side of the array and a second common contact on the second side of the array; and wherein each group of nano-fins has at least two gates that electrically control the conductance of nano-fins of the each group of nano-fins.Type: GrantFiled: June 7, 2010Date of Patent: February 14, 2012Assignee: International Business Machines CorporationInventors: Kailash Gopalakrishnan, Rohit Sudhir Shenoy
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Patent number: 8114300Abstract: Methods for fabricating sublithographic, nanoscale polymeric microstructures utilizing self-assembling block copolymers, and films and devices formed from these methods are provided.Type: GrantFiled: April 21, 2008Date of Patent: February 14, 2012Assignee: Micron Technology, Inc.Inventor: Dan B. Millward
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Patent number: 8114301Abstract: Methods for fabricating sublithographic, nanoscale microstructures in line arrays utilizing self-assembling block copolymers, and films and devices formed from these methods are provided.Type: GrantFiled: May 2, 2008Date of Patent: February 14, 2012Assignee: Micron Technology, Inc.Inventors: Dan B. Millward, Donald Westmoreland
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Publication number: 20120029064Abstract: A high-efficacy, long-acting formulation of silibinin, comprising silibinin solid dispersion, silibinin-loaded silica nanoparticles, slow-release matrix material and release enhancer, wherein the mass ratio of these components is silibinin solid dispersion:silibinin-loaded silica nanoparticles:slow-release matrix material:release enhancer=1:0.5˜1.25:0.1˜0.3:0.1˜0.3; the drug loading rate of the said silibinin-loaded silica nanoparticles is 51.29˜51.77%; the said silibinin solid dispersion contains povidone K30, soybean lecithin, acrylic resin IV, wherein the mass ratio between silibinin and other medical accessories is silibinin:povidone K30:soybean lecithin:acrylic resin IV=1:1˜3:0.3˜0.8:0.2˜0.5. Compared with the existing formulations, the half life of the high-efficacy, long-acting formulation of silibinin disclosed in this invention is 14.8 times longer while the mean residence time (MRT) of which is 4.Type: ApplicationFiled: November 23, 2009Publication date: February 2, 2012Applicant: JIANGSU UNIVERSITYInventors: Ximing Xu, Jiangnan Yu, Xia Cao, Yuan Zhu
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Publication number: 20120021293Abstract: The present invention provides a method of exfoliating a layered material (e.g., transition metal dichalcogenide) to produce nano-scaled platelets having a thickness smaller than 100 nm, typically smaller than 10 nm. The method comprises (a) dispersing particles of a non-graphite laminar compound in a liquid medium containing therein a surfactant or dispersing agent to obtain a stable suspension or slurry; and (b) exposing the suspension or slurry to ultrasonic waves at an energy level for a sufficient length of time to produce separated nano-scaled platelets. The nano-scaled platelets are candidate reinforcement fillers for polymer nanocomposites.Type: ApplicationFiled: September 23, 2011Publication date: January 26, 2012Inventors: Aruna Zhamu, Bor Z. Jang
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Patent number: 8101005Abstract: A process is described for making metal nanoparticles comprising (a) forming a liquid melt of a first metal having the composition of the desired nanoparticles and a second metal; (b) quenching the melt to form a solid; and (c) removing the second metal from the solid and forming the nanoparticles comprising the first metal.Type: GrantFiled: December 21, 2007Date of Patent: January 24, 2012Assignee: Cima NanoTech Israel Ltd.Inventors: Arkady Garbar, Dmitry Lekhtman, Thomas Zak, Fernando de la Vega
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Publication number: 20120015143Abstract: The invention provides an epitaxial substrate and fabrication thereof. The epitaxial substrate according to the invention includes a crystalline substrate. In particular, the crystalline substrate has an epitaxial surface which is nano-rugged and non-patterned. The epitaxial substrate according to the invention thereon benefits a compound semiconductor material in growth of epitaxy films with excellent quality. Moreover, the fabrication of the epitaxial substrate according to the invention has advantages of low cost and rapid production.Type: ApplicationFiled: June 22, 2011Publication date: January 19, 2012Applicant: Sino-American Silicon Products Inc.Inventors: Jiunn-Yih Chyan, Jer-Liang Yeh, Wen-Ching Hsu, Suz-Hua Ho
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Publication number: 20120012557Abstract: A continuous method for making a nanostructured surface comprises (a) placing a substrate comprising a nanoscale mask on a cylindrical electrode in a vacuum vessel, (b) introducing etchant gas to the vessel at a predetermined pressure, (c) generating plasma between the cylindrical electrode and a counter-electrode, (d) rotating the cylindrical electrode to translate the substrate, and (e) anisotropically etching a surface of the substrate to provide anisotropic nanoscale features on the surface.Type: ApplicationFiled: December 29, 2009Publication date: January 19, 2012Inventors: Moses M. David, Ta-Hua Yu
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Patent number: 8097175Abstract: Methods of forming metal oxide structures and methods of forming metal oxide patterns on a substrate using a block copolymer system formulated for self-assembly. The metal oxide structures and patterns may be used, for example, as a mask for sublithographic patterning during various stages of semiconductor device fabrication. A block copolymer at least within a trench in the substrate and including at least one soluble block and at least one insoluble block may be annealed to form a self-assembled pattern including a plurality of repeating units of the at least one soluble block laterally aligned with the trench and positioned within a matrix of the at least one insoluble block. The self-assembled pattern may be exposed to a metal oxide precursor that impregnates the at least one soluble block. The metal oxide precursor may be oxidized to form a metal oxide. The self-assembled pattern may be removed to form a pattern of metal oxide lines on the substrate surface.Type: GrantFiled: October 28, 2008Date of Patent: January 17, 2012Assignee: Micron Technology, Inc.Inventors: Dan B. Millward, Timothy A. Quick, J. Neil Greeley
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Publication number: 20120010599Abstract: In alternative embodiments, the invention provides articles of manufacture comprising biocompatible nanostructures comprising PolyEther EtherKetone (PEEK) surface-modified (surface-nanopatterned) to exhibit nanostructured surfaces that promote osseointegration and bone-bonding for, e.g., joint (e.g., knee, hip and shoulder) replacements, bone or tooth reconstruction and/or implants, including their use in making and using artificial tissues and organs, and related, diagnostic, screening, research and development and therapeutic uses, e.g., as primary or ancillary drug delivery devices. In alternative embodiments, the invention provides biocompatible nanostructures that promote osseointegration and bone-bonding for enhanced cell and bone growth and e.g., for in vitro and in vivo testing, restorative and reconstruction procedures, implants and therapeutics.Type: ApplicationFiled: July 6, 2011Publication date: January 12, 2012Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Sungho JIN, Garrett SMITH, Chulmin CHOI
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Publication number: 20110315660Abstract: Disclosed are a method for recycling silica waste and a method for preparing nanoporous material and other valuable silica materials. More specifically, a method for preparing a nanoporous material by recycling silica-containing waste produced from a silica etching process in the synthesis of nanoporous carbon is provided. The present disclosure allows recycling of silica waste in an effective and environment-friendly manner, reduction of consumption of chemical materials, and reduction of chemical waste. Accordingly, the present disclosure enables effective preparation of various valuable nanoporous silica and other silica materials from silica waste released for production of various nanoporous materials.Type: ApplicationFiled: April 29, 2011Publication date: December 29, 2011Inventor: Jong-Sung Yu
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Publication number: 20110318525Abstract: Techniques for making nanowires with a desired diameter are provided. The nanowires can be grown from catalytic nanoparticles, wherein the nanowires can have substantially same diameter as the catalytic nanoparticles. Since the size or the diameter of the catalytic nanoparticles can be controlled in production of the nanoparticles, the diameter of the nanowires can be subsequently controlled as well. The catalytic nanoparticles are melted and provided with a gaseous precursor of the nanowires. When supersaturation of the catalytic nanoparticles with the gaseous precursor is reached, the gaseous precursor starts to solidify and form nanowires. The nanowires are separate from each other and not bind with each other to form a plurality of nanowires having the substantially uniform diameter.Type: ApplicationFiled: September 1, 2011Publication date: December 29, 2011Applicant: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATIONInventor: Kwangyeol Lee
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Patent number: 8083958Abstract: Disclosed are embodiments of a lithographic patterning method that incorporates a combination of photolithography and self-assembling copolymer lithography techniques in order to create, on a substrate, a grid-pattern mask having multiple cells, each with at least one sub-50 nm dimension. The combination of different lithographic techniques further allows for precise registration and overlay of the individual grid-pattern cells with corresponding structures within the substrate. The resulting grid-pattern mask can then be used, in conjunction with directional etch and other processes, to extend the cell patterns into the substrate and, thereby form openings, with at least one sub-50 nm dimension, landing on corresponding in-substrate structures. Once the openings are formed, additional structures can be formed within the openings.Type: GrantFiled: December 5, 2007Date of Patent: December 27, 2011Assignee: International Business Machines CorporationInventors: Wai-Kin Li, Haining S. Yang
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Patent number: 8083953Abstract: Methods for fabricating sublithographic, nanoscale linear microchannel arrays over surfaces without defined features utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. Embodiments of the methods use a multilayer induced ordering approach to align lamellar films to an underlying base film within trenches, and localized heating to anneal the lamellar-phase block copolymer film overlying the trenches and outwardly over the remaining surface.Type: GrantFiled: March 6, 2007Date of Patent: December 27, 2011Assignee: Micron Technology, Inc.Inventors: Dan B. Millward, Eugene P. Marsh
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Patent number: 8084093Abstract: The present invention provides a process for producing a bottom-up type nano-device in which a reaction is initiated from potential singular points on a substrate, and wherein compound molecules are arranged with regularity and a chain reaction is accelerated utilizing the sequence pattern of the potential singular points, specifically, the process comprises a step of producing potential singular points that involves placing potential singular points on a substrate and a contact step of contacting a compound having a functional group which interacts with the fore-mentioned potential singular points.Type: GrantFiled: July 8, 2004Date of Patent: December 27, 2011Assignee: National Institute of Information and Communications Technology Incorporated Adminstrative AgencyInventors: Shukichi Tanaka, Hitoshi Suzuki, Toshiya Kamikado, Shinro Mashiko
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Publication number: 20110311635Abstract: A nanoparticle including a Group 3 atom-containing shell. In various embodiments, the nanoparticle includes a metal or metal catalyst-containing core, or a substantially metal-free core. In other embodiments, the nanoparticle shell is hollow. A method of preparing the nanoparticle and methods of using such particles are also provided.Type: ApplicationFiled: February 12, 2010Publication date: December 22, 2011Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Galen D. Stucky, Nicholas C. Strandwitz
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Publication number: 20110309237Abstract: A nanowire array is described herein. The nanowire array comprises a substrate and a plurality of nanowires extending essentially vertically from the substrate; wherein: each of the nanowires has uniform chemical along its entire length; a refractive index of the nanowires is at least two times of a refractive index of a cladding of the nanowires. This nanowire array is useful as a photodetector, a submicron color filter, a static color display or a dynamic color display.Type: ApplicationFiled: October 22, 2010Publication date: December 22, 2011Applicants: PRESIDENT AND FELLOWS OF HARVARD COLLEGE, ZENA TECHNOLOGIES, INC.Inventors: Kwanyong SEO, Munib Wober, Paul Steinvurzel, Ethan Schonbrun, Yaping Dan, Kenneth B. Crozier
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Publication number: 20110311825Abstract: The present disclosure relates to a method for selectively etching-back a polymer matrix to expose tips of carbon nanotubes comprising: a. growing carbon nanotubes on a conductive substrate; b. filling the gap around the carbon nanotubes with a polymeric fill matrix comprising at least one latent photoacid generator; and c. selectively etching-back the polymeric fill matrix to expose tips of the carbon nanotubes.Type: ApplicationFiled: June 22, 2010Publication date: December 22, 2011Applicant: International Business Machines Corp.Inventors: Maxime Darnon, Gerald W. Gibson, Pratik P. Joshi, Ryan M. Martin, Ying Zhang
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Publication number: 20110312173Abstract: The invention relates to semiconductor devices and a method of fabricating the same. In accordance with a method of fabricating a semiconductor device according to an aspect of the invention, a tunnel insulating layer, a first conductive layer, a dielectric layer, a second conductive layer, and a gate electrode layer are sequentially stacked over a semiconductor substrate. The gate electrode layer, the second conductive layer, the dielectric layer, and the first conductive layer are patterned so that the first conductive layer partially remains to prevent the tunnel insulating layer from being exposed. Sidewalls of the gate electrode layer are etched. A first passivation layer is formed on the entire surface including the sidewalls of the gate electrode layer. At this time, a thickness of the first passivation layer formed on the sidewalls of the gate electrode layer is thicker than that of the first passivation layer formed in other areas.Type: ApplicationFiled: August 10, 2011Publication date: December 22, 2011Applicant: HYNIX SEMICONDUCTOR INC.Inventor: Kwang Seok Jeon
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Publication number: 20110297642Abstract: A transparent conductor including a conductive layer coated on a substrate is described. More specifically, the conductive layer comprises a network of nanowires that may be embedded in a matrix. The conductive layer is optically clear, patternable and is suitable as a transparent electrode in visual display devices such as touch screens, liquid crystal displays, plasma display panels and the like.Type: ApplicationFiled: August 16, 2011Publication date: December 8, 2011Applicant: CAMBRIOS TECHNOLOGIES CORPORATIONInventors: Pierre-Marc Allemand, Haixia Dai, Shuo Na, Hash Pakbaz, Florian Pschenitzka, Xina Quan, Jelena Sepa, Michael A. Spaid, Jeffrey Wolk
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Publication number: 20110300338Abstract: Methods of preparing graphene nano ribbons may include forming a graphene sheet on at least one surface of a substrate, forming a plasma mask having a nano pattern on the graphene sheet, and forming a nano pattern on the graphene sheet by plasma treating a stack structure on which the plasma mask is formed.Type: ApplicationFiled: June 6, 2011Publication date: December 8, 2011Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hyeon-jin Shin, Jae-young Choi, Young-hee Lee, Gang-hee Han
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Publication number: 20110293941Abstract: An inorganic material is described, which consists of at least two elementary spherical particles, each one of said spherical particles comprising metallic nanoparticles of size ranging between 1 and 300 nm and a mesostructured matrix based on an oxide of at least one element X selected from the group made up of silicon, aluminium, titanium, tungsten, zirconium, gallium, germanium, tin, antimony, lead, vanadium, iron, manganese, hafnium, niobium, tantalum, yttrium, cerium, gadolinium, europium and neodymium, and the mixture of at least two of these elements, said mesostructured matrix having a pore diameter ranging between 1.5 and 30 nm and having amorphous walls of thickness ranging between 1 and 30 nm, said elementary spherical particles having a diameter D greater than 10 ?m and less than or equal to 100 ?m. Said material can also contain zeolite nanocrystals trapped within said mesostructured matrix.Type: ApplicationFiled: February 26, 2009Publication date: December 1, 2011Applicant: IFP Energies nouvellesInventors: Alexandra Chaumonnot, Aurélie Coupe, Clément Sanchez, Cédric Boissiere, Michel Martin
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Publication number: 20110284990Abstract: A process for making an alignment structure in manufacturing a semiconductor device, comprising copper interconnect (Cu-interconnect) fabrication involving chemical-mechanical planarization (CMP) is disclosed. The process comprises tailoring said CMP process to produce a sufficiently high dishing on a designated alignment key area during bulk removal of Cu. The additional dishing step would have sufficient step height for optical pickup to produce alignment signal. Subsequent photolithographic processes specifically for making conventional alignment structure may thus be omitted. Preferably, the additional dishing is achieved by control over any one or combination of pressuring, vacuuming and/or venting of a CMP head's membrane, inner tube and retaining ring chambers, and selection of any one or combination of pads, slurry, pad conditioner and recipe, and may only need to achieve a removal of up to 100 {dot over (A)}.Type: ApplicationFiled: April 29, 2011Publication date: November 24, 2011Applicant: SILTERRA MALAYSIA SDN BHDInventors: Anbu Selvam Mahalingam, Venkatesh Madhaven
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Publication number: 20110279188Abstract: A resonator and a method of manufacturing a resonator are provided. The resonator includes a sacrificial layer formed on a substrate, and a resonant structure formed on the sacrificial layer, the resonant structure comprising a carbon nano-substance layer and a silicon carbide layer.Type: ApplicationFiled: May 11, 2011Publication date: November 17, 2011Applicants: Industry-Academic Cooperation Foundation, Yonsei University, SAMSUNG ELECTRONICS CO., LTD.Inventors: Jea Shik Shin, Seong Chan Jun, Yun Kwon Park, In Sang Song, Young Il Kim, Duck Hwan Kim, Chul Soo Kim
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Publication number: 20110278758Abstract: An apparatus for making a carbon nanotube film includes a substrate holder, a bar supplying device, a carrier device, and a stretching device arranged in alignment in that order. A method for making a carbon nanotube film is further provided.Type: ApplicationFiled: July 24, 2011Publication date: November 17, 2011Applicants: HON HAI PRECISION INDUSTRY CO., LTD., TSINGHUA UNIVERSITYInventors: LIANG LIU, KAI-LI JIANG, SHOU-SHAN FAN
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Publication number: 20110278533Abstract: A method of forming a nanoporous film is disclosed. The method comprises forming a coating solution including clusters, surfactant molecules, a solvent, and one of an acid catalyst and a base catalyst. The clusters comprise inorganic groups. The method further comprises aging the coating solution for a time period to select a predetermined phase that will self-assemble and applying the coating solution on a substrate. The method further comprises evaporating the solvent from the coating solution and removing the surfactant molecules to yield the nanoporous film.Type: ApplicationFiled: November 1, 2007Publication date: November 17, 2011Applicant: PURDUE RESEARCH FOUNDATIONInventors: HUGH W. HILLHOUSE, Vikrant N. Urade, Ta-Chen Wei, Michael P. Tate
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Publication number: 20110281068Abstract: A nanostructured article comprises a matrix and a nanoscale dispersed phase. The nanostructured article has a random nanostructured anisotropic surface.Type: ApplicationFiled: December 18, 2009Publication date: November 17, 2011Inventors: Moses M. David, Andrew K. Hartzell, Timothy J. Hebrink, Ta-Hua Yu, Jun-Ying Zhang
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Patent number: 8058089Abstract: Electromechanical circuits, such as memory cells, and methods for making same are disclosed. The circuits include a structure having electrically conductive traces and supports extending from a surface of the substrate, and nanotube ribbons suspended by the supports that cross the electrically conductive traces, wherein each ribbon comprises one or more nanotubes. The electro-mechanical circuit elements are made by providing a structure having electrically conductive traces and supports, in which the supports extend from a surface of the substrate. A layer of nanotubes is provided over the supports, and portions of the layer of nanotubes are selectively removed to form ribbons of nanotubes that cross the electrically conductive traces. Each ribbon includes one or more nanotubes.Type: GrantFiled: March 31, 2009Date of Patent: November 15, 2011Assignee: Nantero Inc.Inventors: Brent M. Segal, Darren K. Brock, Thomas Rueckes
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Publication number: 20110268964Abstract: The present invention describes the use of a composition which can be cured below 40° C., a method of coating fiber/polymer composites, the preparation of curable compositions, and a modular system for preparing said compositions.Type: ApplicationFiled: September 14, 2009Publication date: November 3, 2011Applicant: BASF COATINGS GMBHInventors: Michael Dornbusch, Hendrik Narjes, Doris Austermann
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Publication number: 20110263129Abstract: Disclosed is a method of etching semiconductor nanocrystals, which includes dissolving semiconductor nanocrystals in a halogenated solvent containing phosphine so that anisotropic etching of the surface of semiconductor nanocrystals is induced or adding a primary amine to a halogenated solvent containing phosphine and photoexciting semiconductor nanocrystals thus inducing isotropic etching of the surface of the nanocrystals, thereby reproducibly controlling properties of semiconductor nanocrystals including absorption wavelength, emission wavelength, emission intensity, average size, size distribution, shape, and surface state.Type: ApplicationFiled: December 28, 2010Publication date: October 27, 2011Applicant: POSTECH ACADEMY-INDUSTRY FOUNDATIONInventors: Seung Koo Shin, Won Jung Kim, Sung Jun Lim
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Publication number: 20110259083Abstract: A novel method of manufacturing a hydrogen sensor is disclosed. The method includes the steps of forming a thin film made of a transition metal or an alloy thereof on a surface of an elastic substrate, and forming a plurality of nanogaps in the thin film formed on the surface of the elastic substrate by applying a tensile force to the elastic substrate. The nanogaps are formed as the thin film is stretched in a direction in which the tensile force acts while being contracted in a direction perpendicular to the direction in which the tensile force acts when the tensile force is applied, and is contracted again in the direction in which the tensile force is released while being stretched again in the direction perpendicular to the direction in which the tensile force is released when the tensile force is released.Type: ApplicationFiled: December 3, 2010Publication date: October 27, 2011Applicant: INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITYInventors: Woo Young Lee, Jun Min Lee, Eun Yeong Lee
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Publication number: 20110262772Abstract: Methods for preparing carbon nanotube layers are disclosed herein. Carbon nanotube layers may be films, ribbons, and sheets. The methods comprise preparing an aligned carbon nanotube array and compressing the array with a roller to create a carbon nanotube layer. Another method disclosed herein comprises preparing a carbon nanotube layer from an aligned carbon nanotube array grown on a grouping of lines of metallic catalyst. A composite material comprising at least one carbon nanotube layer and prepared by the process comprising a) compressing an aligned single-wall carbon nanotube array with a roller, and b) transferring the carbon nanotube layer to a polymer is also disclosed.Type: ApplicationFiled: July 31, 2008Publication date: October 27, 2011Applicant: William Marsh Rice UniversityInventors: Robert Hauge, Cary Pint, Ya-Qiong Xu, Matteo Pasquali
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Publication number: 20110253969Abstract: Disclosed is a method for making graphene nanoribbons (GNRs) by controlled unzipping of structures such as carbon nanotubes (CNTs) by etching (e.g., argon plasma etching) of nanotubes partly embedded in a polymer film. The GNRs have smooth edges and a narrow width distribution (2-20 nm). Raman spectroscopy and electrical transport measurements reveal the high quality of the GNRs. Such a method of unzipping CNTs with well-defined structures in an array will allow the production of GNRs with controlled widths, edge structures, placement and alignment in a scalable fashion for device integration. GNRs may be formed from nanostructures in a controlled array to form arrays of parallel or overlapping structures. Also disclosed is a method in which the CNTs are in a predetermined pattern that is carried over and transferred to a substrate for forming into a semiconductor device.Type: ApplicationFiled: April 15, 2010Publication date: October 20, 2011Applicant: The Board of Trustees of the Leland Stanford Junior UniversityInventors: Hongie Dai, Liying Jiao