Vapor Phase Deposition Patents (Class 977/891)
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Patent number: 7524431Abstract: The invention provides a method for forming a patterned material layer on a structure, by condensing a vapor to a solid condensate layer on a surface of the structure and then localized removal of selected regions of the condensate layer by directing a beam of energy at the selected regions, exposing the structure at the selected regions. A material layer is then deposited on top of the solid condensate layer and the exposed structure at the selected regions. Then the solid condensate layer and regions of the material layer that were deposited on the solid condensate layer are removed, leaving a patterned material layer on the structure.Type: GrantFiled: December 9, 2004Date of Patent: April 28, 2009Assignee: President and Fellows of Harvard CollegeInventors: Daniel Branton, Jene A. Golovchenko, Gavin M. King, Warren J. MoberlyChan, Gregor M. Schürmann
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Publication number: 20090053126Abstract: A method for the mass production of nanostructures is provided. The method comprises introducing metal catalyst nanoparticles into a plurality of uniformly sized pores of mesoporous templates, distributing the templates containing the metal catalyst nanoparticles in a three-dimensional manner, and introducing a nanowire source into the pores of the templates to grow the nanowire source into nanowires along the length of the pores. Further provided are nanostructures produced by the method. The nanostructures have a uniform thickness. In addition, the nanostructures may have various shapes and can be controllably doped. The nanostructures can be applied to a variety of devices, including electronic devices, e.g., field effect transistors (FETs) and light-emitting diodes (LEDs), photodetectors, nano-analyzers, and high-sensitivity signal detectors for various applications, e.g., cancer diagnosis.Type: ApplicationFiled: October 31, 2007Publication date: February 26, 2009Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Eun Kyung LEE, Byoung Lyong CHOI, Dong Mock HWANG
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Patent number: 7485855Abstract: A system and method for cleanup of biological samples from contaminants prior to spectroscopy analysis. The system includes a support configured to hold a sample including a liquid having at least one group of biological molecules with a surface of the support binding the molecules at a surface tension angle to the liquid of less than 180 degrees. The system includes an evaporator configured to evaporate liquid from the support, a solvent applicator configured to apply a solvent for dissolution of the contaminants in the sample, and a solvent removal device configured to remove applied solvent from the sample and thereby at least partially remove the contaminants.Type: GrantFiled: May 26, 2006Date of Patent: February 3, 2009Assignee: Science and Engineering Services, Inc.Inventors: Appavu K. Sundaram, Nelli I. Taranenko, Vladimir M. Doroshenko
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Publication number: 20090029064Abstract: An apparatus utilizing a hot wall reactor and methods for making nanoparticles are described. The nanoparticles can be collected in bulk or deposited onto a base substrate. The hot wall reactor utilizes gas-phase synthesis to produce nanoparticles. Inorganic nanoparticles deposited onto a substrate are useful, for example, for biological applications, for example, biomolecule attachment such as DNA, RNA, protein and the like. The inorganic porous substrates are also useful for cell growth applications.Type: ApplicationFiled: July 25, 2007Publication date: January 29, 2009Inventors: Carlton Maurice Truesdale, Joseph Marc Whalen
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Patent number: 7465430Abstract: There is described an apparatus for making metal oxide particles which are substantially free of coarse tail from an oxidizing agent and a metal reactant in a flow reactor. The apparatus can be a concentric tubular flow reactor comprising a substantially funnel-shaped reactant contacting region located adjacent to a reaction zone which is able to direct a flow of a hot oxidizing agent towards a flow of the metal reactant to form a reaction stream which flows downstream into a reaction zone, whereby the hot oxidizing agent of the reaction stream is able to surround the flow of metal reactant sufficient to prevent the metal reactant from contacting the wall of the reactant contacting region and forming scale on the wall.Type: GrantFiled: July 18, 2005Date of Patent: December 16, 2008Assignee: E. I. du Pont de Nemours and CompanyInventors: Juergen Kurt Plischke, Stephan Claude De La Veaux, Scott Rickbeil Frerichs, Jodi Lynn Witt, Christian Normand
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Publication number: 20080266572Abstract: An optical device includes a primary nanowire having a predetermined characteristic that affects an optical property of the primary nanowire. At least one secondary nanowire abuts the primary nanowire at a non-zero angle. The secondary nanowire(s) have another predetermined characteristic that affects an optical property of the secondary nanowire(s). A junction is formed between the primary and secondary nanowires. The device is configured to cause a portion of a light beam of a predetermined wavelength or range of wavelengths traveling through one of the primary nanowire or the secondary nanowire(s) to enter another of the secondary nanowire(s) or the primary nanowire.Type: ApplicationFiled: April 24, 2007Publication date: October 30, 2008Inventor: Theodore I. Kamins
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Patent number: 7435353Abstract: The invention provides a method for forming a patterned material layer on a structure, by condensing a vapor to a solid condensate layer on a surface of the structure and then localized removal of selected regions of the condensate layer by directing a beam of energy at the selected regions. The structure can then be processed, with at least a portion of the patterned solid condensate layer on the structure surface, and then the solid condensate layer removed. Further there can be stimulated localized reaction between the solid condensate layer and the structure by directing a beam of energy at at least one selected region of the condensate layer.Type: GrantFiled: December 9, 2004Date of Patent: October 14, 2008Assignee: President and Fellows of Harvard CollegeInventors: Jene A. Golovchenko, Gavin M. King, Gregor M. Schürmann, Daniel Branton
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Publication number: 20080237568Abstract: Methods of making nanometer-scale semiconductor structures with controlled size are disclosed. Semiconductor structures that include one or more nanowires are also disclosed. The nanowires can include a passivation layer or have a hollow tube structure.Type: ApplicationFiled: April 2, 2007Publication date: October 2, 2008Inventors: Nobuhiko Kobayashi, Wei Wu, Duncan R. Stewart, Shashank Sharma, Shih-Yuan Wang, R. Stanley Williams
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Publication number: 20080226840Abstract: A CVD process for producing nanocrystalline films using a plasma (56, 312) created by an argon atmosphere (at least about 90 percent by volume) containing methane (preferably about at least about 1% by volume) and optionally hydrogen (preferably 0.001 to 2% by volume) is described. Strictly controlled gas purity and an apparatus which excludes oxygen and nitrogen from being introduced from outside of the chamber (40, 305) are used. The films are coated on various substrates to provide seals, optical applications such as on lenses and as a substrate material for surface acoustic wave (SAW) devices.Type: ApplicationFiled: March 28, 2007Publication date: September 18, 2008Applicant: Board of Trustees of Michigan State UniversityInventors: Jes Asmussen, Wen-Shin Huang
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Patent number: 7410901Abstract: A method for fabricating substrate material to include trenches and unreleased beams with submicron dimensions includes etching a first oxide layer on the substrate to define a first set of voids in the first oxide layer to expose the substrate. A second oxide layer is accreted to the first oxide layer to narrow the first set of voids to become a second set of voids on the substrate. A polysilicon layer is deposited over the second oxide layer, the first oxide layer and the substrate. A third set of voids is etched into the polysilicon layer. Further etching widens the third set of voids to define a fourth set of voids to expose the first oxide layer and the substrate. The first oxide layer and the substrate is deeply etched to define beams and trenches in the substrate.Type: GrantFiled: April 27, 2006Date of Patent: August 12, 2008Assignee: Honeywell International, Inc.Inventor: Jorg Pilchowski
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Publication number: 20080178794Abstract: The present invention relates to a method for forming a layered structure with silicon nanocrystals. In one embodiment, the method comprises the steps of: (i) forming a first conductive layer on a substrate, (ii) forming a silicon-rich dielectric layer on the first conductive layer, and (iii) laser-annealing at least the silicon-rich dielectric layer to induce silicon-rich aggregation to form a plurality of silicon nanocrystals in the silicon-rich dielectric layer. The silicon-rich dielectric layer is one of a silicon-rich oxide film having a refractive index in the range of about 1.4 to 2.3, or a silicon-rich nitride film having a refractive index in the range of about 1.7 to 2.3. The layered structure with silicon nanocrystals in a silicon-rich dielectric layer is usable in a solar cell, a photodetector, a touch panel, a non-volatile memory device as storage node, and a liquid crystal display.Type: ApplicationFiled: January 25, 2007Publication date: July 31, 2008Applicant: AU Optronics CorporationInventors: An-Thung Cho, Chih-Wei Chao, Chia-Tien Peng, Wan-Yi Liu, Ming-Wei Sun
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Patent number: 7374731Abstract: A reaction apparatus for producing vapor-grown carbon fibers (VGCF) and a continuous production system for producing VGCF are disclosed. The VGCF reaction apparatus is featured in installing a plurality of holes on the upper portion of inner tubes; and filling thermally conductive material in the areas between the inner tubes and the outer tube. The continuous production system includes the reaction apparatus, a product collection system and a carrier-gas collecting system, wherein carbon fibers produced by the reaction apparatus fall into the product collection system, and in the product collection system, a collection bin full-loaded with carbon fibers is pushed out and an empty bin is pushed into the collection chamber under PLC control as well as atmosphere replacement with inert gas, thereby continuously producing VGCF.Type: GrantFiled: September 2, 2005Date of Patent: May 20, 2008Assignee: Yonyu Plastics Co., Ltd.Inventors: Chun-Shan Wang, Ya-Jen Huang, Yen-Chu Tan, Kai-Jen Ko, Shih-Peng Yang
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Patent number: 7371677Abstract: A semiconductor device has lateral conductors or traces that are formed of nanotubes such as carbon. A sacrificial layer is formed overlying the substrate. A dielectric layer is formed overlying the sacrificial layer. A lateral opening is formed by removing a portion of the dielectric layer and the sacrificial layer which is located between two columns of metallic catalysts. The lateral opening includes a neck portion and a cavity portion which is used as a constrained space to grow a nanotube. A plasma is used to apply electric charge that forms an electric field which controls the direction of formation of the nanotubes. Nanotubes from each column of metallic catalyst are laterally grown and either abut or merge into one nanotube. Contact to the nanotube may be made from either the neck portion or the columns of metallic catalysts.Type: GrantFiled: September 30, 2005Date of Patent: May 13, 2008Assignee: Freescale Semiconductor, Inc.Inventors: Marius K. Orlowski, Shahid Rauf, Peter L. G. Ventzek
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Publication number: 20080067495Abstract: Tunnel field-effect transistors (TFETs) are regarded as successors of metal-oxide semiconductor field-effect transistors (MOSFETs), but silicon-based TFETs typically suffer from low on-currents, a drawback related to the large resistance of the tunnel barrier. To achieve higher on-currents a nanowire-based TFET with a germanium (Ge) tunnel barrier in an otherwise silicon (Si) channel is used. A nanowire is introduced such that the lattice mismatch between silicon and germanium does not result in a highly defective interface. A dynamic power reduction as well as a static power reduction can result, compared to conventional MOSFET configurations. Multiple layers of logic can therefore be envisioned with these nanowire Si/Ge TFETs resulting in ultra-high on-chip transistor densities.Type: ApplicationFiled: June 20, 2007Publication date: March 20, 2008Applicant: Interuniversitair Microelektronica Centrum (IMEC)Inventor: Anne S. Verhulst
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Publication number: 20080034842Abstract: A gas sensor includes a substrate having a plurality of through holes, a pair of electrodes disposed on the substrate, wherein the plurality of through holes are disposed between the pair of electrodes and a plurality of carbon nanotubes covering at least a portion of the plurality of through holes, wherein at least a portion of the plurality of carbon nanotubes is connected with the pair of electrodes.Type: ApplicationFiled: April 3, 2007Publication date: February 14, 2008Applicant: SAMSUNG ELECTRONICS CO., LTDInventors: Soo-suk LEE, Sung-ouk JUNG, Hun-joo LEE, In-ho LEE, Kyu-tae YOO, Jae-ho KIM
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Patent number: 7323218Abstract: Methods of fabricating one-dimensional composite nanofiber on a template membrane with porous array by chemical or physical process are disclosed. The whole procedures are established under a base concept of “secondary template”. First of all, tubular first nanofibers are grown up in the pores of the template membrane. Next, by using the hollow first nanofibers as the secondary templates, second nanofibers are produced therein. Finally, the template membrane is removed to obtain composite nanofibers. Showing superior performance in weight energy density, current discharge efficiency and irreversible capacity, the composite nanofibers are applied to extensive scopes like thin-film battery, hydrogen storage, molecular sieving, biosensor and catalyst support in addition to applications in lithium batteries.Type: GrantFiled: April 21, 2003Date of Patent: January 29, 2008Assignee: Industrial Technology Research InstituteInventors: Jin-Ming Chen, Chien-Te Hsieh, Hsiu-Wen Huang, Yue-Hao Huang, Hung-Hsiao Lin, Mao-Huang Liu, Shih-Chieh Liao, Han-Chang Shih
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Patent number: 7258807Abstract: A transition metal substituted, amorphous mesoporous silica framework with a high degree of structural order and a narrow pore diameter distribution (±0.15 nm FWHM) was synthesized and used for the templated growth of GaN nanostructures, such as single wall nanotubes, nanopipes and nanowires. The physical properties of the GaN nanostructures (diameter, diameter distribution, electronic characteristic) can be controlled by the template pore diameter and the pore wall chemistry. GaN nanostructures can find applications, for example, in nanoscale electronic devices, such as field-emitters, and in chemical sensors.Type: GrantFiled: December 13, 2004Date of Patent: August 21, 2007Assignee: Yale UniversityInventors: Lisa Pfefferle, Dragos Ciuparu, Jung Han, Gary Haller
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Patent number: 7214361Abstract: Carbon nanotubes are formed by chemical vapor deposition using metal nanoparticles as a growth substrate. Control over the size and properties of the carbon nanotubes is achieved by controlling the size of the metal nanoparticles in the growth substrate. The metal nanoparticles of a controlled size may be formed by a thermal decomposition reaction of a metal salt in a passivating solvent.Type: GrantFiled: November 26, 2002Date of Patent: May 8, 2007Assignee: Honda Giken Kogyo Kabushiki KaishaInventors: Avetik Harutyunyan, Leonid Grigorian, Toshio Tokune
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Patent number: 7169673Abstract: A dielectric film containing HfO2/ZrO2 nanolaminates and a method of fabricating such a dielectric film produce a reliable gate dielectric having an equivalent oxide thickness thinner than attainable using SiO2. A gate dielectric is formed by atomic layer deposition of HfO2 using a HfI4 precursor followed by the formation of ZrO2 on the HfO2 layer.Type: GrantFiled: June 9, 2005Date of Patent: January 30, 2007Assignee: Micron Technology, Inc.Inventors: Kie Y. Ahn, Leonard Forbes