Abstract: An ESD protection circuit including a TFT arranged between a to-be-protected signal line and a discharging line is provided, wherein a length direction of a channel of the TFT is parallel to an extension direction of the to-be-protected signal line. A display panel and a display device are also provided.
Abstract: A display panel including sub-pixels, first and second scan lines, first and second data lines, and first to fourth auxiliary lines is provided. The sub-pixels are arranged into first rows arranged in a first direction and second rows arranged in a second direction. Each third auxiliary line is electrically connected to a second auxiliary line and a first auxiliary line electrically connected to a first scan line. Each fourth auxiliary line is electrically connected to a second scan line and a first scan line. There are at least 2n second rows between each third auxiliary line and the first scan line electrically connected thereto, there are at least 2n+1 second rows between each third auxiliary line and the second scan line electrically connected thereto, and n is a positive integer.
Abstract: The present disclosure discloses an array substrate and a micro total analysis device. The array substrate includes: a substrate, a plurality of pixel regions arranged on the substrate and defined by the intersection of a plurality of data lines and a plurality of gate lines, and a plurality of drive transistors arranged in the plurality of pixel regions respectively; each drive transistor includes a first active layer pattern, a first extension direction of the first active layer pattern forms a first preset angle with a gate line, and in a first preset angle direction, the first active layer pattern spans a pixel region in an inclined manner; and source and drain electrodes of the each drive transistor are coupled with the active layer pattern in the first preset angle direction.
Type:
Grant
Filed:
December 11, 2019
Date of Patent:
November 8, 2022
Assignee:
Beijing BOE Technology Development Co., Ltd.
Abstract: Systems and methods are described for a display panel and a method of manufacturing the display panel. The systems and methods may provide for a substrate having a first surface and a second surface that face each other, a display unit including an organic light-emitting device arranged on the first surface of the substrate; and a thin-film encapsulation layer arranged on the display unit to shield the display unit, wherein an edge of the first surface or an edge of the second surface are inclined with respect to the first surface or the second surface. The inclined surfaces are designed to prevent damage to the display due to fine cracks during the manufacturing process as the display panel is trimmed or cut from a single base member. A display panel having improved strength characteristics may be manufactured, as well.
Type:
Grant
Filed:
January 8, 2020
Date of Patent:
November 8, 2022
Assignee:
SAMSUNG DISPLAY CO., LTD.
Inventors:
Wonje Jo, Youngji Kim, Yiseul Um, Younghoon Lee, Jiwon Jung, Youngseo Choi, Dongwon Han
Abstract: The present application discloses a display panel, a manufacture method and a display apparatus. The display panel includes a first substrate; the first substrate includes a base, a first metal layer, an insulating layer and a second metal layer; the second metal layer includes horizontal zones and oblique zones; each of the oblique zones is inclined from a first height to a second height; the first height is greater than the second height; a thickness of each of the horizontal zones of the second metal layer is greater than a thickness of each of the oblique zones of the second metal layer; and a width of each of the oblique zones of the second metal layer is greater than a width of each of the horizontal zones of the second metal layer.
Abstract: A display panel, a fabrication method thereof, and a display device are provided. The display panel is divided into a display area, a line switching area, and a bending area in a horizontal direction and includes a substrate, a barrier layer, a buffer layer, an active layer, a first gate insulating layer, a first metal layer, and a second gate insulating layer sequentially formed from bottom to top. The display panel further includes a first through hole, a second metal layer, a first organic layer, a second metal layer, an interlayer insulating layer, and a third metal layer, wherein a portion of the third metal layer penetrates the interlayer insulating layer and is electrically connected to the second metal layer.
Type:
Grant
Filed:
December 18, 2019
Date of Patent:
November 8, 2022
Assignee:
WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
Abstract: A flexible display device including a flexible display panel having a substrate and an organic electroluminescent member disposed on the substrate, a window member disposed on the flexible display panel, and a protection member disposed under the flexible display panel, wherein the protection member includes a metal layer disposed under the substrate, a cushion layer disposed under the metal layer, and a planarization layer disposed between the metal layer and the cushion layer.
Abstract: A semiconductor device includes a diffusion barrier structure, a bottom electrode, a top electrode over the bottom electrode, a switching layer and a capping layer. The bottom electrode is over the diffusion barrier structure. The top electrode is over the bottom electrode. The switching layer is between the bottom electrode and the top electrode, and configured to store data. The capping layer is between the top electrode and the switching layer. A thermal conductivity of the diffusion barrier structure is greater than approximately 20 W/mK.
Type:
Grant
Filed:
October 18, 2019
Date of Patent:
October 18, 2022
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Abstract: A method for manufacturing a display substrate, a display substrate and a display device are provided. The method for manufacturing a display substrate includes: forming, on a base substrate, a concave-convex structure extending in a direction identical to an extending direction of a signal transmission line; and forming the signal transmission line on the concave-convex structure.
Abstract: To improve field-effect mobility and reliability of a transistor including an oxide semiconductor film. A semiconductor device includes an oxide semiconductor film, a gate electrode, an insulating film over the gate electrode, the oxide semiconductor film over the insulating film, and a pair of electrodes over the oxide semiconductor film. The oxide semiconductor film includes a first oxide semiconductor film and a second oxide semiconductor film over the first oxide semiconductor film. The first oxide semiconductor film and the second oxide semiconductor film, include the same element. The first oxide semiconductor film includes a region having lower crystallinity than the second oxide semiconductor film.
Type:
Grant
Filed:
November 1, 2019
Date of Patent:
September 20, 2022
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
Abstract: A semiconductor device may be provided, including a first dielectric layer having a first region and a second region laterally adjacent to the first region. The semiconductor device may further include a bottom electrode at least partially arranged within the first region of the first dielectric layer, a memory element arranged over the bottom electrode, a top electrode arranged over the memory element, and a second dielectric layer arranged over at least the first region of the first dielectric layer. The second dielectric layer may surround the memory element and may surround at least a part of the top electrode. The semiconductor device may further include a third dielectric layer arranged over the second region of the first dielectric layer and laterally adjacent to the second dielectric layer, and a conductive interconnect arranged in the third dielectric layer and the second region of the first dielectric layer.
Type:
Grant
Filed:
November 22, 2019
Date of Patent:
September 13, 2022
Assignee:
GLOBALFOUNDRIES Singapore Pte. Ltd.
Inventors:
Hyunwoo Yang, Naganivetha Thiyagarajah, De Wei Shawn Wong, Suk Hee Jang
Abstract: The present invention provides an array substrate and a manufacturing method thereof, an array substrate includes a sub-pixel including a main-region and a sub-region. A gate line is disposed between the main-region and the sub-region, and two adjacent data lines define a pixel boundary. A transparent common electrode line is respectively disposed corresponding to the main-region and the sub-region. Wherein, a projection range of the pixel electrode on the substrate covers a projection range of part of the transparent common electrode line corresponding to a direction of the data line on the substrate.
Type:
Grant
Filed:
November 4, 2019
Date of Patent:
September 13, 2022
Assignee:
SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
Abstract: A resistive memory device including a first electrode and a second electrode facing each other and a variable resistance layer disposed between the first electrode and the second electrode, wherein the variable resistance layer includes cadmium-free quantum dots (Cd-free quantum dots) and at least a portion of the Cd-free quantum dots include a Cd-free quantum dot including a halide anion on a surface of the Cd-free quantum dot, a method of manufacturing the same and an electronic device.
Type:
Grant
Filed:
December 3, 2019
Date of Patent:
September 13, 2022
Assignee:
SAMSUNG ELECTRONICS CO., LTD.
Inventors:
Kwanghee Kim, Heejae Lee, Oul Cho, Tae Hyung Kim, Eun Joo Jang
Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a gate stack over a semiconductor substrate and a cap element over the gate stack. The cap element has an upper portion and a lower portion, and the upper portion is wider than the lower portion. The semiconductor device structure also includes a spacer element over a sidewall of the cap element and a sidewall of the gate stack.
Abstract: The present invention discloses a thin film transistor (TFT) drive backplane and a Micro- light emitting diode (LED) display that by employing a structure of an oxide thin film transistor drive backplane with a high mobility can achieve fulfillment of the need for large size Micro-LED displays. Disposing the rear metal layer under the base substrate with the rear metal layer including a metal wire layer configured to connect with a drive chip and a metal light shielding layer configured to block ambient light reduces a spliced bezel of the display panel in application of large size Micro-LED displays, reduces depositing and patterning steps of the metal light shielding layer during manufacturing the thin film transistors and further reduces process steps of manufacturing a TFT drive backplane.
Abstract: A semiconductor device includes a bottom electrode, a top electrode, a switching layer and a diffusion harrier layer. The top electrode is over the bottom electrode. The switching layer is between the bottom electrode and the top electrode, and configured to store data. The diffusion barrier layer is between the bottom electrode and the switching layer to obstruct diffusion of ions between the switching layer and the bottom electrode.
Type:
Grant
Filed:
March 29, 2018
Date of Patent:
September 6, 2022
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Abstract: Provided is a resistive-switching memory containing a positive electrode, a negative electrode and a resistive switching layer provided between the positive electrode and the negative electrode, the resistance of which is switched by an applied voltage, wherein the resistive switching layer contains a compound of the chemical formula (A?)2An?1BnX3n+1, wherein A? is an ammonium ion having an asymmetric structure and containing a phenyl group, A is a monovalent metal ion and X is a halogen ion, the A? has an asymmetric ion distribution which may be rotated by an applied electric field, and n is a value between 1 and ?.
Abstract: The present invention provides a display panel and a display device. A conductive film layer of the display panel is electrically connected to a gate electrode of a thin film transistor (TFT) through a first via hole, and the conductive film layer at least partially overlaps a source/drain electrode of the TFT to form a first capacitor. A second capacitor is formed in an overlapping region between a source/drain electrode of the TFT and the gate electrode of the TFT. Accordingly, a boost capacitance value of the display panel is increased, and a driving circuit requires less space.
Abstract: The field-effect mobility and reliability of a transistor including an oxide semiconductor film are improved. One embodiment of the present invention is a semiconductor device which includes a gate electrode, an insulating film over the gate electrode, an oxide semiconductor film over the insulating film, and a pair of electrodes over the oxide semiconductor film. The oxide semiconductor film includes a first oxide semiconductor film, a second oxide semiconductor film over the first oxide semiconductor film, and a third oxide semiconductor film over the second oxide semiconductor film. The first oxide semiconductor film, the second oxide semiconductor film, and the third oxide semiconductor film include the same element. The second oxide semiconductor film includes a region having lower crystallinity than one or both of the first oxide semiconductor film and the third oxide semiconductor film.
Type:
Grant
Filed:
February 11, 2020
Date of Patent:
September 6, 2022
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
Abstract: An array substrate and a manufacturing method thereof, and a display device. The array substrate includes: a base substrate, including a first surface and a second surface opposite to each other, and a through-hole penetrating the base substrate from the first surface to the second surface; a data line on the first surface of the base substrate, the data line being at least partially filled in the through-hole; a thin film transistor on the second surface of the base substrate, the thin film transistor including a source electrode and a drain electrode, and the source electrode being electrically connected to the data line.