Abstract: A robust symbol timing recovery circuit for a telephone line modem is provided. The symbol timing recovery circuit comprises a timing estimator and an interpolator. The timing estimator, which performs an operation on input samples and estimates a timing offset of a received symbol, outputs a timing offset estimated for each symbol for a first window interval, and thereafter outputs a timing offset estimated in an immediately previous window interval for the current window interval. The interpolator, which performs interpolation using the input samples, comprises a plurality of shift registers which are serially connected and output the input samples in units of a predetermined plural number of input samples, by sequentially delaying for an input sample 15 period and outputting the input samples. Since the symbol timing recovery circuit is not sensitive to clock instability and employs a stable timing offset estimating method, symbol timing can be recovered stably and reliably.

Abstract: Provided is a circuit for compensating for the declination of balanced impedance elements and a frequency mixer. The compensation circuit compensates for a difference between impedance measured at first and second impedance elements, and comprises first and second impedance circuits. The first impedance circuit transforms a first impedance value into a fine impedance value having 2n steps in response to n lower bits of a control signal having k bits. The second impedance circuit transforms a second impedance value into a coarse impedance value having 2m steps in response to m upper bits of the control signal. The first and second impedance values are measured at the first and second impedance elements, respectively, and k is equal to m plus n. The impedance difference between the impedance elements is linearly regulated.

Abstract: A computer system providing endian information and a method of data transmission thereof are disclosed. The method of data transmission in the computer system of the present invention comprises: reading endian information stored in a base address register of peripheral devices; deciding whether the endian information of the computer system is identical with endian information of the peripheral devices; byte-swapping data of the peripheral devices when the endian information of the computer system is different from the endian information of the peripheral devices, and transmitting the byte-swapped data to a system bus of the computer system; and transmitting the data of the peripheral devices to the system bus when the endian information of the computer system is identical with the endian information of the peripheral devices.

Abstract: Provided is an automatic gain controller for obtaining a high a signal-to-noise ratio (SNR), and for reducing power loss by controlling a gain until the gain reaches a maximum value, and a transmitting apparatus and method for use with a mobile communication terminal having the automatic gain controller. The automatic gain controller causes a variation of a gain at a radio frequency (RF) amplifier with respect to the variation of a control voltage to have a larger gradient than a variation of gain at an intermediate frequency (IF) amplifier with respect to the variation of the control voltage, and causes a total gain to have a decreasing gradient in accordance with the control voltage until the total gain reaches its maximum.

Abstract: An apparatus and method for controlling a supply voltage of a multiple interface card includes a first voltage adjustment unit, a second voltage adjustment unit, an internal circuit, a first voltage controller, and a second voltage controller. The first voltage controller adjusts a first supply voltage to a first internal supply voltage used as an operating voltage of the internal circuit and supplies the first internal supply voltage to the internal circuit. The second voltage adjustment unit adjusts a second supply voltage to a second internal supply voltage used as an operating voltage of the internal circuit and supplies the second internal supply voltage to the internal circuit. The first voltage controller detects the first supply voltage and, according to the first supply voltage, either applies the first supply voltage to the first voltage adjustment unit or blocks the first supply voltage from the first voltage adjustment unit.

Abstract: Disclosed is an apparatus for electrifying spacers and an apparatus for scattering spacers using the same. For the purpose of maintaining a cell gap of a LCD, the spacer is electrified to have a first electrified voltage by a first electrifying pipe having a first curvature, and the spacer is electrified by a second electrifying pipe having a second curvature to have a second electrified voltage level high enough to prevent the spacers from being lumped. Thus, the spacer is not lumped by increasing an electrified voltage thereof, thereby preventing a quality of an image from being deteriorated, the spacer from being lost.

Abstract: The present invention discloses a thin film transistor array substrate, a method for manufacturing the array substrate, and a liquid crystal display. The present invention further discloses a liquid crystal display having a reflective area and a transmissive area, which the image quality can be enhanced with. The present invention also discloses a liquid crystal display that has a liquid crystal layer whose thickness is depends on position.

Abstract: Disclosed is an LCD apparatus having improved display characteristics. A clock generator applies first and second clock signals to a gate driver so as to control a pulse width of a gate driving signal. A discharging transistor connected to first ends of gate lines discharges a present stage before operating a next stage. The gate lines include a first gate driver and a second gate driver for operating the gate lines while the first gate driver is operated in an abnormal state. Accordingly, the LCD apparatus may be operated in high-speed and prevent the gate driving signal from being delayed.

Abstract: In a method of detecting a fault in a class D amplifier, an amplifier output signal is generated based on inverting a pulse width modulation signal corresponding to received audio data. The amplifier output signal is low pass filtered and hysteretically filtered (Schmitt Triggered). The filtered amplifier output signal is sampled (latched) using the pulse width modulation signal as a sampling (latch) clock signal, to generate a first comparison signal. The pulse width modulation signal is sampled (latched) using the filtered amplifier output signal as a sampling (latch) clock signal, to generate a second comparison signal. A fault detection signal for detecting the fault is generated by comparing the first and second comparison signals. Since the first pulse width modulation signal and the filtered amplifier output signal are robustly compared, a fault occurrence may be directly and reliably detected.

Abstract: A liquid crystal display includes: a first substrate; a gate line disposed on the first substrate; a data line intersecting the gate line; a thin film transistor connected to the gate line and the data line; a coupling electrode connected to the thin film transistor; a first sub-pixel electrode connected to the thin film transistor; a second sub-pixel electrode capacitively coupled to the coupling electrode; a second substrate facing the first substrate; a common electrode disposed on the second substrate; and a polarizer disposed on the first substrate or the second substrate and having a polarization axis. The coupling electrode is elongated substantially parallel to the polarization axis and has a first edge substantially parallel to or substantially perpendicular to the polarization axis.

Abstract: An apparatus for drying a substrate using the Marangoni effect is disclosed. The apparatus includes a rotatable supporting portion on which a substrate is placed. A first nozzle for supplying de-ionized water and a second nozzle for supplying isopropyl alcohol vapor are provided on the supporting portion. When the isopropyl alcohol vapor is supplied to the center of the substrate at the initial stage, the amount of alcohol that reaches the substrate is controlled by a controlling portion such that the amount of the second liquid gradually increases.

Abstract: A method of matching dynamic elements includes sequentially selecting first unit elements corresponding to a value of first digital data among M unit elements in a first direction, the M unit elements being for converting sequentially inputted digital data to an analog signal; checking whether a reference unit element is selected; checking a value of a LSB of the first digital data when the reference unit element is selected; sequentially selecting second unit elements corresponding to a value of second digital data inputted next to the first digital data among the M unit elements in a second direction opposite to the first direction when the value of the LSB of the first digital data is a first value; and sequentially selecting the second unit elements in the first direction when the value of the LSB of the first digital data is a second value.

Abstract: Pulse-width modulation (PWM) circuits and methods integrate a feedback signal and an input signal to generate an integral signal, and generate a PWM signal by switching an output node from a first source voltage to a second source voltage based upon comparing the integral signal with a first reference voltage, and switching the output node from the second source voltage to the first source voltage based upon comparing the integral signal with a second reference voltage. A comparator unit compares the integral signal with the first and second reference (threshold) voltages, and a drive circuit for buffering the comparator unit's output signals generates drive signals. A feedback circuit generates the feedback signal based on (e.g., proportional with) the PWM signal. The switching circuit may include a P-type switch (e.g., PMOS transistor) and a N-type switch (e.g., NMOS transistor). Associated class-D audio amplifiers and modulation methods are provided.

Abstract: A phase locked loop (PLL) having an improved phase unlock detection function generates a clock pulse signal at a frequency from a synchronization signal of a cathode ray tube (CRT) monitor and includes a phase frequency detector (PFD), a charge pump, a loop filter, a Voltage Controlled Oscillator (VCO), a divider, a phase unlock detection circuit, a phase lock/unlock detection circuit, and an output circuit. The phase unlock detection circuit detects an initial generation of a phase unlock from the up or down signal, outputs a first detection signal, and outputs an internal control signal according to the up or down signal. The phase lock/unlock detection circuit outputs a second detection signal, in response to the internal control signal and the first detection signal. The output circuit performs a logic operation on the first detection signal and the second detection signal and outputs a third detection signal.

Abstract: A wafer chuck illumination device for illuminating a light source to detect a position of foreign substances polluting a wafer chuck is provided. The device includes a lamp for generating a white light source, and a collimator lens for transforming the white light source into a beam of parallel rays and for directing the beam of parallel rays to a wafer chuck for detecting and cleaning foreign substances on the wafer chuck.

Abstract: Provided are a bi-directional high voltage switching device that includes an N-channel double diffused metal oxide semiconductor field effect transistor (DMOS FET) and a P-channel DMOS FET, each conducting current bi-directionally, and an energy recovery circuit that reduces the amount of energy consumed when charging or discharging a load capacitor by efficiently driving the bi-directional high voltage switching device; where the N-channel symmetric DMOS FET and the P-channel symmetric DMOS FET are connected to each other in parallel; and the energy recovery circuit includes a pull-up device, a pull-down device, an energy recovery capacitor, and a bi-directional high voltage switching device.

Abstract: A semiconductor memory device having a stacked-bank architecture capable of activating the word lines coupled to memory cells selectively with respect to the memory banks is disclosed. The semiconductor memory device includes memory bank groups and a decoder unit. Each of the memory bank groups includes a plurality of memory banks arranged in a stacked-bank architecture. The decoder unit generates a decoded row address signal to individually select one of the memory banks in response to an external address signal under the control of an output enable signal. Accordingly, the semiconductor memory device having a stacked-bank architecture capable of activating the word lines coupled to memory cells selectively with respect to the memory banks has lower power consumption and operates stably against noise.

Abstract: Disclosed is a liquid crystal display capable of high quality image and bright display. Gate signal lines are curved at near switching elements of the liquid crystal display. A pixel area is defined by the gate signal lines and their intersecting data signal lines. Pixel electrodes and common electrodes are disposed along a longitudinal direction of a pixel. A pixel signal and a common signal line is connected to the pixel electrode and the common electrode respectively. A storage capacitor may be formed in the middle of a longitudinal direction of the pixel, or where generally a texture may arise during display. One half of the pixel may be symmetrical with the other half with respect to the storage capacitor. A common signal line may be parallel with the data signal line and be disposed nearer to the data signal line than a pixel signal line. The pixel may be disposed symmetrically with respect to the data signal line therebetween.

Abstract: A global positioning system (GPS) receiver is provided, comprising a converter for converting received GPS signals to in-phase (I) and quadrature-phase (Q) digital signals; a correlator for generating expected codes and correlating the I and Q digital signals with the expected codes to output sampled I values and sampled Q values for a tap; a filter for filtering the sampled I values and sampled Q values to modified I values and modified Q values, and for summing the modified I values and modified Q values to output variation data; a memory for storing the variation data; a domain transformer for performing domain transform on the variation data to output a transformed value; and a comparator for comparing the transformed value to a threshold value for determining the presence of a peak at the tap.

Abstract: A method of biasing a memory cell array during a data writing operation and a semiconductor memory device are provided. The semiconductor memory device includes: a memory cell array including a plurality of memory cells in which a first terminal of a memory cell is connected to a corresponding first line among a plurality of first lines and a second terminal of a memory cell is connected to a corresponding second line among a plurality of second lines; and a bias circuit for biasing a selected second line to a first voltage and non-selected second lines to a second voltage.