Patents Represented by Attorney, Agent or Law Firm Gerald Maliszewski
  • Patent number: 7978701
    Abstract: A method of sending an information package from a first data network to at least one second data network through a communications network, in particular a SDH or SONET network, comprises a first plurality of access points, a second plurality of MPLS switches, a third plurality of paths defined from each of the access points to an Ethernet switch including MPLS switching capabilities via at least one of the MPLS switches, and a fourth plurality of paths defined from the Ethernet switch including MPLS switching capabilities to each of the access points via at least one of the MPLS switches. The method further comprises receiving the information package at a specific access point and adding a header including a MPLS label to the information package. The information package including the header is sent to the Ethernet switch including MPLS switching capabilities via a path of the third plurality.
    Type: Grant
    Filed: January 23, 2009
    Date of Patent: July 12, 2011
    Assignee: Applied Micro Circuits Corporation
    Inventor: Per Flemming Hansen
  • Patent number: 7977967
    Abstract: A method is provided for thermal electric binary logic control. The method accepts an input voltage representing an input logic state. A heat reference is controlled in response to the input voltage. The method supplies an output voltage representing an output logic state, responsive to the heat reference. More explicitly, the heat reference controls the output voltage of a temperature-sensitive voltage divider. For example, the temperature-sensitive voltage divider may be a thermistor voltage divider.
    Type: Grant
    Filed: July 2, 2010
    Date of Patent: July 12, 2011
    Assignee: Applied Micro Circuits Corporation
    Inventor: Joseph Martin Patterson
  • Patent number: 7979773
    Abstract: A system and method are provided for efficiently initializing a redundant array of independent disks (RAID). The method monitors host write operations and uses that information to select the optimal method to perform a parity reconstruction operation. The bins to which data access write operations have not occurred can be initialized using a zeroing process. In one aspect, the method identifies drives in the RAID array capable of receiving a ‘WriteRepeatedly’ command and leverages that capability to eliminate the need for the RAID disk array controller to provide initialization data for all disk array initialization transfers. This reduces the RAID array controller processor and I/O bandwidth required to initialize the array and further reduces the time to initialize a RAID array. In a different aspect, a method is provided for efficiently selecting a host write process for optimal data redundancy and performance in a RAID array.
    Type: Grant
    Filed: March 13, 2007
    Date of Patent: July 12, 2011
    Assignee: Summit Data Systems LLC
    Inventors: Christophe Therene, James R. Schmidt
  • Patent number: 7975133
    Abstract: A system and method are provided for updating a speculative global history prediction record in a microprocessor system using pipelined instruction processing. The method accepts microprocessor instructions with consecutive operations, including a conditional branch operation with an associated first branch address. A speculative global history record (SGHR) of conditional branch resolutions and predictions is accessed and hashed with the first branch address, creating a first hash result. The first hash result is used to index a branch history table (BHT) of previous first branch resolutions. As a result, a first branch prediction is made, and the SGHR is updated with the first branch prediction. A non-speculative global history record (NSGHR) of branch resolutions is updated with the resolution of the first branch operation, and if the first branch prediction is incorrect, the SGHR is corrected using the NSGHR.
    Type: Grant
    Filed: January 29, 2011
    Date of Patent: July 5, 2011
    Assignee: Applied Micro Circuits Corporation
    Inventors: Timothy A. Olson, Terrence Matthew Potter, Jon A. Loschke
  • Patent number: 7970285
    Abstract: A system and method are provided for calibrating temporal skew in a multichannel optical transport network (OTN) transmission device. The method accepts a pair of 2n-phase shift keying (2n-PSK) modulated signals, as well as a pair of 2p-PSK modulated signals. The 2n-PSK and 2p-PSK signals are converted to 2n-PSK and 2p-PSK optical signals, respectively. The 2n-PSK and 2p-PSK optical signals are orthogonally polarized and transmitted. A timing voltage is generated that is responsive to the intensity of the orthogonally polarized signals. The timing voltage is correlated to a reference frame calibration pattern associated with a preamble/header portion of an OTN frame. Then, the timing voltages associated with the Ix, Qx, Iy, and Qy signal paths are compared, and the misalignment between the timing voltages and the reference frame calibration pattern is minimized in response to adjusting time delay modules in the Ix, Qx, Iy, and Qy signal paths.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: June 28, 2011
    Assignee: Applied Micro Circuits Corporation
    Inventors: Keith Conroy, Omer Acikel, Francesco Caggioni
  • Patent number: 7968419
    Abstract: A method is provided for forming a metal/semiconductor/metal (MSM) back-to-back Schottky diode from a silicon (Si) semiconductor. The method deposits a Si semiconductor layer between a bottom electrode and a top electrode, and forms a MSM diode having a threshold voltage, breakdown voltage, and on/off current ratio. The method is able to modify the threshold voltage, breakdown voltage, and on/off current ratio of the MSM diode in response to controlling the Si semiconductor layer thickness. Generally, both the threshold and breakdown voltage are increased in response to increasing the Si thickness. With respect to the on/off current ratio, there is an optimal thickness. The method is able to form an amorphous Si (a-Si) and polycrystalline Si (polySi) semiconductor layer using either chemical vapor deposition (CVD) or DC sputtering. The Si semiconductor can be doped with a Group V donor material, which decreases the threshold voltage and increases the breakdown voltage.
    Type: Grant
    Filed: September 21, 2008
    Date of Patent: June 28, 2011
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Tingkai Li, Sheng Teng Hsu, David R. Evans
  • Patent number: 7965946
    Abstract: A system and method are provided for calibrating skew in a multichannel optical transport network (OTN) transmission device. The method accepts a pair of 2n-phase shift keying (2nPSK) modulated signals via Ix and Qx electrical signal paths, where n>1. Likewise, a pair of 2p-PSK modulated signals are accepted via Iy and Qy electrical signal paths where p>1. The Ix, Qx, Iy, and Qy signals are correlated to a preamble/header portion of an OTN frame. A voltage on the Ix signal path is compared with Qx, and VO12 voltage is generated. A voltage on the Iy signal path is compared with Qy, and VO34 is generated. One of the Ix or Qx voltages is compared with one of Iy or Qy voltages to generate VOxy. Then, the VO voltages are minimized in response to adjusting time delay modules in the Ix, Qx, Iy, and Qy signals paths.
    Type: Grant
    Filed: July 8, 2008
    Date of Patent: June 21, 2011
    Assignee: Applied Micro Circuits Corporation
    Inventors: Keith Conroy, Omer Acikel, Francesco Caggioni
  • Patent number: 7965941
    Abstract: A system and method are provided for controlling time delay in a multichannel optical transport network (OTN) transmission device using time domain reflectometry (TDR) measurements. The method accepts a pair of 2n-phase shift keying (2n-PSK) modulated signals via Ix and Qx electrical signal paths, where n>1. Likewise, a pair of 2p-PSK modulated signals are accepted via Iy and Qy electrical signal paths where p>1. Using TDR modules, signal reflections are measured from an output port for each signal path. The method minimizes time delay differences in the signal reflections for the Ix, Qx, Iy, and Qy signals paths by using the signal reflection measurements to adjust time delay modules in each signal path.
    Type: Grant
    Filed: September 5, 2008
    Date of Patent: June 21, 2011
    Assignee: Applied Micro Circuits Corporation
    Inventors: Keith Conroy, Omer Acikel, Francesco Caggioni
  • Patent number: 7962043
    Abstract: A system and method are provided for controlling time delay in a multichannel optical transport network transmission device. The method accepts a pair of 2n-phase shift keying (2nPSK) modulated signals via Ix and Qx electrical signal paths, where n>1, and a pair of 2p-PSK modulated signals via Iy and Qy electrical signal paths where p>1. A voltage V1 on the Ix signal path is compared with a voltage V2 on the Qx signal path, and a VOx voltage in generated, which is minimized by adjusting time delay modules in the Ix and Qx signals paths. Likewise, a voltage V3 (Iy) is compared with a voltage V4 (Qy), and a VOy voltage is generated and minimized. Subsequent to minimizing VOx and VOy, the sum of V1 and V2 (V12) is compared with the sum of V3 and V4 (V34), and a VOxy voltage is generated and minimized.
    Type: Grant
    Filed: June 20, 2008
    Date of Patent: June 14, 2011
    Assignee: Applied Micro Circuits Corporation
    Inventors: Keith Conroy, Omer Acikel, Francesco Caggioni
  • Patent number: 7956649
    Abstract: A window sampling system and method are provided for comparing a signal with an unknown frequency to a reference clock. A pattern modulator accepts a compClk signal and supplies a test window with a period equal to n compClk periods, where n is an integer greater than 1. A pattern detector accepts the test window and a reference clock, and contrasts the test window with the reference clock. In response to failing to fit n reference clock periods inside the test window, the pattern detector supplies a frequency pattern detector output signal (fpdOut) indicating that the frequency of the compClk is greater than the reference clock frequency.
    Type: Grant
    Filed: July 26, 2010
    Date of Patent: June 7, 2011
    Assignee: Applied Micro Circuits Corporation
    Inventors: Simon Pang, Viet Do
  • Patent number: 7958535
    Abstract: A uniform resource indicator (URI) pointer system and method are provided for retrieving MPEG-4 data pointers in an MPEG-2 TS. The method comprises: receiving an MPEG-2 TS; locating a URI in the TS; in response to the URI, accessing an address; in response to accessing the address, retrieving MPEG-4 resources; and, decoding the MPEG-4 resources. The URI pointer can be a local cache address, a Web protocol identifier (such as http), and/or a local identifier (lid). In some aspects, the MPEG-2 TS may include MPEG-4 resources organized in an Object Carousal (OC) transport protocol. Then, lid URIs provide a binding name and access scheme to the objects in the OC. For example, a lid URI may be embedded in an Initial Object Descriptor (IOD) to locate resources in the OC such as a binary format for scenes (BIFS) scene description stream and/or an object descriptor stream.
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: June 7, 2011
    Assignee: Sharp Laboratories of America, Inc.
    Inventor: Kai-Chieh Liang
  • Patent number: 7957331
    Abstract: A system and method are provided for controlling bandwidth allocation in a wireless local area network (wLAN). The method comprises: expressing device bandwidth allocations in terms of a time base; in response to expressing the bandwidth allocation in terms of a time base, monitoring network communications; and, measuring the allocated bandwidths. The method may further comprise: establishing polling schedules in response to expressing the bandwidth allocation in terms of a time base; and, de-energizing devices in response to the polling schedules. Expressing device bandwidth allocations in terms of a time base includes establishing: an inter-transmission opportunity (TXOP) interval; and, a TXOP jitter. These fields are supplied in the IEEE 802.11e transmit specification (TSPEC).
    Type: Grant
    Filed: July 9, 2008
    Date of Patent: June 7, 2011
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Srinivas Kandala, John Kowalski, Yoshihiro Ohtani, Shugong Xu
  • Patent number: 7958264
    Abstract: A URI pointer system and method are provided for the referencing of MPEG-4 data resources carried in an American ATSC MPEG-2 TSFS. The method comprises: receiving an MPEG-2 TS, with a packetized ATSC TSFS; locating a URI in the TS; in response to the URI, accessing an address such as a lid or an http address; retrieving MPEG-4 resources from the ATSC TSFS; and, decoding the MPEG-4 resources. Accessed lid URIs provide a binding name and access scheme to the objects in the ATSC TSFS, as a lid URI embedded in an Initial Object Descriptor (IOD) is used to locate resources in the TSFS such as a BIFS scene description stream and/or an object descriptor stream. Receiving an MPEG-2 TS, with a packetized ATSC TSFS, means that MPEG-4 resources are formed in a hierarchical directory structure of BIOP objects including a DSM::ServiceGateway, a DSM::Directory, and a DSM::File.
    Type: Grant
    Filed: July 29, 2008
    Date of Patent: June 7, 2011
    Assignee: Sharp Laboratories of America, Inc.
    Inventor: Kai-Chieh Liang
  • Patent number: 7944949
    Abstract: A system and method are presented for providing packet and time division multiplex (TDM) services in a data communication interface. The method accepts packets at a first rate over a packet interface, and transfers time-sensitive data in the packets as packet data units (PDUs) having a smaller number of bits than a packet and a second rate, faster than the first rate. The method transforms the PDUs into frames in a first TDM protocol. Typically, the PDUs are transformed into units having a smaller number of bits than the PDU and a third rate, faster than the second rate. Then, the TDM frames are transmitted over a line interface.
    Type: Grant
    Filed: October 16, 2007
    Date of Patent: May 17, 2011
    Assignee: Applied Micro Circuits Corporation
    Inventors: Ravi Subrahmanyan, Xingen James Ren, Dimitrios Giannakopoulos
  • Patent number: 7940806
    Abstract: A system and method are provided for mapping information into Synchronous Payload Envelopes (SPEs). The method provides information bytes at a nominal system clock-based data rate, which is about equal to a system clock, but may be adjusted. An external clock has a rate approximately equal to the system clock rate. The method generates SPEs with identically-positioned information bytes, regardless of differences between the system and external clock rates. The SPEs are combined with Transport Overhead (TOH) and transmitted as a message frame at the external clock rate. SPEs are generated maintaining the positions of the information bytes within each SPE, without pointer adjustments, despite differences between the system and external clock rates. Expressed another way, message frames are generated with payload and TOH sections, and the information bytes are located exclusively in the payload sections. As a result, constant pointer values (e.g., H1/H2 or V1/V2) are maintained for all the SPEs.
    Type: Grant
    Filed: September 23, 2010
    Date of Patent: May 10, 2011
    Assignee: Applied Micro Circuits Corporation
    Inventors: Ravi Subrahmanyan, Glen W. Miller, Xingen (James) Ren, Dimitrios Giannakopoulos
  • Patent number: 7935599
    Abstract: A method is provided for removing reentrant stringers in the fabrication of a nanowire transistor (NWT). The method provides a cylindrical nanostructure with an outside surface axis overlying a substrate surface. The nanostructure includes an insulated semiconductor core. A conductive film is conformally deposited overlying the nanostructure, to function as a gate strap or a combination gate and gate strap. A hard mask insulator is deposited overlying the conductive film and selected regions of the hard mask are anisotropically plasma etched. As a result, a conductive film gate electrode is formed substantially surrounding a cylindrical section of nanostructure. Inadvertently, conductive film reentrant stringers may be formed adjacent the nanostructure outside surface axis, made from the conductive film. The method etches, and so removes the conductive film reentrant stringers.
    Type: Grant
    Filed: April 4, 2007
    Date of Patent: May 3, 2011
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Mark A. Crowder, Yutaka Takafuji
  • Patent number: 7936853
    Abstract: A system and method are provided for detecting a false clock frequency lock in a clock and data recovery (CDR) device. The method accepts a digital raw data signal at a first rate and counts edge transitions in the raw data signal, creating a raw count. A clock signal is also accepted at a second rate. The clock signal is a timing reference recovered from the raw data signal. The raw data signal is sampled at a rate responsive to the clock signal, generating a sampled signal. Edge transitions are counted in the sampled signal, creating a sampled count. Then, the raw count is compared to the sampled count, to determine if the first rate is equal to the second rate. The method is used to determine if the second rate is less than the first rate—to detect if the clock signal is incorrectly locked to the first rate.
    Type: Grant
    Filed: November 9, 2007
    Date of Patent: May 3, 2011
    Assignee: Applied Micro Circuits Corporation
    Inventors: Simon Pang, Viet Linh Do, Mehmet Mustafa Eker
  • Patent number: 7932119
    Abstract: A method is provided for detecting laser optical paths in integrated circuit (IC) packages. The method provides an IC die encapsulated as a package in a compound of glass spheres and epoxy. Power is supplied to the IC. The IC is scanned with a laser. Typically, a laser wavelength is used that is minimally absorbed by the glass spheres in the epoxy compound of the IC package, and changes in current to the IC are detected. A detected current change is cross-referenced against a scanned IC package surface region. This process identifies an optical pathway underlying the scanned IC package surface region. In some aspects, this process leads to the identification of a glass sphere-collecting package structure underlying the optical pathway. Examples of a glass sphere-collecting structure might include an inner lead wire, lead frame edge, or die edge.
    Type: Grant
    Filed: June 25, 2008
    Date of Patent: April 26, 2011
    Assignee: Applied Micro Circuits Corporation
    Inventor: Joseph Martin Patterson
  • Patent number: 7931849
    Abstract: A method is provided for laser optically marking integrated circuit (IC) packages in a non-destructive manner. The method provides an IC die encapsulated as a package in a compound of glass spheres and epoxy. An acute angle is defined between a laser optical path and an IC package planar surface. The IC package surface is scanned with a laser, and in response to ablating the IC package surface, a legible mark on the planar surface.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: April 26, 2011
    Assignee: Applied Micro Circuits Corporation
    Inventor: Joseph Martin Patterson
  • Patent number: 7927909
    Abstract: A germanium (Ge) photodiode array on a glass substrate is provided with a corresponding fabrication method. A Ge substrate is provided that is either not doped or lightly doped with a first dopant. The first dopant can be either an n or p type dopant. A first surface of the Ge substrate is moderately doped with the first dopant and bonded to a glass substrate top surface. Then, a first region of a Ge substrate second surface is heavily doped with the first dopant. A second region of the Ge substrate second surface is heavily doped with a second dopant, having the opposite electron affinity than the first dopant, forming a pn junction. An interlevel dielectric (ILD) layer is formed overlying the Ge substrate second surface and contact holes are etched in the ILD layer overlying the first and second regions of the Ge substrate second surface. The contact holes are filled with metal and metal pads are formed overlying the contact holes.
    Type: Grant
    Filed: May 1, 2009
    Date of Patent: April 19, 2011
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Jong-Jan Lee, Steven R. Droes, John W. Hartzell, Jer-Shen Maa