Patents Represented by Attorney, Agent or Law Firm James W. Huffman
  • Patent number: 6405306
    Abstract: An apparatus and method for bi-directional format conversion and transfer of data between integer and floating point registers is provided. A floating point register is configured to store floating point data, and integer data, in a variety of numerical formats. Data is moved in and out of the floating point register as integer data, and is converted into floating point format as needed. Separate processor instructions are provided for format conversion and data transfer to allow conversion and transfer operations to be separated.
    Type: Grant
    Filed: May 25, 2001
    Date of Patent: June 11, 2002
    Assignee: IP First LLC
    Inventors: Timothy A. Elliott, G. Glenn Henry
  • Patent number: 6398456
    Abstract: A deck drain apparatus is provided that allows builders to inexpensively configure deck drainage systems from standard AASHTO M180 highway guardrail. The apparatus includes a number of deck drain sections, butted together to form a drain channel. Each of the drain sections consists of a pan section and an inverted W-beam section. The pan section has a longitudinally elongated and flat conducting surface and two perforated sides. The two perforated sides project upwardly along opposite lateral edges of the conducting surface. The inverted W-beam section has a first perforated wall, a first upper surface, a lower surface, a second upper surface, and a second perforated wall. The perforated walls are longitudinally elongated and formed along opposite lateral edges of the inverted W-beam section. The first upper surface is formed between the first perforated wall and the lower surface. The second upper surface is formed between the lower surface and the second perforated wall.
    Type: Grant
    Filed: August 23, 2000
    Date of Patent: June 4, 2002
    Inventors: John P. Williams, Dean C. Alberson, D. Lance Bullard, Jr., Christopher J. Karpathy
  • Patent number: 6393500
    Abstract: An apparatus is presented for improving the efficiency of data transactions over a computer system data bus. Bus efficiency is improved by providing a bus master with information to adjust the length and width of burst transactions over the bus to/from target devices. If a particular target device is not capable of transacting a full-length, full-width burst over the bus, then the bus master configures a burst to exploit the bursting capabilities of that particular target device. The bus master apparatus includes slave configuration logic that is configured to store a burst transaction capability corresponding to each slave device connected to the bus. The bus master apparatus also has transaction control logic. The transaction control logic is coupled to the slave configuration logic and uses the information to vary burst width and length for a transaction to a specific slave device according to the slave's burst transaction capability.
    Type: Grant
    Filed: August 12, 1999
    Date of Patent: May 21, 2002
    Assignee: MIPS Technologies, Inc.
    Inventor: Radhika Thekkath
  • Patent number: 6385716
    Abstract: An apparatus and method for tracking coherence between distinct floating point and MMX register files in a microprocessor is provided. The apparatus keeps track of the last time a floating point or MMX instruction was translated and what the instruction type of that previous instruction was by storing the previous instruction type in a register. When the current instruction is translated, the translator compares the current instruction type with the previous instruction type stored in the register to determine if they are different, i.e., if an instruction boundary (a change from MMX to floating point instruction or vice versa) was encountered. If so, the translator generates a signal to indicate that the two register files may be incoherent and need to be made consistent again.
    Type: Grant
    Filed: July 9, 1999
    Date of Patent: May 7, 2002
    Assignee: IP-First, L.L.C.
    Inventors: G. Glenn Henry, Albert J. Loper, Jr.
  • Patent number: 6370661
    Abstract: An apparatus and method are provided for testing memory circuits in a microprocessor. The apparatus includes test management logic and test execution logic located within the microprocessor. The test management logic has a non-specific test program stored therein, and it accepts test parameters provided by an external test controller. The test parameters are applied to the non-specific test program to produce a specific test program. The test execution logic executes the specific test program to test the memory circuits within the microprocessor at the internal speed of the microprocessor.
    Type: Grant
    Filed: April 26, 1999
    Date of Patent: April 9, 2002
    Assignee: IP-First, LLC
    Inventor: Daniel G. Miner
  • Patent number: 6364666
    Abstract: A method for adaptively training a subject, using auditory processing of phonemes within command sentences, to improve the subject's listening comprehension, grammatical parsing, and serial memory is provided. The method utilizes a number of training installments, each designed for testing a particular aspect of the subject's language skills, all tied together by a common story. More specifically, installments are provided that narrate a story, test the subject's listening comprehension to the narrated story, test the subject's ability to grammatically parse increasingly difficult sentence structures, and test the subject's ability to select and manipulate graphical objects in response to auditory commands. Speech processing is used for the narration, as well as for commands within each test to allow the subject to more easily distinguish between similar sounding phonemes.
    Type: Grant
    Filed: June 30, 1998
    Date of Patent: April 2, 2002
    Assignee: Scientific Learnîng Corp.
    Inventors: William M. Jenkins, Michael M. Merzenich, Steven L. Miller, Bret E. Peterson, Paula Tallal
  • Patent number: 6358056
    Abstract: A method for adaptively training a human subject to process, and to distinguish between, similar acoustic events that are common in spoken language is provided. The method utilizes sequences of up/down frequency sweeps, of varying frequency and duration, and having varying inter stimulus intervals (ISI) between the frequency sweeps. A sequence is presented to the subject for order identification. The subject must listen to the up/down order of a sequence, and signal identification of the up/down order according to what s/he heard. Signal identification is provided utilizing a computer display, a mouse, and graphical buttons corresponding to the up/down frequency sweeps. Correct order identification causes the process to adaptively reduce the ISI separating the frequency sweeps, to reduce the duration of the frequency sweeps, to alter the frequency of the frequency sweeps, and to increase the number of frequency sweeps within a sequence.
    Type: Grant
    Filed: June 21, 2000
    Date of Patent: March 19, 2002
    Assignee: Scientific Learning Corporation
    Inventors: William M. Jenkins, Michael M. Merzenich, Steven L. Miller, Bret E. Peterson, Paula Tallal
  • Patent number: 6349383
    Abstract: An apparatus and method are provided for combining multiple instructions prescribing accesses to a microprocessor stack into a single micro instruction. The apparatus includes a translator and access alignment logic. The translator receives a first stack access instruction and a second stack access instruction from an instruction queue, and decodes them into an associated micro instruction directing the microprocessor to accomplish both accesses prescribed by the stack access instructions during a combined access, wherein the combined access is achieved in a single instruction cycle. The access alignment logic is coupled to the translator and indicates alignment of two data entities within a cache for the combined access. The two stack access instructions are not combined when the access alignment logic indicates that the combination of the data entities is misaligned within the cache.
    Type: Grant
    Filed: September 10, 1998
    Date of Patent: February 19, 2002
    Assignee: IP-First, L.L.C.
    Inventors: Gerard M. Col, G. Glenn Henry, Arturo Martin-de-Nicolas
  • Patent number: 6343359
    Abstract: An apparatus is presented for expediting the execution of dependent micro instructions in a pipeline microprocessor having design characteristics—complexity, power, and timing—that are not significantly impacted by the number of stages in the microprocessor's pipeline. In contrast to conventional result distribution schemes where an intermediate result is distributed to multiple pipeline stages, the present invention provides a cache for storage of multiple intermediate results. The cache is accessed by a dependent micro instruction to retrieve required operands. The apparatus includes a result forwarding cache, result update logic, and operand configuration logic. The result forwarding cache stores the intermediate results. The result update logic receives the intermediate results as they are generated and enters the intermediate results into the result forwarding cache.
    Type: Grant
    Filed: May 18, 1999
    Date of Patent: January 29, 2002
    Assignee: IP-First, L.L.C.
    Inventors: Gerard M. Col, G. Glenn Henry
  • Patent number: 6339823
    Abstract: A dual register file MMX-type architecture comprises monitoring logic for identifying which registers in a register file have been written to. The monitoring logic is coupled to write-enable logic associated with each register. Detection logic indicates the occurrence of an instruction boundary event and asserts a signal indicating the possibility of data incoherence between the register files. Control logic coupled to the register files cause a transfer of data between the two register files in response to the asserted signal. The monitoring logic acts in conjunction with the write-enable logic to disable write operations to the receiving registers when the corresponding transferring registers have not been written to.
    Type: Grant
    Filed: July 20, 1999
    Date of Patent: January 15, 2002
    Assignee: IP-First, L.L.C.
    Inventor: Albert J. Loper, Jr.
  • Patent number: 6338136
    Abstract: An apparatus and method are provided for executing a compare-and-jump operation in a pipeline microprocessor. Typically, the compare-and-jump operation is specified by two micro instructions. The first micro instruction, an ALU micro instruction, directs the microprocessor to perform an ALU operation, resulting in update of a flags register. The second micro instruction, a conditional jump micro instruction, directs the microprocessor to examine the flags register and to branch program control to a target address if a prescribed condition is met. The apparatus has a jump combiner that detects the ALU micro instruction and the conditional jump micro instruction in a micro instruction queue. The jump combiner indicates the prescribed condition for the conditional branch in a field of the ALU micro instruction, and then deletes the conditional jump micro instruction from the queue. The apparatus also has execution logic that performs the ALU operation, generates the result, and updates the flags register.
    Type: Grant
    Filed: May 18, 1999
    Date of Patent: January 8, 2002
    Assignee: IP-First, LLC
    Inventors: Gerard M. Col, Rodney E. Hooker
  • Patent number: 6334777
    Abstract: A method for adaptively training a human subject to process, and to distinguish between, similar acoustic events that are common in spoken language is provided. The method utilizes sequences of up/down frequency sweeps, of varying frequency and duration, and having varying inter stimulus intervals (ISI) between the frequency sweeps. A sequence is presented to the subject for order identification. The subject must listen to the up/down order of a sequence, and signal identification of the up/down order according to what s/he heard. Signal identification is provided utilizing a computer display, a mouse, and graphical buttons corresponding to the up/down frequency sweeps. Correct order identification causes the process to adaptively reduce the ISI separating the frequency sweeps, to reduce the duration of the frequency sweeps, to alter the frequency of the frequency sweeps, and to increase the number of frequency sweeps within a sequence.
    Type: Grant
    Filed: June 24, 2000
    Date of Patent: January 1, 2002
    Assignee: Scientific Learning Corporation
    Inventors: William M. Jenkins, Michael M. Merzenich, Steven L. Miller, Bret E. Peterson, Paula Tallal
  • Patent number: 6334776
    Abstract: An apparatus and method for training of auditory and graphical discrimination in humans is provided. The method and apparatus provides a number of stimulus sets, each stimulus set having a target phoneme, and associated grapheme, and a number of distractor phonemes, and associated graphemes. Upon initiation of a trial, a target phoneme is presented to a subject. A stimulus stream is then prepared that consists of a random sequence of distractor phonemes. Located within the sequence of distractor phonemes is the target phoneme. The stimulus sequence is presented to the subject for identification of the target phoneme within the sequence. Speech processing is used to provide multiple levels of emphasis for enhancing a subject's ability to discriminate between similarly sounding phonemes. The processing is applied to the presentation of the target phoneme and the stimulus stream.
    Type: Grant
    Filed: June 27, 2000
    Date of Patent: January 1, 2002
    Assignee: Scientific Learning Corporation
    Inventors: William M. Jenkins, Michael M. Merzenich, Steven L. Miller, Bret E. Peterson, Paula Tallal
  • Patent number: 6331115
    Abstract: A method for training of auditory and graphical discrimination in humans, and a human's short term memory, is provided within an animated game environment. The method provides a number of stimulus sets, each stimulus set having similar sounding phonemes associated with graphemes. Upon initiation of a trial, a grid of tiles is presented to a subject. The subject selects the tiles, one at a time. As the tiles are selected, an associated phoneme is presented to the subject. The subject clears away tiles by pairing them with identical tiles. When all the tiles in a trial are cleared, the subject is either promoted or demoted in skill level. Promotion/demotion varies the number of tiles presented, the phonemes used within each trial, and the amount of audio processing that is applied to the phonemes.
    Type: Grant
    Filed: June 30, 1998
    Date of Patent: December 18, 2001
    Assignee: Scientific Learning Corp.
    Inventors: William M. Jenkins, Michael M. Merzenich, Steven L. Miller, Bret E. Peterson, Paula Tallal
  • Patent number: 6328569
    Abstract: A method for training of auditory and graphical discrimination in humans is provided within an animated game environment. The method provides a number of stimulus sets, each stimulus set having a target phoneme and a plurality of associated foils (similar sounding phonemes). Upon initiation of a trial, a target phoneme is presented to a subject. Subsequently, the target phoneme is presented to the subject, along with one of the associated foils, in randomized order. As the target phoneme and associated foil is presented, a graphical animation associates the target and foil each with its own graphical image. The subject then designates identification of the target phoneme by selecting its associated image. Speech processing is used to provide multiple levels of emphasis for enhancing the subject's ability to discriminate between the target phoneme and the foils.
    Type: Grant
    Filed: June 26, 1998
    Date of Patent: December 11, 2001
    Assignee: Scientific Learning Corp.
    Inventors: William M. Jenkins, Michael M. Merzenich, Steven L. Miller, Bret E. Peterson, Paula Tallal
  • Patent number: 6330657
    Abstract: An apparatus and method are presented for increasing the throughput within a single-channel of a pipeline microprocessor. Back-to-back pairs of micro instructions are evaluated to determine if they can be combined for execution in parallel. If so, then they are combined and issued for concurrent execution. The apparatus includes a micro instruction queue that buffers and orders micro instructions for sequential execution by the pipeline microprocessor. Within the micro instruction queue, a second micro instruction is ordered to execute immediately following execution of a first micro instruction. Pairing logic is coupled to the micro instruction queue. The pairing logic combines the first and second micro instructions so that the first and second micro instructions are executed in parallel by the pipeline microprocessor.
    Type: Grant
    Filed: May 18, 1999
    Date of Patent: December 11, 2001
    Assignee: IP-First, L.L.C.
    Inventors: Gerard M. Col, G. Glenn Henry
  • Patent number: 6314514
    Abstract: An apparatus and method for correcting a call/return stack internal to a microprocessor is provided. In the case of a call, the microprocessor pushes the return address onto the internal call/return stack and in the case of a return, the microprocessor pops the return address from the internal call/return stack into the instruction register. However, prior to speculative execution of the call or return, the correction apparatus stores correction information to enable correction of the internal call/return stack. If the conditional branch instruction was mispredicted, the correction apparatus corrects the internal call/return stack based on the correction information previously stored. The correction information is stored in stack memories so that corrections can be made in the reverse order of which the incorrect modifications to the internal call/return stack were made.
    Type: Grant
    Filed: March 18, 1999
    Date of Patent: November 6, 2001
    Assignee: IP-First, LLC
    Inventor: Thomas C. McDonald
  • Patent number: 6290504
    Abstract: An apparatus and method on a computing device for training of auditory and graphical discrimination in humans is provided. The method and apparatus provides a number of stimulus sets, each stimulus set having a number of different phonemes. Speech processing is used to provide multiple levels of emphasis and or stretching for enhancing a subject's ability to discriminate between similarly sounding phonemes. The processing is applied to phonemes and presented to the human as a trial. As a subject correctly identifies phonemes in the stimulus sets, the amount of processing applied to the phonemes is reduced, ultimately to the level of normal speech. A performance feedback mechanism is provided to allow the human to obtain a summary of his/her success over the stimulus sets, at the different processing levels. More detailed feedback is also provided indicating specific processing levels achieved for each of the stimulus sets.
    Type: Grant
    Filed: October 8, 1999
    Date of Patent: September 18, 2001
    Assignee: Scientific Learning Corp.
    Inventors: Angela Jane Benitz, Elizabeth H. Budra, William M. Jenkins, John J. Montgomery
  • Patent number: 6289310
    Abstract: An apparatus and method for screening an individual's ability to process acoustic events is provided. The invention provides sequences (or trials) of acoustically processed target and distractor phonemes to a subject for identification. The acoustic processing includes amplitude emphasis of selected frequency envelopes, stretching (in the time domain) of selected portions of phonemes, and phase adjustment of selection portions of phonemes relative to a base frequency. After a number of trials, the method of the present invention develops a profile for an individual that indicates whether the individual's ability to process acoustic events is within a normal range, and if not, what processing can provide the individual with optimal hearing. The individual's profile can then be used by a listening or processing device to particularly emphasize, stretch, or otherwise manipulate an audio stream to provide the individual with an optimal chance of distinguishing between similar acoustic events.
    Type: Grant
    Filed: October 7, 1998
    Date of Patent: September 11, 2001
    Assignee: Scientific Learning Corp.
    Inventors: Steven L. Miller, Bret E. Peterson, Athanassios Protopapas
  • Patent number: 6261101
    Abstract: An apparatus and method for training the cognitive and memory systems in a subject is provided. The apparatus and method incorporates a number of different games to be played by the subject. The games artificially process selected portions of language elements, called phonemes, so they will be more easily distinguished by the subject, and gradually improves the subject's neurological processing and memory of the elements through repetitive stimulation. The programs continually monitor a subject's ability to distinguish the processed language elements, and adaptively configures the programs to challenge and reward the subject by altering the degree of processing. That is, the subject advances through a number of different processing or skill levels as their ability to distinguish between language elements improves. The subject's progress through the processing levels is recorded to allow an adaptive timing mechanism to optimize game play time for each of the games.
    Type: Grant
    Filed: September 21, 1999
    Date of Patent: July 17, 2001
    Assignee: Scientific Learning Corp.
    Inventors: Angela Jane Benitz, William M. Jenkins