Patents Represented by Attorney Rabin & Berdo, P.C.
  • Patent number: 6968525
    Abstract: An implementing method for buffering devices is provided, so as to dispose the buffering devices on a chip. The chip includes a signal source root and the number X of output bonding pads, in which the number X is a positive integer. The implementing method of the present invention includes (a) implementing a buffering device for the Nth layer at a location close to the middle place between two output bonding pads, and electrically connecting each one of the output bonding pads to the corresponding one of the buffering devices for the Nth layer, respectively. (b) A buffering device for the N+1th layer is implemented at a location close to the middle place between two buffering devices for the Nth layer, and each one of the buffering devices for the Nth layer is electrically connected to the corresponding one of the buffering devices for the N+1th layer, respectively. Then, the number of the buffering devices for the N+1th layer is judged whether or not to be 1.
    Type: Grant
    Filed: July 6, 2004
    Date of Patent: November 22, 2005
    Assignee: VIA Technologies, Inc.
    Inventors: Yung-Chung Chang, You-Ming Chiu
  • Patent number: 6964311
    Abstract: The invention comprises twin double-acting electrical machinery assembly, each being of interactive rotational type, and such that the interactive rotational assembly on the non-outputting side of either double-acting electrical machinery assembly gets coupled to its counterpart interactively by slidably applied damping effect or alternatively by solid coupling technology.
    Type: Grant
    Filed: April 7, 2003
    Date of Patent: November 15, 2005
    Inventor: Tai-Her Yang
  • Patent number: 6965257
    Abstract: A level discrimination circuit includes two offset compensation circuits. Each offset compensation circuit receives a differential pair of input signals, detects their peak values, and adds the peak value of each input signal to the other input signal, thereby generating an offset-compensated differential pair of output signals. The output signals of the first offset compensation circuit are used directly as the input signals of the second offset compensation circuit. The output signals of the second offset compensation circuit therefore have the correct duty cycle, and can be correctly discriminated by a comparator, even if the input signals to the first offset compensation circuit are burst signals in which each burst includes a large direct-current bias. This level discrimination circuit is suitable for receiving optical signals transmitted in bursts.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: November 15, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Takayuki Tanaka
  • Patent number: 6965504
    Abstract: An ESD protection apparatus for a high-voltage input pad comprises a modulator connected between the input pad and a snapback device with first and second guard rings surrounding the modulator, third guard ring surrounding the snapback device, and first and second guard ring control circuits to control the guard rings such that the protection apparatus has higher triggering and holding voltages under normal operation and lower triggering and holding voltages under ESD event.
    Type: Grant
    Filed: November 26, 2002
    Date of Patent: November 15, 2005
    Assignee: Macronix International Co., Ltd.
    Inventors: Meng-Huang Liu, Chun-Hsiang Lai, Shin Su, Tao-Cheng Lu
  • Patent number: 6965166
    Abstract: A semiconductor device including a first semiconductor chip, a second semiconductor chip bonded to the first semiconductor chip in a stacked relation, and a registration structure which causes the first and second semiconductor chips to be positioned with respect to each other by depression-projection engagement therebetween. The registration structure includes, for example, a registration recess provided on a surface of the first semiconductor chip, and a registration projection provided on a surface of the second semiconductor chip for engagement with the registration recess. The registration projection may be a spherical member provided on the surface of the second semiconductor chip.
    Type: Grant
    Filed: February 27, 2003
    Date of Patent: November 15, 2005
    Assignee: Rohm Co., Ltd.
    Inventors: Junichi Hikita, Yoshikazu Nakagawa, Koji Yamamoto
  • Patent number: 6963902
    Abstract: A computer system includes a computer, operatively connected to a network, and having at least one memory with a plurality of messages and a message agent stored therein. The message agent generates a time score for each message based on how long visitors interact with the message. The message agent also generates a skip score for each message based on whether visitors skip the message. In response to a request to view one or more messages, the message agent creates a filtered set of messages by using a minimum time score and/or a maximum skip score to omit, from the requested messages, any messages having time scores and/or skip scores less or greater than the minimum time score and/or maximum skip score, respectively. The message agent then sends the filtered set of messages to the visitor for viewing. A visitor may set a minimum time score and/or maximum skip score according to preference.
    Type: Grant
    Filed: July 18, 2001
    Date of Patent: November 8, 2005
    Assignee: International Business Machines Corporation
    Inventors: Cary Lee Bates, John Matthew Santosuosso
  • Patent number: 6963229
    Abstract: An apparatus for indicating clock skew within integrated circuits (ICs) of a system. There are first and second IC chips operating on respective clocks in the system. According to the invention, the first IC chip operating on a first clock is configured to provide the first clock as output. The second IC chip operating on a second clock has a detection circuit to receive as input the first and the second clocks and to generate a compare signal as output, where the width of the compare signal is proportional to the amount of skew between the input clocks. The second IC chip also includes a sampling circuit coupled to receive the compare signal. With the sampling circuit, an output signal indicative of skew existing between the first and the second clocks can be asserted according to the compare signal.
    Type: Grant
    Filed: September 22, 2003
    Date of Patent: November 8, 2005
    Assignee: Via Technologies, Inc.
    Inventor: I-Ming Lin
  • Patent number: 6962332
    Abstract: A media conveying mechanism located in a media data recorder for conveying media mainly includes a driving motor to provide driving power needed. A first clutch to control the operation of a pickup roller. A second clutch to control rotation direction of an intermediate roller, a sensor to detect the conveying process of the media and control the operation of the second clutch. By deploying the two clutches, conveying quantity of the media in a unit time period can be effectively improved.
    Type: Grant
    Filed: November 19, 2003
    Date of Patent: November 8, 2005
    Assignee: Lite-On Technology Corporation
    Inventor: Yu-Jen Su
  • Patent number: 6963039
    Abstract: A waterproof button knob includes an elastic button seat with a housing trough mating with a button port of a case. The button seat isolates the interior and the exterior of the case to achieve waterproofing. The housing trough has a plurality of apertures on the bottom. The housing trough holds a button cap that has a plurality of button stems extended downwards to pass through the apertures and form a tight coupling. The button stems may be moved to hit switches located in the case.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: November 8, 2005
    Assignee: Inventec Multimedia & Telecom Corporation
    Inventors: Shih-Hsiung Weng, Khoon-Guan Tee
  • Patent number: 6962630
    Abstract: A lift-off procedure is provided which enables prevention of damage to a wiring pattern caused by contact of a metal being peeled off from a wafer with a wiring pattern at a time of lift-off procedure. A wafer having a surface on which a pattern is formed which contains a pattern portion to be removed is soaked into a chemical liquid at an angle at which the surface faces downward.
    Type: Grant
    Filed: October 3, 2002
    Date of Patent: November 8, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Masaru Suzuki, Yoshiki Nitta, Kazuhiko Ohmuro
  • Patent number: 6963432
    Abstract: The present invention provides a two-beam interference exposure system that can be simply adjusted by rotating only one mirror. By placing a half-wave plate in one of the interference arms and precisely scanning the relative fiber position, the present invention can expose true apodized fiber Bragg gratings in a single scan by simultaneously rotating the angle of the half-wave plate. By rotationally switching the fast and slow axes of the half-wave plate, the present invention can also expose n-phase-shifted fiber grating by the same system.
    Type: Grant
    Filed: January 14, 2004
    Date of Patent: November 8, 2005
    Assignee: National Chiao Tung University
    Inventors: Kai-Ping Chuang, Lih-Gen Sheu, Meng-Chang Tsai, Yinchieh Lai
  • Patent number: 6960098
    Abstract: A pipe component pre-embedded socket structure in which computer desk, shelf, and cabinet pipe members have pre-embedding holes and openings, with a pre-embedded socket installed in a pre-embedding hole. The pre-embedded socket connector face plate has various sockets correspondent to the rear panel sockets of a computer main system, the extension cables of which are inserted into a hollow pipe member and then drawn out of the lateral frame hollow pipe member opening and through an attached protective pliant tube. The structure provides for plug-in connections between the main system and the monitor, mouse, amplified speakers, and other peripherals, enabling simple and rapid set-up tasks, while affording a tidy and attractive appearance.
    Type: Grant
    Filed: July 13, 2004
    Date of Patent: November 1, 2005
    Inventor: Mei-Chuan Tseng
  • Patent number: 6960898
    Abstract: A control unit is provided that controls a motor that opens and closes a door of an electric train such that, if an abnormality is detected by a position sensor, continuation of its open/closing operation can be maintained. The control unit includes an arrangement for computing the actual rotation speed and the magnetic polar position of the motor; a position sensor abnormality-detecting identifier unit for detecting abnormalities in the output of the position sensor; and a first controlling arrangement that generates voltage-instructing values by applying the magnetic polar position so as to cause a speed detection value to correspond to the speed instruction value. The control unit further includes a second controlling arrangement, which in turn includes an F/V arithmetic unit 24 and integrator 25; and a switcher unit 27.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: November 1, 2005
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventor: Yoshinobu Sato
  • Patent number: 6958795
    Abstract: A composite liquid crystal panel includes a plurality of liquid crystal panels and a picture display surface. It cuts the border of each liquid crystal panel to a width of only one pixel, then bonding the panels together, installing the picture display surface on the liquid crystal panel, and distributing a portion of light from the normal pixels adjoining the border to the pixels corresponding to the border to resolve the gap problem. Light distribution is accomplished by using a pair of mirrors and a pair of reflecting surfaces to reflect the light of the pixels, so that light may be reflected above the pixels on the border and generate light. Then the pixels on the border and the pixels adjoining the border are redefined to form an image dot. Finally, through redistributing the light, the seams on the border may be completely eliminated.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: October 25, 2005
    Assignee: Delta Electronics, Inc.
    Inventors: He-Chiang Liu, Hsiao-Yi Li, Hung-Lung Cheng
  • Patent number: 6959205
    Abstract: A data communication system comprises a portable device for effecting radio communication, a communication adapter card for storing therein a plurality of communication protocols corresponding to a plurality of communication systems employed by the portable device, a computer in which the communication adapter card is inserted to execute data processing, and a connector cable composed of a first connector connected to the portable device, a second connector connected to the communication adapter card for outputting identification information to identify one of the communication systems employed by the portable device, and a cable for connecting between the first and second connectors.
    Type: Grant
    Filed: January 15, 2002
    Date of Patent: October 25, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Haruki Yambe
  • Patent number: 6959059
    Abstract: A pulse generator is provided which operates as a counter capable of resetting a count according to an instruction signal for providing instructions for the detection of a synchronizing pattern from a previously received burst signal having some of continuous pseudo random patterns. The pulse generator performs counting up to timing provided to detect a synchronizing pattern of a burst signal having a continuous part of a pseudo random pattern to be consecutively received and thereby outputs a count-up signal CO similar to the instruction signal.
    Type: Grant
    Filed: August 16, 2000
    Date of Patent: October 25, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Kiyohiko Yamazaki
  • Patent number: 6958973
    Abstract: A output queuing method for forwarding the packets sequentially in a switching network. Each port is related to a port output queue and a global output queue is shared by all port output queues. A FIFO (First In First Out) block is allocated into each port output queue and the global output queue. The FIFO block contains a number of FIFO nodes. Based on the type and destination ports of the received packet, the fields of the related FIFO node in the port output queue and the global output queue are set. The packets are sent out or skipped based on the related fields.
    Type: Grant
    Filed: September 27, 2000
    Date of Patent: October 25, 2005
    Assignee: Via Technologies, Inc.
    Inventors: Jen-Kai Chen, Yu-Ju Lin, Jiann-Hwa Liou
  • Patent number: 6959444
    Abstract: An apparatus for changing optical disks including a plurality of driving shafts, supported on the bottom plate of an optical disk drive, and a plurality of elastic devices. The driving shafts rotate synchronously around their vertical axes to raise and lower the trays. Each of the driving shafts includes a thread region, threads of which can be engaged with the trays, and an upright region located on the thread region. The pitch for threads in the upper thread portion is larger than that in the lower thread portion of the thread region. Each of the elastic devices has one end fixed to a top end of the upright region of the corresponding driving shaft or fixed beneath the top plate, and the other end provided together with the flat surface between the upright region and the thread region for clamping the trays in the range of the upright regions.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: October 25, 2005
    Assignee: Quanta Storage Inc.
    Inventor: Wen-Kuan Peng
  • Patent number: 6957028
    Abstract: The present invention provides an image forming apparatus which is small-sized and is able to keep a longtime and stable cleaning function. The image forming apparatus includes an image carrier; a blade member contacting elastically with the image carrier; a semi-conductive member installed on the blade member; and a power unit for adding a voltage to the semi-conductive member. Further, the semi-conductive member is set apart from the contacting portion of the blade member by a predetermined isolation distance.
    Type: Grant
    Filed: August 19, 2003
    Date of Patent: October 18, 2005
    Assignee: Oki Data Corporation
    Inventors: Takashi Serizawa, Hiroaki Sato
  • Patent number: 6955961
    Abstract: A method for defining a minimum pitch in an integrated circuit beyond photolithographic resolution controls the defined pitches of the target layer by use of polymer spacer, photo-insensitive polymer plug and polymer mask during the process, so as to achieve the minimum pitch of the target layer beyond photolithographic resolution. Applied to memory manufacture, this method is capable of simultaneously overcoming the process difficulty of significant difference between polysilicon pitches in memory array region and periphery region.
    Type: Grant
    Filed: May 27, 2004
    Date of Patent: October 18, 2005
    Assignee: Macronix International Co., Ltd.
    Inventor: Henry Chung