Abstract: A nonvolatile memory cell occupying a minimum chip area including a cell structure that includes two or more base materials being programmable by a heat induced chemical reaction to form a layer or layers of alloy. The formation of alloy results in a change in resistance of the cell structure so that one or more programmed states are determined. A semiconductor memory constructed by a large number of the nonvolatile memory cells can be obtained in a compact manner with simple and as few as possible steps. This process vertically stacked layers, and this semiconductor memory is thus easily to be combined with other integrated circuits on a single chip.

Abstract: An apparatus for switching output voltage signals includes a resistor string, a first switching device set for delivering a number of gamma voltage input signals, a second switching device set for delivering a high voltage input signal and a low voltage input signal, and a switch selecting device coupled to the first switching device set and the second switching device set. When the switch selecting device outputs a first signal, the first switching device set can deliver the gamma voltage input signals to the resistor string; when the switch selecting device outputs a second signal, the second switching device set will deliver the high voltage input signal and the low voltage input signal to the resistor string.

Abstract: A power protection device includes a power source switching unit for shutting off the power supply from an AC power source according to an open control signal, a surge voltage protecting unit for outputting the open control signal when a surge voltage occurs, a leakage current protecting unit for outputting the open control signal when a leakage current occurs, and an over-current protecting unit for outputting an open control signal according to a current value when an over-current occurs. The power protection device provides the surge voltage protection, the leakage current protection and the over current protection at the same time.

Abstract: A remote control assembly comprising a signal light and a spotlight comprises a lamp receptacle, a combined light, two driving device for the combined light, a base stand, circuit board and suction disk. The combined light includes signal light and spotlight, lamp shields, lens and supporting shafts. When assembled, it is rotatably mounted in the lamp receptacle. One of driving device can make the combined light rotate upward and downward in the range of 250°, and can provide large visual angle in the evening or at night, even beyond 90°, and the other driving device can make the combined light rotate horizontally in the wide range of 360°. In addition, it (the combined light) has good performance of weather proof and super bright illumination. In emergency condition, its flashing light can be seen from several kilometers away. It is suitable for use on deck, galley, trailers and utility vehicles.

Abstract: A flow-forced generator adapted with a turbo-charging deflection hood having at the peripheral of the vortex ring in the generator provided with an automated directional turbo-charging deflection hood for the air or fluid to produce turbo-charging results due to the reducing deflection of the hood, thus to increase the power of the generator in case of insufficient flow force.

Abstract: A peripheral device for use in a system including a storage unit coupled to a local bus. The peripheral device has a shared bus interface provided for interfacing with the storage unit and the local bus. The peripheral device also includes core logic coupled to the shared bus interface. When the core logic receives a read/write command with respect to the storage unit through the local bus, it causes the local bus to enter at least a wait state and performs a corresponding data transfer between the peripheral device and the storage unit through the shared bus interface during the wait state. In particular, the peripheral device shares the shared bus interface with the storage unit so as to transfer data.

Abstract: This invention provides an image transmission device and an image display device capable of preventing easily the image data from being tampered with and of confirming the originality of the image data visually. More specifically, this invention provides an image transmission device and an image display device wherein: the image display device receives the coded-image data transmitted from the image transmission device and the encrypted mark coded-image data, and decrypts the mark image by using the hash value of the decoded image; the mark image connected with the image is output; when even a part of the image is tampered with, the coded-image data of the mark image which is decrypted by using the hash value as a key become different from the coded-image data of the mark image which is not tampered with; and consequently, the mark image finally achieved enables to judge visually and easily whether the image data are tampered with or not.

Abstract: A method of relay transmission in a mobile communication system. The mobile communication system includes at least one base station and a plurality of user equipment units (UEs). When one of the UEs attempts to send a message to the base station, this one of the UEs, referred to as a requesting UE, is capable of using the method of relay transmission to send messages to the base station via another one or more UEs, referred to as relay UEs. The method of relay transmission includes the following steps. First, a relay request confirmation procedure for the requesting UE and the relay UE is performed. Second, a base station confirmation procedure for the requesting UE, the relay UE, and the base station is executed. Next, an identity authentication procedure for the requesting UE, the relay UE, and the base station is performed. After that, a relay start confirmation procedure for the requesting UE and the relay UE is executed.

Abstract: An apparatus for monitoring the state of computer system resources. According to the invention, the apparatus includes bus interface logic and a queue. The bus interface logic is used to interface with a serial bus and parse a bitstream through the serial bus into a command and an address. Also, the apparatus includes bridge logic, an arbitrator and a decoder. The decoder is used to decode the command. If the command represents a predetermined request for access to a resource bus, the decoder passes the predetermined request associated with the address to the queue. Whenever the predetermined request occurs, the arbitrator grants the resource bus to the predetermined request and allows the queue to output the predetermined request as well as the associated address. The bridge logic is provided to transfer data to and from computer system resources according to the predetermined request and the address.

Abstract: A police-emergency system of wireless communication which is to generate a signal by a control circuit of the magnetic card and transmits the signal onto the host server through the wireless communication module of said magnetic card, after the host server receives the signal coming from the magnetic card, it judges if the signal is in conformity with the data in the database by the microprocessor such that the signal will be transmitted onto the police-emergency system of police-citizen connection to notice the policemen arrive on the scene where crime happened.

Abstract: A method for compensating for clock signal difference between a switch and peripheral device, including a receiving process and a transmitting process. For the receiving process, after an N-th packet is received, a first counter is triggered and begins to count. When an (N+1)-th packet is inputted, the counter stops counting and then an inter-packet gap IPG(N, N+1) between the N-th packet and the (N+1)-th packet is recorded into the N+1 queue link node QLN(N+1) according a counting value by the first counter; otherwise, the first counter keeps counting. For the transmitting process, after an inter-packet gap IPG(M?1, M) is obtained, and the M-th packet is transmitted, and then the second counter is triggered to begin to count. When a counted value by the second counter is equal to the clock cycle value corresponding to the inter-packet gap IPG(M?1, M), the second counter stops counting.

Abstract: Rotary positioners integrally and pivotally stack a read magnetic head for reading a master disk and servo heads for writing to each surface of magnetic disks, the master disk and magnetic disks being stacked on a shaft of a spindle motor. Every surface of every magnetic disk is written by the servo heads in parallel while sharing a range of tracks. Simultaneously with the writing, checking magnetic heads stacked on a checking-dedicated rotary positioner read written data on the master disk and on each surface of the magnetic disks. A comparison logic circuit compares the read data from the magnetic disk surfaces with the data from the master disk. If an inconsistency is found, the contents of the master disk are overwritten on the corresponding magnetic disk surface through a correction servo pattern generator by the checking magnetic head.

Abstract: Disclosed is a system and method for channel allocation in a multi-band wireless network. The system includes microcell base stations, at least one macrocell base station, a mobile station, and a channel allocation center. When the mobile station makes/receives a call or executes a handover, the channel allocation center uses repacking on demand (RoD) scheme to allocate a radio channel of either a macrocell base station or a microcell base station to the mobile station. RoD has the following steps. First, a microcell channel is trying to be allocated if available. If no microcell channel is available, a macrocell channel is then trying to be allocated. Third, if no macrocell channel is available, repacking is performed to execute a handover of another mobile station's call from the macrocell to another microcell, and to allocate a reclaimed macrocell channel to the mobile station. Otherwise, no repacking call is available and the mobile station is blocked or forced terminated.

Abstract: A detection apparatus for use in a touch pad, for detecting the coordinates indicated by a user on the touch pad and the behavior of the user on the touch pad. The touch pad includes an X-layer and a Y-layer, and the X- and Y-layers are planar resistors. The detection apparatus has a sleep mode and an operative mode. When the user touches the touch pad, the X- and Y-layers are electrically coupled at a touch point. The detection apparatus includes a central processor, a coordinate detecting unit, an analog-to-digital converting unit, and a wake-up unit. The coordinate detecting unit is used to determine and output an X-coordinate voltage and a Y-coordinate voltage, wherein the X- and Y-coordinate voltages correspond to the touch point. The analog-to-digital converting unit is used to convert the X- and Y-coordinate voltages into an X-coordinate and a Y-coordinate, and to output the X- and Y-coordinate.

Abstract: A re-generator of an optical clock signal has at least a mode-locked semiconductor laser outputting a re-generated optical clock signal from at least one end face of the mode-locked semiconductor laser, with inputted light signals having different polarized wave states respectively at both end faces of the mode-locked semiconductor laser; wherein the re-generator has a light splitter to split the light signal into two kinds of elements with respective polarized waves different by a right angle, and to emit one of the elements split from the light signal, to one of both end faces of the mode-locked semiconductor laser; and a rotator to input the other elements split from the light signal, to rotate the other elements by a right angle, and to lead the rotated element to the other end face of the mode-locked semiconductor laser.

Abstract: A method for controlling a charge-coupled device (CCD) sensing module. The CCD sensing module includes photosensors divided into two sets of photosensors including a first set of photosensors and a second set of photosensors. First, the first set of photosensors and the second set of photosensors are exposed, and first signal charges obtained from the first set of photosensors and second signal charges obtained from the second set of photosensors are stored into a CCD shift register unit. Then, the first signal charges and the second signal charges stored in the CCD shift register unit are sequentially shifted to a charge receiving unit and an image signal corresponding to the first signal charges is acquired. After that, the first set of photosensors and the second set of photosensors are exposed, and the first signal charges obtained from the first set of photosensors and the second signal charges obtained from the second set of photosensors are stored into the CCD shift register unit.

Abstract: A 3D polysilicon ROM including an isolated SiO2 layer on a silicon substrate, and an N+ polysilicon layer on the isolated SiO2 layer. The N+ polysilicon layer is further defined by a plurality of parallel, separate word lines. A first oxide layer fills the space between the word lines. A dielectric layer is deposited on the word lines and the first oxide layer. A P? polysilicon layer is deposited on the dielectric layer and further defines a plurality of parallel, separate bit lines. The bit lines overlap the word lines, from a top view, to form an approximately cross shape. The neck structure may be individually formed between the P? and N+ polysilicon layers by wet etching the dielectric layer with dilute hydrofluoric acid. A second oxide layer fills the space between the bit lines and is on the word lines and the first oxide layer.

Abstract: A semiconductor device includes a clock input terminal to which external clocks are supplied; a PLL circuit, which is supplied with the external clocks and generate first internal clocks; a logic circuit, which operates in synchronization with the internal clocks; and an internal counter, which counts the first internal clocks when the PLL circuit is tested. The internal counter is provided with an output terminal from which an output signal thereof is supplied to an external circuit.