Patents Represented by Attorney Rabin & Berdo, P.C.
  • Patent number: 6747923
    Abstract: The invention provides a method of adjusting a tracking location in an optical storage device. The method is illustrated as follows. Firstly, the optical pickup head reaches the first tracking location according to a tracking error (TE) signal. Secondly, the optical pickup head is finely moved to an adjusted tracking location where the value of the amplitude of RFRP signal is maximum. The method can avoid wrong tracking location by simply based on the TE signal, then enable the optical pickup head to reach the correct track center and improve the quality of data reading.
    Type: Grant
    Filed: June 3, 2002
    Date of Patent: June 8, 2004
    Assignee: Via Technologies, Inc.
    Inventors: Sung-Hung Li, Yi-Lin Lai
  • Patent number: 6747374
    Abstract: A frequency correction circuit for accurately correcting clock signals of an oscillating frequency with a simplified configuration without adjusting an oscillator circuit generating the oscillating frequency. A count adjuster of a time-base counter (TBC) receives a delay control signal and a clock signal. The count adjuster includes an inverter and an AND gate. The inverter is responsive to the delay control signal and develops an output signal, while the AND gate receives the clock signal. During the high level period of the delay control signal, the AND gate sends out the clock signal, from which one clock has been erased, as a clock signal of the initial stage T-type flip-flop of a clock frequency divider, which then produces an output signal, from which deviations have been removed.
    Type: Grant
    Filed: February 21, 2003
    Date of Patent: June 8, 2004
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Shinichi Kouzuma
  • Patent number: 6748084
    Abstract: A data access control system and a method thereof is disclosed. First, the master key is divided into n subkeys to be kept by n holders, by way of secret sharing. The master key reconstruction procedure utilizes the shared secret with the subkey holders to obtain m subkeys (1<m<n) and then reconstructs the master key, using the (m,n)-threshold scheme. The system then uses the master key to access the data. Thus, m subkeys are required to reconstruct the master key in order to amend or read the data in the system.
    Type: Grant
    Filed: September 14, 1999
    Date of Patent: June 8, 2004
    Assignee: Industrial Technology Research Institute
    Inventors: Min-Jea Gau, Yen-Sha Chen, Wen Tsuei, Wen-Hsin Yang, Jen-Chieh Cheng
  • Patent number: 6746229
    Abstract: A pressure thermoforming machine comprises a lower bracket having a molding half moveably supported thereon. An upper bracket is securely connected to the lower bracket. An upper molding half is moveably supported thereon. Driving blocks are moveably and oppositely mounted on the lower bracket. Each driving block includes an inclined surface and the driving blocks are moveably interconnected such that the driving blocks move toward and away from each other simultaneously. Rollers are mounted on the lower molding half with respect to the inclined surface of the driving block such that the lower molding half moves upward when the driving blocks move toward each other, and lower downward when the driving blocks move away from each other.
    Type: Grant
    Filed: July 17, 2001
    Date of Patent: June 8, 2004
    Inventor: Kuei-mei Wei Chang
  • Patent number: 6746945
    Abstract: A material layer which contains nitrogen atoms is formed on a first wiring or at a side surface of a first wiring. When etching for forming a via hole is carried out, nitrogen atoms contained in the material layer bind with CF molecules, CF2 molecules, CF3 molecules and the like contained in an etching gas, and compounds thus formed adhere to a surface of a silicon dioxide layer at side walls and a bottom portion of a via hole. As a result, once the material layer is exposed during etching for forming a via hole, thereafter, the etching rate decreases. Accordingly, even if there is misalignment of a via hole pattern with respect to a first wiring pattern when the via hole pattern is formed by lithography, etching of the silicon dioxide layer does not proceed to an underlying silicon substrate. Thus, short circuits are not formed between the first wiring and the silicon substrate via a second wiring layer which is deposited later.
    Type: Grant
    Filed: December 27, 2002
    Date of Patent: June 8, 2004
    Assignee: Oki Electric Industry Co, Ltd.
    Inventor: Toshiyuki Orita
  • Patent number: 6747489
    Abstract: Frequency multiplying circuitry includes a couple of integrator circuits. The one integrator circuit charges a capacitor with a larger time constant via a resistor when an input clock signal is in its high level and then discharges it with a smaller time constant when the clock signal is in its low level. The other integrator circuit charges and discharges its capacitor in the opposite manner to the one integrator circuit as to the level of the clock signal. An output circuit compares the output voltages of both integrator circuits with a reference voltage and raises the level of its output signal when either one of the output voltages drops below the reference voltage. The duty ratio of the circuitry is therefore little susceptible to the frequency of the input signal and power supply voltage.
    Type: Grant
    Filed: September 30, 2002
    Date of Patent: June 8, 2004
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Kouji Nasu
  • Patent number: 6744535
    Abstract: Pixel information and control information transmitted by a facsimile machine 1a is received by a procedure controlling circuit 13 having a MODEM 13a for facsimile machines. A facsimile procedure controller 14 decodes the pixel information and the control information. A connection/transfer controller 15 edits the decoded information and produces a control packet and a pixel packet. The control packet and the pixel packet are output to a local area network (LAN) 4 via a LAN controller 17 and a LAN control circuit 18. When receiving a facsimile, the control packet signal transmitted via the LAN 4 is converted into pixel control information by the connection/transfer controller 15, and the pixel control information is supplied to the facsimile procedure controller 14. The connection/transfer controller 15 also converts the received pixel packet signal into pixel information. The pixel information is temporarily stored in a memory 16.
    Type: Grant
    Filed: July 25, 2001
    Date of Patent: June 1, 2004
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Yasubumi Chimura, Kouichi Izumi
  • Patent number: 6742645
    Abstract: A paper currency receiving system is constructed to include a paper currency take-up unit adapted for taking up paper currency inserted therein, a paper currency verification unit inserted into the paper currency take-up unit at a bottom side and adapted for verifying authenticity of inserted paper currency, the paper currency verification unit having two coupling spring plates adapted for securing the paper currency verification unit to the paper currency take-up unit, and a paper currency storage cabinet attached to the paper currency take-up unit at a back side and adapted to collect paper currency from the paper currency take-up unit, the paper currency take-up unit having a spring latch adapted for locking the paper currency storage cabinet and a control button adapted for disengaging the spring latch from the paper currency storage cabinet.
    Type: Grant
    Filed: December 17, 2001
    Date of Patent: June 1, 2004
    Assignee: International Currency Technologies Corporation
    Inventor: Shang-Ter Chou
  • Patent number: 6744646
    Abstract: A device and method for converting a low voltage signal into a high voltage signal are provided, which can be implemented by using a low voltage CMOS manufacturing process to convert a low voltage signal of 0V to 1.5V into a high voltage signal of 2.5V to 1.25V. According to one preferred embodiment, PMOS transistors are employed to perform voltage level conversion and supply voltages of 1.25V and 2.5V are supplied to the PMOS transistors. During the conversion, no current path exists between the supply voltages thus effectively reducing static power consumption. In addition, the low level of the high voltage signal is outputted through the drain and source of the transistor so that the low level of the high voltage signal can be accurately defined and not affected by manufacturing parameters.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: June 1, 2004
    Assignee: Via Technologies, Inc.
    Inventors: Jin-Cheng Huang, Yen-Mou Huang
  • Patent number: 6744140
    Abstract: A semiconductor chip which is to be overlapped with and joined to a surface of another solid device. The semiconductor chip has a surface protective film for covering internal wiring, an external connection pad which is formed by partially exposing the internal wiring from the surface protective film, and a wire connecting portion which is formed using a metal material having oxidation resistance on the external connection pad and to which a wire for electrical connection to an external terminal is connected. It is preferable that the semiconductor chip further has an internal connection pad used for connection to the solid device and a bump formed on the pad.
    Type: Grant
    Filed: September 20, 2000
    Date of Patent: June 1, 2004
    Assignee: Rohm Co., Ltd.
    Inventor: Shigeyuki Ueda
  • Patent number: 6739022
    Abstract: The present invention relates to a rotary buckle structure which includes a buckle member and a rotary member. The bottom of the buckle member and rotary member are respectively coupled by way of a downwardly tapered conical body, and conical hole, and which have the same concentric axis. A length of surface of external circumference is longer than the length of the inner circumference of the conical hole. This arrangement improves the traditional buckle and effectively reduces the wearing to prevent the entire buckle set from loosening or falling off, and thus extends the life of use.
    Type: Grant
    Filed: November 13, 2002
    Date of Patent: May 25, 2004
    Inventor: Ying-Chih Chen
  • Patent number: 6741042
    Abstract: A light emitting device for optic fiber decoration, includes a flash control IC, a plurality of different colored LED's, a variable resistor and a light-sensitive resistor, driven by 4.5V DC voltage to control the flash control IC, with output from the flash control IC controlling each LED to alternatively and gradually change flashing lights. Each LED projects lights into optic fibers, producing romantic light changes in the optic fiber decoration. The invention can be used to replace the light-emitting device, including light bulbs, a motor, color discs and such sophisticated structures in a conventional optic fiber decoration, and provides safer use, more energy saving and higher efficiency than conventional types.
    Type: Grant
    Filed: December 10, 2002
    Date of Patent: May 25, 2004
    Inventor: Tai-Ning Tang
  • Patent number: 6739942
    Abstract: An ultrasonic remote aeroplane for playing air-battle game includes a wing, a cockpit, a propeller, a tail pole, a fin, a rudder, a main remote circuit for receiving the propeller rotation controlling signal and rudder motion controlling signal carried high frequency carrier transmitted from a remote transmitter, and a driving system thereof. The remote aeroplane further includes an air-battle box including at least an ultrasonic transmitting tube, an ultrasonic receiving sensor, an attachment structure for fixing to the aeroplane, and a control circuit corresponding to them. The remote transmitter further transmits a high frequency carrier carrying a signal F3 for instructing the ultrasonic transmitting tube to transmit ultrasonic waves. The main remote circuit further includes a circuit for receiving the high frequency carrier carrying the signal F3 and separating out the signal F3.
    Type: Grant
    Filed: April 22, 2002
    Date of Patent: May 25, 2004
    Inventors: Yu Tian, Wenyan Jiang
  • Patent number: 6739739
    Abstract: A flash tube reflector able to distribute light of the flash tube evenly is disclosed. The reflector is a vertical portion of an elliptic cylinder extending along an Y-axis. A cross section of the reflector along the XY plane is a portion of an ellipse. A zenith E at the reflector intersects the X-axis. The flash tube contacts the reflector at E. A is a center of the flash tube and c is a distance between E and A. F1 is a first focus of the ellipse of the reflector and f1 is a distance between E and F1. F2 is a second focus of the ellipse and f2 is a distance between E and F2. The relations of c, f1, and f2 are 0.20 ≦c/f1≦0.45 and 0.14≦f1/f2≦1.0.
    Type: Grant
    Filed: June 13, 2002
    Date of Patent: May 25, 2004
    Assignee: Benq Corporation
    Inventors: Jih-Yung Lu, Chih-Po Yang, Rex Liao
  • Patent number: 6740907
    Abstract: A junction field-effect transistor is formed by providing a p-type gate region in a surface of an n-type semiconductor layer and n-type drain and source regions sandwiching the gate region on the surface of the n-type semiconductor layer. A p-type diffusion region is formed at least in the region on the side of the drain close to the gate region on the surface of the n-type semiconductor layer. A drain electrode is formed so that it contacts with the p-type diffusion region. As a result, the junction FET can be reduced in drain-source leak current Idss to a small, stable value. Thus, a high-gain junction field-effect transistor is obtained which has small variation in performance among actual units manufactured.
    Type: Grant
    Filed: October 4, 2002
    Date of Patent: May 25, 2004
    Assignee: Rohm Co., Ltd.
    Inventor: Kazuhisa Sakamoto
  • Patent number: 6739765
    Abstract: A socket for optical fiber connector used in data transmission of video display systems, at least includes a plastic housing and a light receiving and emitting element. The features thereof are that in the plastic housing is provided with a modularized protective hood further comprising a front cover having a rectangular recess and a movable door pivotally disposed at two inner sides thereof, respectively, for coordinating with bases having different structures, so as to satisfy requirements of various vendors in manufacturing and assembly, thereby accomplishing effects as having easy assembly, minimizing volume of plastic housings and lowering production cost.
    Type: Grant
    Filed: April 18, 2003
    Date of Patent: May 25, 2004
    Assignee: Simula Co., Ltd.
    Inventor: Richard Liu
  • Patent number: 6739746
    Abstract: A water-resistant base device for optical-fiber Christmas trees, consisting of a main base unit, a upper base cover, a rotating unit, a fixing unit, a water-resistant hood, a top cover and a tree unit. The rotating unit is installed on the fixing unit structure on the upper cover of the base, using a ringed wall protruding from the top periphery of the main base unit, the water-resistant hood fastened onto the top of the upper base cover, and the arched top cover covering the top of the water-resistant hood, to enable heat radiation and water resistant functions to the entire base assembly, so the Christmas tree can be installed for indoor and outdoor purposes.
    Type: Grant
    Filed: April 2, 2003
    Date of Patent: May 25, 2004
    Inventor: Tai-Ning Tang
  • Patent number: D491162
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: June 8, 2004
    Assignee: Gonica Electronic Co., Ltd.
    Inventor: Yin Chau Chan
  • Patent number: D491169
    Type: Grant
    Filed: July 9, 2003
    Date of Patent: June 8, 2004
    Assignee: Trans Electric Co., Ltd.
    Inventor: Cheng-Si Wang
  • Patent number: D491170
    Type: Grant
    Filed: July 9, 2003
    Date of Patent: June 8, 2004
    Assignee: Trans Electric Co., Ltd.
    Inventor: Cheng-Si Wang