Abstract: A II-VI semiconductor diode laser has a II-VI semiconductor structure disposed atop a semiconductor substrate and covered with a contact layer. A current-blocking layer is disposed on top of this contact layer. The current-blocking layer has an etched groove extending therethrough, to expose a stripe of the contact layer. A metal electrode layer contacts the current-blocking layer and extends into the etched groove to contact the exposed stripe of the contact layer. The current-blocking layer confines the current flow between the metal electrode layer and the contact layer to the stripe of the contact layer exposed by the etched groove.

Abstract: Method of manufacturing a semiconductor device and semiconductor device manufactured by such a method.A method of manufacturing a semiconductor device whereby a surface of a semiconductor body 1 is covered with an electrically insulating layer 8 and at least two electrical conductors 20, 23 are provided on the insulating layer next to one another and mutually separated by an interposed dielectric layer 21. The conductor 20 is formed from a first conductive layer deposited on the insulating layer. The upper surface and at least the flank 25 of the conductor 20 facing the other conductor are covered with the dielectric layer 21. Then a second conductive layer 22 is deposited over the entire surface which exhibits a step corresponding to the flank 25 of the first conductor. Subsequently, a mask 24 is formed which defines the second conductor, after which the second conductor 23 is formed from the second conductive layer through etching.

Abstract: The invention relates to a method of manufacturing a radiation-emitting semiconductor diode (10) whereby a sacrificial layer (1) comprising a polymer is provided on a first side face (11) of a semiconductor body (20) which contains at least one radiation-emitting semiconductor diode (10), a coating (2) is subsequently provided on the first side face (11) and on a second side face (12) of the semiconductor body (20) which encloses an angle with the first side face (11) and which forms an exit face for the radiation to be generated by the diode (10), after which the first side face (11) is divested of the sacrificial layer (1) and of the portion (21) of the coating (2) situated thereon through etching of the sacrificial layer (1). It is possible by such a method, for example, to cover the mirror faces (11, 14) of a laser diode (10) selectively with a reflecting, anti-reflection, or passivating coating (2). A disadvantage of the known method is that laser diodes (10) manufactured thereby are difficult to solder.

Abstract: An integrated circuit has an interconnection pattern which is recessed in the insulating layer, for example, an oxide layer. A groove is etched in the insulating layer corresponding to the metal pattern by means of a mask which is the inverted image of the interconnection pattern during manufacture. Etching is continued until contact windows are fully opened. To prevent the oxide between the contact windows also being removed, a conductive etching stopper layer is provided in the oxide layer. A layer already present in the process is used for this etching stopper layer, for example, a polycrystalline silicon layer, so that extra process steps are made redundant.

Abstract: The invention relates to a semiconductor device with which input signals can be weighted and the weighted input signals can be summed, and which in conjunction with a neuron can be used, for example, as a synapse in a neural network. The device comprises a number of switched capacitances with a common capacitor plate formed by a surface region 3 in a p-type substrate 1. The region 3 is connected to the inverting input of an amplifier 11 whose +input is connected to a reference voltage and whose output 12 supplies the summed output signal. The output 12 can be fed back to the input 3 via switch S. The other plate of the capacitances is formed by an electrode 6a, 6b, 6c, which can be switched between a reference voltage and an input source. The weight factors are stored in the form of electric charges on a floating gate 5a, 5b, 5c, which is provided between each input electrode 6 and the surface region 3.

Abstract: In a diversity transmission system the problem arises that almost no improvement can be obtained when the signals to be received show frequency selective fading within the band width of the signal to be transmitted. To solve this problem the signal to be received is separated by filter banks into a number of sub-band signals. Corresponding sub-band signals of different filter banks are combined by the combiners into combined sub-band signals. These combined sub-band signals are combined to a broad band signal by a final combiner.

Abstract: A semiconductor device (1) includes a vertical insulated gate field effect device (2) and has a semiconductor body (3) with a first semiconductor region (4) of one conductivity type adjacent one major surface (5). A second semiconductor region (6) of the opposite conductivity type is formed within the first region (4) adjacent the surface (5) and a third region (7) forms with the second region (6) a rectifying junction (8) meeting the one major surface (5). A recess (9) extends into the first region (4) from the one major surface (5) so that the second and third regions (6 and 7) abut the recess (9), and an insulated gate (10) is formed within the recess (9) for controlling conduction between the first and third regions (4 and 7) along a conduction channel area (61) of the second region (6).

Abstract: A dual-gate insulated gate field effect device (1) such as a MOS tetrode has an active device area (3) in which adjacent source regions (5) are separated by and spaced apart from an intervening drain region (6) to define a respective conduction channel region (7) between each source and drain region (5 and 6). An insulated gate structure (10) has first insulated gate sections (11) forming an inner insulated gate (110) connected so as to surround each drain region 6 and second insulated gate sections (12) provided between the first insulated gate sections (11) and the source regions (5) and forming an outer insulated gate (120). Ends (11a,12a) of the insulated gate sections (11 and 12) extend onto the surrounding field oxide (4) to connect with respective first and gate conductors (13 and 14).

Abstract: A temperature-compensated voltage regulator includes a field effect transistor voltage buffer which receives a high-voltage input and provides a low-voltage output, and a voltage generator having a series connection of a zener diode and at least one p-n junction diode for generating a reference voltage. The voltage generator is coupled between the low-voltage output of the voltage buffer and the input of a current mirror, with the output of the current mirror being coupled to the gate electrode of the field effect transistor in the voltage buffer. Additionally, the output of the current mirror is coupled to the low-voltage output of the voltage buffer by a resistor. The resulting voltage regulator circuit features high performance in a simple, economical configuration.

Abstract: A BiCMOS line driver that incorporates a fully-powered, zero- static power pull-down driver with a standard BiCMOS pullup in a novel parallel input signal path construction having substantially equal propagation delays to create a complementary signal driver with very high speed and extremely low skew in propagation.

Abstract: A vehicle simulator is provided with a control device for actuation by an operator which device's input is digitized and fed to a vehicle model. The model (14) maintains an objective position and direction for the simulated vehicle which are fed to a lag means. The lag means operates to delay the rate of change of objective direction of the simulated vehicle to provide a subjective direction to a display generator. The display generator provides a subjective view based on the objective position and subjective direction of the simulated vehicle on a display.

Abstract: A 3-phase charge-coupled imaging device is operated in the interlace mode. During integration, voltages are applied to the clock electrodes such that charge is integrated below the same set of electrodes each time. The signal charges of the first field are formed in that 3/4 portion of the charge in each picture element is augmented by 1/4 portion of the charge of the preceding picture element, while the signal charges of the second field are formed in that the 3/4 portion is augmented by 1/4 portion of the charge generated in the following picture element. These summations may be carried out in the sensor itself in that the charge packages are shifted to the left and right during integration. The flicker which is usually the result of interlacing is very strongly reduced in this way.

Abstract: A switching element is provided with two electrodes (1, 2) with a semiconducting dielectric (3) therebetween, one electrode (2) having a material which forms a Schottky contact with the semiconducting dielectric (3), while a space charge region (3') of the Schottky contact forms a tunnelling barrier for electrons during operation. It is desirable in many applications for the switching element to hold a certain switching state, such as open or closed, during a longer period. The switching element may then be used, for example, as a memory element. The dielectric (3) includes a ferroelectric material with a remanent polarization which influences a dimension of the tunnelling barrier. In this manner the switching element has various switching states depending on the remanent polarization of the dielectric (3). These switching states are held until the polarization of the dielectric (3) changes.

Abstract: A bridge rectifier circuit uses active switches for at least two of its four rectifying elements, and employs an active control circuit to control the state of the active switches. The active control circuit receives its input from the AC input to the bridge rectifier circuit, is powered by the DC output of the bridge rectifier circuit, and provides control outputs to the active switches. In this manner, a bridge rectifier circuit having improved performance and decreased power dissipation is achieved.

Abstract: A charge-coupled imaging device has a width/height ratio which is adjustable since a number of columns situated in two strips on either side of the sensor are not used. The charge generated in these columns is placed in the horizontal output register simultaneously with the active information which is to be used, and is drained off in the flyback time between consecutive active line times through the output of the output register. Since the non-active strips are situated on either side of the sensor, the location of the center of the active portion of the matrix is fixed, independent of whether the information from the said strips is or is not used, so that in every state of the sensor this center coincides with the optical center of the optical system used.

Abstract: A method of manufacturing a semiconductor device whereby on a surface (3) of a semiconductor body (1) a conductor track (21) of polycrystalline silicon insulated from the surface (3) is provided in a layer of doped polycrystalline silicon (11) provided on a layer of insulating material (10), and whereby a strip of polycrystalline silicon (19, 35) is formed between an edge (18) of the conductor (21) and a portion (24, 34) of the surface (3) adjoining the edge (18), after which a semiconductor zone (30) is formed through diffusion of dopant from the conductor (21) through the strip (19, 35) into the semiconductor body (1).

Abstract: So as to be directly connected to the predefined logic circuit PLC to form a baseband modem, the analog circuit BBAC is monolithically integrated in accordance with the CMOS technology, using switched-capacitor filters which are driven by only one clock. The automatic equalizer EGA is likewise designed from switched-capacitor filters, equalization being obtained by variable and symmetrical clipping of the signals. In these conditions the modem can operate automatically in a very wide range of data rates.

Abstract: A semiconductor device includes a programmable element having a doped semiconductor region (4) and a conductor region (6) which are separated from one another by at least a portion of an insulating layer (5). The conductor region (6) is of a material suitable for forming a rectifying junction (8) with the material of the semiconductor region (4). To achieve a comparatively high conductivity connection to the semiconductor region (4), the element is further provided with a contact region (3) which has a comparatively low electrical resistance compared with the semiconductor region (4). The contact region (3) is provided at a side of the semiconductor region (4) remote from the insulating layer (5) and is separated from the insulating layer (5) by the semiconductor region (4). Both the semiconductor region (4) and the contact region (5) are laterally bounded by an isolating region (7) at opposing sides.

Abstract: A semiconductor device includes a semiconductor body (1, 2) with an island-shaped region (3) adjoining the surface, in which a contact pad (6) is provided above the island-shaped region (3) and separated therefrom by an insulating layer (5). The island-shaped region (3) forms a pn-junction (34) with an adjoining isolating region (4). According to the invention, the device is provided with regions (40, 41) for increasing the breakdown voltage of the pn-junction (34).

Abstract: Optoelectronic semiconductor device comprising a waveguide and method of manufacturing such a device. Optoelectronic semiconductor devices which have a groove-shaped waveguide in an oxide layer provided on a silicon substrate are compact, easy to manufacture, and--when the waveguide comprises a non-linear optical material--applicable inter alia for frequency doubling of laser radiation. In known devices, scattering losses occur in the waveguide owing to the roughness of the groove which arises during etching of the groove. Here the groove and a portion of the oxide layer are formed by local, preferably thermal, oxidation of the silicon substrate. The groove formed at the area of the oxidation mask has a smoother surface and as a result the waveguide has lower losses. When the device includes a GaAs/AlGaAs diode laser, it forms an efficient, compact, inexpensive and blue-emitting laser source which is suitable for use in an optical disc system.