Patents Assigned to Advanced Micro Devices
  • Controlling the Power State of an Idle Processing Device
    Publication number: 20120249559
    Abstract: A method of operating a processing device is provided. The method includes, responsive to an idle state of the processing device, transitioning the processing device to a substantially disabled state. The processing device, for example, may be a graphics processing unit (GPU). Transitioning the processing device to a substantially disabled state upon detection of an idle state may result in power savings. Corresponding systems and computer program products are also provided.
    Type: Application
    Filed: April 4, 2012
    Publication date: October 4, 2012
    Applicants: ATI Technologies ULC, Advanced Micro Devices, Inc.
    Inventors: Oleksandr KHODORKOVSKY, Paul BLINZER, Korhan ERENBEN, Leonard Martin BERK, Min ZHANG
  • METHODS AND APPARATUS FOR UPDATING DATA IN PASSIVE VARIABLE RESISTIVE MEMORY
    Publication number: 20120254541
    Abstract: Methods and apparatus for updating data in passive variable resistive memory (PVRM) are provided. In one example, a method for updating data stored in PVRM is disclosed. The method includes updating a memory block of a plurality of memory blocks in a cache hierarchy without invalidating the memory block. The updated memory block may be copied from the cache hierarchy to a write through buffer. Additionally, the method includes writing the updated memory block to the PVRM, thereby updating the data in the PVRM.
    Type: Application
    Filed: April 4, 2011
    Publication date: October 4, 2012
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Brad Beckmann, Lisa Hsu
  • In situ formed drain and source regions including a strain-inducing alloy and a graded dopant profile
    Patent number: 8278174
    Abstract: The dopant profile of a transistor may be obtained on the basis of an in situ doped strain-inducing semiconductor alloy wherein a graded dopant concentration may be established along the height direction. Consequently, the semiconductor alloy may be positioned in close proximity to the channel region, thereby enhancing the overall strain-inducing efficiency, while not unduly compromising the finally obtained dopant profile. Furthermore, additional implant species may be incorporated prior to selectively growing the semiconductor alloy, thereby avoiding implantation-induced relaxation of the internal strain.
    Type: Grant
    Filed: January 18, 2010
    Date of Patent: October 2, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Jan Hoentschel, Vassilios Papageorgiou, Uwe Griebenow
  • Apparatus and method for providing cooling to multiple components
    Patent number: 8280559
    Abstract: In an embodiment, an integrated circuit includes an input configured to receive a first control signal and an output module configured to generate an output signal based at least on the first control signal and a second control signal generated based at least on a measured temperature of the IC. The output signal is configured to control a cooling device.
    Type: Grant
    Filed: June 11, 2008
    Date of Patent: October 2, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Jeffrey Herman, Sagheer Ahmad
  • Electrical connector, cable and apparatus utilizing same
    Patent number: 8272900
    Abstract: An electrical connector, such as a circuit board connector, includes a first group or subassembly of electrical contacts physically separate from an adjacent and second group or subassembly of contacts. The first group of electrical contacts and second group of electrical contacts each include a row of lower contacts and upper contacts. The second group of electrical contacts has an identical but mirrored configuration as the first group of electrical contacts.
    Type: Grant
    Filed: November 8, 2010
    Date of Patent: September 25, 2012
    Assignee: Advanced Micro Devices Inc.
    Inventor: James Hunkins
  • Programmable delay module testing device and methods thereof
    Patent number: 8274272
    Abstract: A data processing device is configured so that, in a test mode of operation, the phase of an output signal of a second programmable delay module (PDM) is based on the phase of the input signal of the first PDM. To test the first and second PDMs, the output signal of the first PDM is set to each of a first set of phases and the corresponding phase of the output signal of the second PDM is compared to determine whether the performance of the first and second PDMs match a specification. Accordingly, the first and second PDMs are qualified based on their relative performance, reducing the need for test structures that consume an undesirably large amount of area.
    Type: Grant
    Filed: February 6, 2009
    Date of Patent: September 25, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Gerald R. Talbot, Hanwoo C. Cho, Brian Amick
  • Technique for providing stress sources in transistors in close proximity to a channel region by recessing drain and source regions
    Patent number: 8274120
    Abstract: By recessing drain and source regions, a highly stressed layer, such as a contact etch stop layer, may be formed in the recess in order to enhance the strain generation in the adjacent channel region of a field effect transistor. Moreover, a strained semiconductor material may be positioned in close proximity to the channel region by reducing or avoiding undue relaxation effects of metal silicides, thereby also providing enhanced efficiency for the strain generation. In some aspects, both effects may be combined to obtain an even more efficient strain-inducing mechanism.
    Type: Grant
    Filed: February 23, 2010
    Date of Patent: September 25, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Andy Wei, Thorsten Kammler, Jan Hoentschel, Manfred Horstmann, Peter Javorka, Joe Bloomquist
  • Vector graphics anti-aliasing
    Patent number: 8269788
    Abstract: A processor unit that can be used in a handheld device and configured for anti-aliasing of a vector graphics image, and including a counter value calculator configured to calculate, for one edge at a time and pixel-by-pixel, counter values for each pixel in a rasterization direction, a counter value recorder configured to store the calculated counter values in an edge buffer, and a pixel coverage value calculator configured to calculate pixel coverage values based on the stored counter values. The calculated pixel coverage values can be utilized for anti-aliasing the vector graphics image, while rasterizing the vector graphics image.
    Type: Grant
    Filed: November 15, 2005
    Date of Patent: September 18, 2012
    Assignee: Advanced Micro Devices Inc.
    Inventor: Mika Tuomi
  • Simple preconfigured client management failsafe
    Patent number: 8271754
    Abstract: A system, method and computer-usable medium are disclosed for recovering data from a memory storage device. The operating system (OS) of an IPS comprising a source memory storage device, further comprising stored data, is monitored to detect a defective operating state. If a defective operating state of the OS is detected, then operation of the IPS is terminated, followed by the initiation of IPS boot operations to recover data from the source memory storage device. The OS is bypassed, and initial boot operations are performed from a management controller or from the BIOS of the IPS. Additional boot operations are performed, and once the IPS has been brought to an operative state, a data recovery module is used to transfer data from the source memory storage device to a target storage device.
    Type: Grant
    Filed: October 5, 2009
    Date of Patent: September 18, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Terry L. Cole, Paul W. Vancil
  • Face detection system for video encoders
    Patent number: 8270476
    Abstract: Embodiments include a codec for use in a videoconferencing or similar system includes a video encoder pipeline that has a pre-processor component that is optimized to detect faces and compress the facial video data in an optimum manner. The codec has a pre-processing step that analyzes each frame on a per macroblock basis to determine the mathematical activity level per block. The activity level calculation is used as a parameter to the bitrate control module of the encoder to control the quantization, and thus the fine grained quality of the output data. An object detection module (e.g., a face detector) is placed in the pre-processing step. The object detection data is then combined with the activity level and object detection certainty value through a combinatorial algorithm comprising a weighted average or normalized multiplication process.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: September 18, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Michael L. Schmit, Raja Koduri, Carrell Ray Killebrew
  • Digital phase-locked loop
    Patent number: 8269533
    Abstract: Apparatus, systems and methods are provided for digital phase-locked loops. A digital phase-locked loop comprises an oscillator module configured to generate an output signal and a phase detection module coupled to the oscillator module. The phase detection module is configured to signal the oscillator module to adjust a frequency of the output signal by a first amount when a phase difference between a reference signal and the output signal is less than a threshold amount, and signal the oscillator module to adjust the frequency by a greater amount when the phase difference is greater than the threshold amount.
    Type: Grant
    Filed: September 3, 2010
    Date of Patent: September 18, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Sanjeev Maheshwari, Emerson Fang
  • ACCESSIBILITY OF GRAPHICS PROCESSING COMPUTE RESOURCES
    Publication number: 20120229481
    Abstract: A method, system, and computer program product are disclosed for providing improved access to accelerated processing device compute resources to user mode applications. The functionality disclosed allows user mode applications to provide commands to an accelerated processing device without the need for kernel mode transitions in order to access a unified ring buffer. Instead, applications are each provided with their own buffers, which the accelerated processing device hardware can access to process commands. With full operating system support, user mode applications are able to utilize the accelerated processing device in much the same way as a CPU.
    Type: Application
    Filed: December 2, 2011
    Publication date: September 13, 2012
    Applicants: ATI Technologies ULC, Advanced Micro Devices, Inc.
    Inventors: Rex McCrary, Michael Clair Houston, Philip J. Rogers, Gongxian Jeffrey Cheng, Mark Hummel, Charles Roberts Moore, Leendert Peter Van Doorn, Paul Blinzer
  • Method for forming semiconductor devices with active silicon height variation
    Patent number: 8263453
    Abstract: A method far farming different active thicknesses on the same silicon layer includes masking the silicon layer and exposing selected regions of the silicon layer. The thickness of the silicon layer at the exposed regions is changed, either by adding silicon or subtracting silicon from the layer at the exposed regions. Once the mask is removed, the silicon layer has regions of different active thicknesses, respectively suitable for use in different types of devices, such as diodes and transistors.
    Type: Grant
    Filed: July 15, 2011
    Date of Patent: September 11, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: David E. Brown, Hans Van Meer, Sey-Ping Sun
  • Display underflow prevention
    Patent number: 8264495
    Abstract: In devices in which display data is read from a memory for display, display underflow in a processing block is alleviated by controlling a clock frequency driving the processing block. Stages of the processing block send underflow detection signals to underflow prevention logic. The underflow prevention logic controls the frequencies of clock signals generated by a clock generator to alleviate the underflow condition.
    Type: Grant
    Filed: October 23, 2007
    Date of Patent: September 11, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Oleksandr Khodorkovsky, Mahendra Persaud
  • Identification of critical enables using MEA and WAA metrics
    Patent number: 8266569
    Abstract: A plurality of sequential nodes in a design file for an electronic device are identified and one or more combinatorial power metric values are computed for the plurality of sequential nodes based upon an effective switching capacitance, a switching activity measure, and a power effort measure for at least a first device downstream from the each sequential node at a specified depth. The combinatorial power metric values for the plurality of sequential node are stored and compared to a target power metric value to determine if power consumption at the electronic device meets a predetermined power performance goal.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: September 11, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Vasant Palisetti, Rachida Kebichi, Samuel Naffziger
  • Hierarchical memory arbitration technique for disparate sources
    Patent number: 8266389
    Abstract: A hierarchical memory request stream arbitration technique merges coherent memory request streams from multiple memory request sources and arbitrates the merged coherent memory request stream with requests from a non-coherent memory request stream. In at least one embodiment of the invention, a method of generating a merged memory request stream from a plurality of memory request streams includes merging coherent memory requests into a first serial memory request stream. The method includes selecting, by a memory controller circuit, a memory request for placement in the merged memory request stream from at least the first serial memory request stream and a merged non-coherent request stream. The merged non-coherent memory request stream is at least partially based on an indicator of a previous memory request selected for placement in the merged memory request stream.
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: September 11, 2012
    Assignees: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Guhan Krishnan, Antonio Asaro, Don Cherepacha, Thomas R. Kunjan, Joerg Winkler, Ralf Flemming, Maurice B. Steinman, Jonathan Owen, John Kalamatianos
  • Static RAM cell design and multi-contact regime for connecting double channel transistors
    Patent number: 8264020
    Abstract: A static RAM cell may be formed on the basis of two double channel transistors and a select transistor, wherein a body contact may be positioned laterally between the two double channel transistors in the form of a dummy gate electrode structure, while a further rectangular contact may connect the gate electrodes, the source regions and the body contact, thereby establishing a conductive path to the body regions of the transistors. Hence, compared to conventional body contacts, a very space-efficient configuration may be established so that bit density in static RAM cells may be significantly increased.
    Type: Grant
    Filed: April 11, 2012
    Date of Patent: September 11, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Frank Wirbeleit
  • Reducing simultaneous switching outputs using data bus inversion signaling
    Patent number: 8260992
    Abstract: An apparatus includes a plurality of data lines defining a data bus for communicating data. A controller is operable to communicate a plurality of data transfers over the data bus using a plurality of data time slots, wherein for at least a subset of the data time slots the controller is operable to communicate an associated data bus inversion indicator indicating that bits communicated during the associated data time slot are inverted, the data bus inversion indicators for the subset of the data transfers are grouped into a data bus inversion vector, and the controller is operable to communicate a global data bus inversion indicator indicating an inversion of the data bus inversion vector.
    Type: Grant
    Filed: April 12, 2010
    Date of Patent: September 4, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Glenn A. Dearth, Shwetal A. Patel
  • Merged shader for primitive amplification
    Patent number: 8259111
    Abstract: A method, computer program product, and system are provided for processing data in a graphics pipeline. An embodiment of the method includes processing one or more vertices of a geometric primitive with a vertex shader function and generating new primitive information for the one or more processed vertices with a geometry shader function. The geometry shader function receives one or more processed vertices from the vertex shader function and emits a single vertex associated with the new primitive information. Each emitted vertex from the geometry shader function can be stored in a memory device. Unlike conventional graphic pipelines that require a memory device for data storage during the vertex and geometry shading processes, the present invention increases efficiency in the graphics pipeline by eliminating the need to access memory when the vertex and geometry shaders process vertex information.
    Type: Grant
    Filed: August 4, 2008
    Date of Patent: September 4, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Vineet Goel, Todd Martin
  • Handshake structure for improving layout density
    Patent number: 8258578
    Abstract: A semiconductor device includes a gate on a semiconductor substrate. One side wall of the gate may include at least one protrusion and an opposite side wall of the gate may include at least one depression. A contact is formed through an insulating layer disposed over the gate. The contact at least partially overlaps at least one of the protrusions in the gate. A metal layer is disposed on the insulating layer. The metal layer includes a first structure shifted to a first side of the gate. The first structure at least partially overlaps the contact such that the contact electrically couples the first structure to the gate through the insulating layer.
    Type: Grant
    Filed: August 31, 2009
    Date of Patent: September 4, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Andrew E. Carlson