Abstract: By performing a plasma treatment for efficiently sealing the surface of a stressed dielectric layer containing silicon nitride, an enhanced performance during the patterning of contact openings may be achieved, since nitrogen-induced resist poisoning may be significantly reduced during the selective patterning of stressed layers of different types of intrinsic stress.

Abstract: A method for maintaining atomicity of a sequence of instructions includes a processor requesting exclusive access to a given memory resource. The request may include executing a critical section of code having memory reference instructions each including a LOCK prefix, and the memory reference instructions may be followed by an ACQUIRE instruction. The method also includes comparing each memory address of the critical section of code to each address of sets of addresses in response to execution of the ACQUIRE instruction. Each address of the sets of addresses corresponds to a respective memory resource to which a requester has exclusive access. In response to any memory address of the critical section of code matching any address of the sets of addresses, the method includes causing the ACQUIRE instruction to fail, and inhibiting modifying data corresponding to any memory address in an atomic phase of the critical section of code.

Abstract: In one example an electronic device includes a housing that includes an A/C input or DC input, and at least one circuit substrate that includes electronic circuitry, such as graphics processing circuitry that receives power based on the A/C input or DC input. The electronic device also includes a divided multi-connector element differential bus connector that is coupled to the electronic circuitry. The divided multi-connector element differential bus connector includes a single housing that connects with the circuit substrate and the connector housing includes therein a divided electronic contact configuration comprised of a first group of electrical contacts divided from an adjacent second group of mirrored electrical contacts wherein each group of electrical connects includes a row of at least lower and upper contacts. In one example, the electronic device housing includes air flow passages, such as grills, adapted to provide air flow through the housing.

Abstract: In one embodiment, an input/output (I/O) node comprises an I/O memory management unit (IOMMU) configured to translate memory requests. The I/O node is configured to couple to an interconnect and to operate as a tunnel on the interconnect, and wherein the IOMMU is configured translate memory requests passing through the tunnel in the upstream direction. In another embodiment, a system comprises another I/O node configured to bridge another interconnect to the interconnect, wherein the I/O node is the tunnel for the other I/O node.

Abstract: By forming isolation trenches of different types of intrinsic stress on the basis of separate process sequences, the strain characteristics of adjacent active semiconductor regions may be adjusted so as to obtain overall device performance. For example, highly stressed dielectric fill material including compressive and tensile stress may be appropriately provided in the respective isolation trenches in order to correspondingly adapt the charge carrier mobility of respective channel regions.

Abstract: An advanced process control (APC) architecture comprising a process model that incorporates a target offset term is provided. The APC architecture may be applied to a so-called develop inspect critical dimension (DICD) model using the target offset term to correct at least one exposure parameter on the occurrence of an abrupt event. A corresponding event may, for example, concern a modified reflectivity of processed substrates, for example due to a rework of substrates covered by amorphous carbon material.

Abstract: A hardware-based aperture compression system permits addressing large memory spaces via a limited bus aperture. Streams are assigned dynamic base addresses (BAR) that are maintained in registers on sources and destinations. Requests for addresses lying between BAR and BAR plus the size of the bus aperture are sent with BAR subtracted off by the source and added back by the destination. Requests for addresses outside that range are handled by transmitting a new, adjusted BAR before sending the address request.

Abstract: Embodiments include a video data encoding method comprising receiving video input frames, and performing motion estimation on the video received frames. The motion estimation comprises performing a hierarchical motion search to find motion vectors with optimum sum of absolute difference (SAD) values, and performing spatial filtering of the motion vectors, wherein spatial filtering comprises making some pairs of motion vectors the same to achieve a zero differential.

Abstract: By using weighted entity states for representing a state of a cluster tool, a highly efficient technique for the measurement and monitoring of cluster tool characteristics, such as reliability, availability and maintainability, is provided. For example, individual entities of the cluster tool may be weighted according to their capacity and corresponding entity states may be ranked in accordance with a predefined hierarchy structure, thereby enabling an efficient combination of weighted entity states so as to represent the cluster tool state.

Abstract: In one illustrative embodiment, the method comprises forming a gate electrode above an SOI substrate comprised of a bulk substrate, a buried insulation layer and an active layer, the gate electrode having a protective layer formed thereabove, and forming a plurality of dielectric regions in the bulk substrate after the gate electrode is formed, the dielectric regions being self-aligned with respect to the gate electrode, the dielectric regions having a dielectric constant that is less than a dielectric constant of the bulk substrate.

Abstract: By incorporating an atomic species of increased covalent radius, which may at least partially substitute germanium, a highly efficient strain mechanism may be provided, in which the risk of stress relief due to germanium conglomeration and lattice defects may be reduced. The atomic species of increased radius, such as tin, may be readily incorporated by epitaxial growth techniques on the basis of tin hydride.

Abstract: Various method and apparatus for packaging an integrated circuit are provided. In one aspect, a method of packaging an integrated circuit is provided that includes coupling an integrated circuit to a substrate, mixing an adhesive with a plurality of particles, and coupling a lid to the substrate with the adhesive. At least a portion of the plurality of particles in the adhesive oppose compressive force from the lid to restrict rotation of the lid relative to the substrate.

Abstract: A multiple operating mode transistor is provided in which multiple channels having different respective operational characteristics are employed. Multiple channels have threshold voltages that are independently adjustable. The independent adjustment of the threshold voltage includes providing at least one of different respective doping concentrations in the different channels, different respective gate dielectric thicknesses for the different gate dielectrics separating the channels, and different respective silicon channel thicknesses for the different channels.

Abstract: Improved security processing circuits are discussed which may be used alone or as part of a network interface device of a host system using a DES engine to accomplish 3DES processing. The security processing circuit is adapted for selectively encrypting outgoing data and decrypting incoming data, where the network interface device may be fabricated as a single integrated circuit chip. The improved circuit makes use of a unique circuit component arrangement to provide shortened path timings within the DES engine processing. To accomplish this overall timing performance improvement, the permutation and inverse permutation blocks are removed from these critical path timings of the three individual DES processing operations, and moved to the beginning and end of the 3DES process.

Abstract: A receive interface circuit includes a duty cycle adjustment circuit that adjusts the duty cycle of a reference clock signal based, at least in part, on a selected number of duty cycle adjustment units and a selected range of duty cycle adjustment. The duty cycle adjustment circuit may select as the reference clock signal one of a clock signal and at least a lower version of the clock signal in parallel with the duty cycle adjustment.

Abstract: A method includes forming a first rectangular mesa from a layer of semiconducting material and forming a first dielectric layer around the first mesa. The method further includes forming a first rectangular mask over a first portion of the first mesa leaving an exposed second portion of the first mesa and etching the exposed second portion of the first mesa to produce a reversed T-shaped fin from the first mesa.

Abstract: A method includes providing an initial IC device design, which design has a desired set of electrical characteristics. A layout representation corresponding to the initial device design is generated. A simulation tool is used to determine whether the layout representation corresponds to an IC device design having the desired electrical characteristics. In addition, the variation between structures within IC device designed due to process variations is evaluated using the simulation tool. This variation can be used to determine whether the design is optimized.

Abstract: An apparatus and method are disclosed for providing higher radix redundant digit lookup tables for digital lookup table circuits. A compressed direct lookup table unit accesses a redundant digits lookup table that is capable of providing a high order part and a low order part that can be directly concatenated to form an output numeric value. The redundant digits lookup table of the invention is structured so that no output overflow exceptions are created. A redundant digits lookup table recoder capable of providing recoded output values directly to partial product generators of a multiplier unit is also disclosed.

Abstract: A method for estimating a state associated with a process includes receiving a state observation associated with the process. The state observation has an associated process time. A weighting factor to discount the state observation is generated based on the process time. A state estimate is generated based on the discounted state observation. A system includes a process tool, a metrology tool, and a process controller. The process tool is operable to perform a process in accordance with an operating recipe. The metrology tool is operable to generate a state observation associated with the process. The process controller is operable to receive the state observation, the state observation having an associated process time, generate a weighting factor to discount the state observation based on the process time, generate a state estimate based on the discounted state observation, and determine at least one parameter of the operating recipe based on the state estimate.

Abstract: In an embodiment, a computer system comprises a processor; a memory management module comprising a plurality of instructions executable on the processor; a memory coupled to the processor; and an input/output memory management unit (IOMMU) coupled to the memory. The IOMMU is configured to implement address translation and memory protection for memory operations sourced by one or more input/output (I/O) devices. The memory stores a command queue during use. The memory management module is configured to write one or more control commands to the command queue, and the IOMMU is configured to read the control commands from the command queue and execute the control commands.