Abstract: The subject application discloses a substrate. The substrate includes a first conductive layer, a first bonding layer, a first dielectric layer, and a conductive via. The first bonding layer is disposed on the first conductive layer. The first dielectric layer is disposed on the first bonding layer. The conductive via penetrates the first dielectric layer and is electrically connected with the first conductive layer.
Type:
Application
Filed:
November 29, 2022
Publication date:
March 23, 2023
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: The present disclosure provides an antenna module including a substrate, a first antenna disposed on the substrate and a second antenna disposed on the substrate and spaced apart from the first antenna. The first antenna is configured to have a first operating frequency and the second antenna is configured to have a second operating frequency different from the first operating frequency. The antenna module further includes an element configured to focus an electromagnetic wave transmitted or received by the first antenna and the second antenna. A semiconductor device package is also disclosed.
Type:
Application
Filed:
November 29, 2022
Publication date:
March 23, 2023
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: A leadframe includes a first conductive layer, a plurality of conductive pillars and a first package body. The first conductive layer has a first surface and a second surface opposite to the first surface. The plurality of conductive pillars are disposed on the first surface of the first conductive layer. The first package body is disposed on the first surface of the first conductive layer and covers the conductive pillars. The conductive pillars and the first conductive layer are integratedly formed.
Type:
Grant
Filed:
October 16, 2019
Date of Patent:
March 21, 2023
Assignee:
ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a device package and a shielding layer. The device package includes an electronic device unit and has a first surface, a second surface opposite to the first surface, and a third surface connecting the first surface to the second surface. The shielding layer is disposed on the first surface and the second surface of the device package. A common edge of the second surface and the third surface includes a first portion exposed from the shielding layer by a first length, and a common edge of the first surface and the third surface includes a second portion exposed from the shielding layer by a second length that is different from the first length.
Type:
Application
Filed:
November 18, 2022
Publication date:
March 16, 2023
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: An optoelectronic device includes a carrier, an electronic component, a photonic component and a supportive component. The electronic component is electrically coupled to the carrier. The photonic component is electrically coupled to the electronic component. The supportive component is disposed outside the photonic component and the electronic component and configured to support an optical component.
Type:
Application
Filed:
September 10, 2021
Publication date:
March 16, 2023
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: A photonic package and a method of manufacturing a photonic package are provided. The photonic package includes a carrier, an electronic component, and a photonic component. The carrier has a first surface and a recess portion exposed from the first surface. The electronic component is disposed in recessed portion. The photonic component is disposed on and electrically connected to the electronic component and is configured to communicate optical signals.
Type:
Application
Filed:
September 10, 2021
Publication date:
March 16, 2023
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: A semiconductor device package includes a glass carrier, a package body, a first circuit layer and a first antenna layer. The glass carrier has a first surface and a second surface opposite to the first surface. The package body is disposed on the first surface of the glass carrier. The package body has an interconnection structure penetrating the package body. The first circuit layer is disposed on the package body. The first circuit layer has a redistribution layer (RDL) electrically connected to the interconnection structure of the package body. The first antenna layer is disposed on the second surface of the glass carrier.
Type:
Grant
Filed:
August 19, 2019
Date of Patent:
March 14, 2023
Assignee:
ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a first passivation layer, a first metal layer and a first semiconductor die. The first metal layer is embedded in the first passivation layer. The first metal layer defines a first through-hole. The first semiconductor die is disposed on the first passivation layer.
Type:
Grant
Filed:
April 17, 2020
Date of Patent:
March 14, 2023
Assignee:
ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Abstract: A semiconductor device package includes a substrate having a surface, a conductive element disposed on the surface of the substrate, and an encapsulant disposed on the surface of the substrate and covering the conductive element. The conductive element has an upper surface facing away from the substrate and exposed from the encapsulant. Further, a roughness of the upper surface of the conductive element is greater than a roughness of a side surface of the conductive element.
Type:
Grant
Filed:
April 17, 2020
Date of Patent:
March 14, 2023
Assignee:
ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Inventors:
Wei Da Lin, Meng-Jen Wang, Hung Chen Kuo, Wen Jin Huang
Abstract: A semiconductor device package and a method for manufacturing the semiconductor device package are provided. The electronic device includes a first carrier having a first surface, an interposer disposed over the first surface of the first carrier, wherein the interposer has a first thickness and a second thickness in a direction substantially perpendicular to the first surface of the first carrier; and a plurality of electrical connections between the first carrier and the interposer and configured to compensate a difference between the first thickness and the second thickness of the interposer.
Type:
Application
Filed:
September 3, 2021
Publication date:
March 9, 2023
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: The present disclosure provides an optical adaptive device and a wearable device. The optical adaptive device includes a carrier, a first light adjusting element, and a second light adjusting element. The first light adjusting element is in or on the carrier and configured to focus a first light from a first article on a visual area. The second light adjusting element is in or on the carrier and configured to focus a second light from a second article on the visual area. The second article is further away from the area than the first article.
Type:
Application
Filed:
September 3, 2021
Publication date:
March 9, 2023
Applicant:
Advanced Semiconductor Engineering, Inc.
Inventors:
Ko-Fan TSAI, Tien-Chia LIU, Kuo Sin HUANG, Cheng-Te CHOU
Abstract: A semiconductor package structure includes a plurality of transducer devices, a cap structure, at least one redistribution layer (RDL) and a protection material. The transducer devices are disposed side by side. Each of the transducer devices has at least one transducing region, and includes a die body and at least one transducing element. The die body has a first surface and a second surface opposite to the first surface. The transducing region is disposed adjacent to the first surface of the die body. The transducing element is disposed adjacent to the first surface of the die body and within the transducing region. The cap structure covers the transducing region of the transducer device to form an enclosed space. The redistribution layer (RDL) electrically connects the transducer devices. The protection material covers the transducer devices.
Type:
Application
Filed:
November 15, 2022
Publication date:
March 9, 2023
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: A semiconductor device package includes a first circuit layer, a second circuit layer, a first semiconductor die and a second semiconductor die. The first circuit layer includes a first surface and a second surface opposite to the first surface. The second circuit layer is disposed on the first surface of the first circuit layer. The first semiconductor die is disposed on the first circuit layer and the second circuit layer, and electrically connected to the first circuit layer and the second circuit layer. The second semiconductor die is disposed on the second circuit layer, and electrically connected to the second circuit layer.
Type:
Grant
Filed:
July 31, 2019
Date of Patent:
March 7, 2023
Assignee:
ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Abstract: An apparatus for deformation measurement and a method for deformation measurement are provided. The apparatus includes a housing, a sample holder, a moving mechanism, a first heating device and a second heating device. The sample holder is in the housing. The moving mechanism is over the sample holder. The first heating device is on the moving mechanism. The second heating device is below the sample holder.
Type:
Grant
Filed:
August 31, 2020
Date of Patent:
March 7, 2023
Assignee:
ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Abstract: A semiconductor device and a semiconductor package including the same are provided. The semiconductor device includes a semiconductor element; a protective layer disposed adjacent to the surface of the semiconductor element, the protective layer defining an opening to expose the semiconductor element; a first bump disposed on the semiconductor element; and a second bump disposed onto the surface of the protective layer. The first bump has a larger cross-section surface area than the second bump.
Type:
Grant
Filed:
March 22, 2019
Date of Patent:
March 7, 2023
Assignee:
ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Abstract: A semiconductor device package includes a substrate and an antenna module. The substrate has a first surface and a second surface opposite to the first surface. The antenna module is disposed on the first surface of the substrate with a gap. The antenna module has a support and an antenna layer. The support has a first surface facing away from the substrate and a second surface facing the substrate. The antenna layer is disposed on the first surface of the support. The antenna layer has a first antenna pattern and a first dielectric layer.
Type:
Grant
Filed:
July 9, 2019
Date of Patent:
March 7, 2023
Assignee:
ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Inventors:
Cheng-Lin Ho, Chih-Cheng Lee, Chun Chen Chen, Yuanhao Yu
Abstract: An optoelectronic device includes a carrier, an electronic component, a photonic component and a supportive component. The electronic component is electrically coupled to the carrier. The photonic component is electrically coupled to the electronic component. The supportive component is disposed outside the photonic component and the electronic component and configured to support an optical component.
Type:
Grant
Filed:
September 10, 2021
Date of Patent:
March 7, 2023
Assignee:
ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Abstract: An electronic package structure, an electronic substrate, and a method of manufacturing an electronic package structure are provided. The electronic package structure includes a substrate. The substrate includes a bonding region and an alignment structure. The bonding region is located at a side of the substrate and configured to bond with an electronic component. The alignment structure is located at the side of the substrate and out of the bonding region and configured to providing a fiducial mark for position-aligning, wherein the alignment structure comprises a first region and a second region visually distinct from the first region.
Type:
Application
Filed:
August 27, 2021
Publication date:
March 2, 2023
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: An electronic device and a method for manufacturing the same are provided. The electronic device includes a carrier, an antenna element and a cladding element. The carrier defines a first area and a second area adjacent to the first area. The antenna element is in the first area. The cladding element covers the antenna element and is configured for enhancing antenna gain of the antenna element. The second area is exposed from the cladding element and is distant from the antenna element.
Type:
Application
Filed:
August 27, 2021
Publication date:
March 2, 2023
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: The present disclosure provides an optical module. The optical module includes an optical component disposed in or on a carrier and configured to receive a first light. The optical component is further configured to transmit a second light to a first portion of the carrier and transmit a third light to a second portion of the carrier.
Type:
Application
Filed:
September 2, 2021
Publication date:
March 2, 2023
Applicant:
Advanced Semiconductor Engineering, Inc.