Patents Assigned to Advanced Semiconductor Engineering
  • Publication number: 20220115425
    Abstract: An optical package structure and a method for manufacturing an optical package structure are provided. The optical package structure includes a sensor, an optical component and a fixing element. The optical component directly contacts the sensor. An interfacial area is defined by a contacting region of the optical component and the sensor. The fixing element is disposed outside of the interfacial area for bonding the optical component and the sensor.
    Type: Application
    Filed: October 8, 2020
    Publication date: April 14, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Ling HUANG, Lu-Ming LAI, Ying-Chung CHEN
  • Publication number: 20220115339
    Abstract: An antenna package includes a conductive layer, an interconnection structure and an antenna. The interconnection structure is disposed on the conductive layer. The interconnection structure includes a conductive via and a first package body. The conductive via has a first surface facing the conductive layer, a second surface opposite to the first surface and a lateral surface extending from the first surface to the second surface. The first package body covers the lateral surface of the conductive via and exposes the first surface and the second surface of the conductive via. The first package body is spaced apart from the conductive layer. The antenna is electrically connected to the second surface of the conductive via.
    Type: Application
    Filed: October 9, 2020
    Publication date: April 14, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yu-Lin SHIH, Chih-Cheng LEE
  • Publication number: 20220108932
    Abstract: A semiconductor package structure, an electronic device, and method for manufacturing the same are provided. The semiconductor package structure includes a wiring structure, a first electronic device, a second electronic device, and a protection material. The first electronic device is disposed on the wiring structure. The second electronic device is disposed on the wiring structure. The second electronic device defines a plurality of recesses on a first lateral side surface thereof. The protection material is disposed on the wiring structure and encapsulates the recesses of the second electronic device.
    Type: Application
    Filed: October 5, 2020
    Publication date: April 7, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Syu-Tang LIU, Min Lung HUANG
  • Publication number: 20220108826
    Abstract: An electronic device and a method for manufacturing an electronic device are provided. The electronic device includes an inductor. The inductor includes a plurality of line portions and a plurality of plate portions connected to the plurality of line portions. The line portions and the plate portions form a coil concentric to a horizontal axis.
    Type: Application
    Filed: October 7, 2020
    Publication date: April 7, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yunghsun CHEN, Huang-Hsien CHANG, Shao Hsuan CHUANG
  • Publication number: 20220102176
    Abstract: A wafer supporting mechanism and a method for wafer dicing are provided. The wafer supporting mechanism includes a base portion and a support portion. The base portion includes a first gas channel and a first outlet connected to the first gas channel. The support portion is connected to the base portion and including a second gas channel connected to the first gas channel. An accommodation space is defined by the base portion and the support portion.
    Type: Application
    Filed: September 30, 2020
    Publication date: March 31, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Bo Hua CHEN, Yan Ting SHEN, Fu Tang CHU, Wen-Pin HUANG
  • Publication number: 20220102233
    Abstract: An electronic package and method for manufacturing the same are provided. The electronic package includes a first conductive structure, a second conductive structure, an electronic component, an underfill and a dam structure. The second conductive structure is disposed on the first conductive structure, wherein the second conductive structure defines a cavity over the first conductive structure. The electronic component is disposed on the first conductive structure and at least partially disposed in the cavity. The underfill is disposed between the first conductive structure and the electronic component. The dam structure is disposed on the first conductive structure and configured to confine the underfill.
    Type: Application
    Filed: September 30, 2020
    Publication date: March 31, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Chung-Yuan TSAI
  • Publication number: 20220102453
    Abstract: A semiconductor device package includes a display device, an electronic module and a conductive adhesion layer. The display device includes a first substrate and a TFT layer. The first substrate has a first surface and a second surface opposite to the first surface. The TFT layer is disposed on the first surface of the first substrate. The electronic module includes a second substrate and an electronic component. The second substrate has a first surface facing the second surface of the first substrate and a second surface opposite to the first surface. The electronic component is disposed on the second surface of the second substrate. The conductive adhesion layer is disposed between the first substrate and the second substrate.
    Type: Application
    Filed: December 13, 2021
    Publication date: March 31, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ming-Hung CHEN, Sheng-Yu CHEN, Chang-Lin YEH, Yung-I YEH
  • Publication number: 20220093548
    Abstract: A semiconductor package is provided. The semiconductor package includes a first conductive layer, a plurality of first conductive pads, a plurality of second conductive pads, and a first dielectric layer. The first conductive pads are electrically connected to the first conductive layer. The second conductive pads are electrically disconnected from the first conductive layer.
    Type: Application
    Filed: September 23, 2020
    Publication date: March 24, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Pei-Jen LO, Shun-Tsat TU, Cheng-En WENG
  • Publication number: 20220093528
    Abstract: A package structure and a method for manufacturing the same are provided. The package structure includes a redistribution structure, a first electronic device, at least one second electronic device, a protection material, a heat dissipation structure and a reinforcement structure. The first electronic device is disposed on the redistribution structure. The second electronic device is disposed on the redistribution structure. The protection material is disposed between the first electronic device and the second electronic device. The heat dissipation structure is disposed on the first electronic device and the second electronic device. The reinforcement structure is disposed in an accommodating space between the heat dissipation structure and the protection material.
    Type: Application
    Filed: September 18, 2020
    Publication date: March 24, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Ian HU
  • Publication number: 20220095462
    Abstract: A package substrate and manufacturing method thereof are provided. The package substrate includes a substrate and an electronic component. The substrate includes a cavity. The electronic component is disposed in the cavity. The electronic component includes a first region and a second region, and an optical recognition rate of the first region is distinct from that of the second region.
    Type: Application
    Filed: September 18, 2020
    Publication date: March 24, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wu Chou HSU, Hsing Kuo TIEN, Chih-Cheng LEE, Min-Yao CHEN
  • Publication number: 20220084951
    Abstract: A bonding structure is provided. The bonding structure includes a conductive layer, a seed layer, and a nanotwinned copper (NT-Cu) layer. The seed layer is disposed on the conductive layer. The NT-Cu layer is disposed on the seed layer. The NT-Cu layer has anisotropic crystal structure.
    Type: Application
    Filed: September 16, 2020
    Publication date: March 17, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Shun-Tsat TU, Pei-Jen LO, Chien-Han CHIU
  • Publication number: 20220084926
    Abstract: A substrate structure, a method for manufacturing the same and a semiconductor device structure including the same are provided. The substrate structure includes a heat pipe, a first conductive layer and an insulation layer. The heat pipe has an upper surface and a lower surface. The heat pipe includes an opening extending from the upper surface to the lower surface. The first conductive layer is disposed on the upper surface and includes a via structure passing through the opening. The insulation layer is disposed between the heat pipe and the conductive layer.
    Type: Application
    Filed: September 11, 2020
    Publication date: March 17, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ian HU, Jin-Feng YANG, Cheng-Yu TSAI, Hung-Hsien HUANG
  • Publication number: 20220084972
    Abstract: An electronic device package includes a circuit layer, a first semiconductor die, a second semiconductor die, a plurality of first conductive structures and a second conductive structure. The first semiconductor die is disposed on the circuit layer. The second semiconductor die is disposed on the first semiconductor die, and has an active surface toward the circuit layer. The first conductive structures are disposed between a first region of the second semiconductor die and the first semiconductor die, and electrically connecting the first semiconductor die to the second semiconductor die. The second conductive structure is disposed between a second region of the second semiconductor die and the circuit layer, and electrically connecting the circuit layer to the second semiconductor die.
    Type: Application
    Filed: November 23, 2021
    Publication date: March 17, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Mei-Ju LU, Chi-Han CHEN, Chang-Yu LIN, Jr-Wei LIN, Chih-Pin HUNG
  • Publication number: 20220084958
    Abstract: A semiconductor device package comprises a semiconductor device, a first encapsulant surrounding the semiconductor device, a second encapsulant covering the semiconductor device and the first encapsulant, and a redistribution layer extending through the second encapsulant and electrically connected to the semiconductor device.
    Type: Application
    Filed: November 29, 2021
    Publication date: March 17, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Peng YANG, Yuan-Feng CHIANG, Po-Wei LU
  • Publication number: 20220084914
    Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a lead frame and passive component. The lead frame includes a paddle and a plurality of leads. The lead frame includes a first surface and a second surface opposite to the first surface. The passive component includes an external connector. A pattern of the external connector is corresponding to a pattern of the plurality of leads of the lead frame.
    Type: Application
    Filed: September 16, 2020
    Publication date: March 17, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi-Tsung CHIU, Hui-Ying HSIEH, Chun Hao CHIU, Chiuan-You DING
  • Publication number: 20220077326
    Abstract: A package structure is provided. The package structure includes a substrate, a sensor device, an encapsulant and a signal blocking structure. The substrate has a signal passing area. The sensor device is disposed over the substrate. The sensor device has a first surface, a second surface opposite to the first surface and a sensing area located at the second surface. The second surface of the sensor device faces the substrate. The encapsulant covers the sensor device and the substrate. The signal blocking structure extends from the substrate into the encapsulant.
    Type: Application
    Filed: September 4, 2020
    Publication date: March 10, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chun Yu KO, Tsu-Hsiu WU, Meng-Jen WANG
  • Publication number: 20220077837
    Abstract: A wearable device and method for operating the same are provided. The wearable device includes an antenna element, a first matching circuit, a second matching circuit, and a switch element. The first matching circuit has a first impedance value. The second matching circuit has a second impedance value different from the first impedance value. The switch element is configured to determine whether the antenna element is electrically connected with the first matching circuit or the second matching circuit.
    Type: Application
    Filed: September 4, 2020
    Publication date: March 10, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yuanhao YU, Weifan WU, Tingyen CHANG, Mingjhih TSAI, Fengchuan TSAI
  • Publication number: 20220077364
    Abstract: A semiconductor package is provided in the present disclosure. The semiconductor package comprises: a substrate, an electronic device disposed on the substrate, a lid disposed on the substrate and surrounding the electronic device an encapsulant formed over the substrate, encapsulating the electronic device and the lid; and a plurality of fillers in the encapsulant, configured to diffuse light interacting with the electronic device. In this way, through the use of the encapsulant including the fillers distributed therein, additional optical filters and diffusers are not needed. Also, through the use of the lid, undesired stray light can be prevented from being interacting with the electronic device.
    Type: Application
    Filed: September 9, 2020
    Publication date: March 10, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wei-Tang CHU, Tsu-Hsiu WU, Chun Yu KO
  • Publication number: 20220068865
    Abstract: A semiconductor device includes a semiconductor die having a first surface and a second surface opposite to the first surface, a plurality of first real conductive pillars in a first region on the first surface, and a plurality of supporters in a second region adjacent to the first region. An area density of the plurality of supporters in the second region is in a range of from about 50% to about 100% to an area density of the plurality of first real conductive pillars in the first region. A method for manufacturing a semiconductor package including the semiconductor device is also disclosed in the present disclosure.
    Type: Application
    Filed: November 9, 2021
    Publication date: March 3, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Hsin He HUANG
  • Publication number: 20220065608
    Abstract: An apparatus for deformation measurement and a method for deformation measurement are provided. The apparatus includes a housing, a sample holder, a moving mechanism, a first heating device and a second heating device. The sample holder is in the housing. The moving mechanism is over the sample holder. The first heating device is on the moving mechanism. The second heating device is below the sample holder.
    Type: Application
    Filed: August 31, 2020
    Publication date: March 3, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsuan-Yu CHEN, Ming-Han WANG