Patents Assigned to Advanced Semiconductor Engineering
  • WEARABLE COMPONENT, EAR TIP, AND METHOD OF MANUFACTURING A WEARABLE COMPONENT
    Publication number: 20230199362
    Abstract: The present disclosure provides a wearable component. The wearable component includes a first carrier and a first electronic component at least partially embedded within the first carrier. The first carrier and the first electronic component define a space configured for audio transmission. An ear tip and a method of manufacturing a wearable component are also provided.
    Type: Application
    Filed: December 22, 2021
    Publication date: June 22, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chang Yi WU, Hung Yi LIN, Jenchun CHEN
  • WAFER SUPPORTING MECHANISM AND METHOD FOR WAFER DICING
    Publication number: 20230197487
    Abstract: A wafer supporting mechanism and a method for wafer dicing are provided. The wafer supporting mechanism includes a base portion and a support portion. The base portion includes a first gas channel and a first outlet connected to the first gas channel. The support portion is connected to the base portion and including a second gas channel connected to the first gas channel. An accommodation space is defined by the base portion and the support portion.
    Type: Application
    Filed: February 21, 2023
    Publication date: June 22, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Bo Hua CHEN, Yan Ting SHEN, Fu Tang CHU, Wen-Pin HUANG
  • ELECTRONIC MODULE HAVING TRANSDUCERS RADIATING ULTRASONIC WAVES
    Publication number: 20230199378
    Abstract: An electronic module is provided. The electronic module includes a first transducer and a second transducer. The first transducer is configured to radiate a first ultrasonic wave. The second transducer is configured to radiate a second ultrasonic wave. The first transducer and the second transducer are disposed on noncoplanar surfaces.
    Type: Application
    Filed: February 14, 2023
    Publication date: June 22, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chih Lung LIN, Kuei-Hao TSENG, Kai Hung WANG
  • Semiconductor structure
    Patent number: 11682660
    Abstract: The present disclosure provides a semiconductor structure including a first substrate having a first surface, a first semiconductor device package disposed on the first surface of the first substrate, and a second semiconductor device package disposed on the first surface of the first substrate. The first semiconductor device package and the second semiconductor device package have a first signal transmission path through the first substrate and a second signal transmission path insulated from the first substrate. The present disclosure also provides an electronic device.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: June 20, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yuanhao Yu, Chun Chen Chen, Shang Chien Chen
  • Semiconductor device package
    Patent number: 11682601
    Abstract: The present disclosure provides a semiconductor device package including a first device, a second device, and a spacer. The first device includes a substrate having a first dielectric constant. The second device includes a dielectric element, an antenna, and a reinforcing element. The dielectric element has a second dielectric constant less than the first dielectric constant. The antenna is at least partially within the dielectric element. The reinforcing element is disposed on the dielectric element, and the reinforcing element has a third dielectric constant greater than the first dielectric constant. The spacer is disposed between the first device and the second device and configured to define a distance between the first device and the second device.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: June 20, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wei-Tung Chang
  • Semiconductor device package and method for manufacturing the same
    Patent number: 11682653
    Abstract: A semiconductor device includes: a substrate having a first surface and a second surface opposite to the first surface; an electronic component disposed on the first surface of the substrate; a sensor disposed adjacent to the second surface of the substrate; an electrical contact disposed on the first surface of the substrate; and a package body exposing a portion of the electrical contact.
    Type: Grant
    Filed: February 19, 2021
    Date of Patent: June 20, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chih-Ming Hung, Meng-Jen Wang, Tsung-Yueh Tsai, Jen-Kai Ou
  • Semiconductor device package and method for manufacturing the same
    Patent number: 11682656
    Abstract: A semiconductor device package includes a substrate, a stacked structure and an encapsulation layer. The substrate includes a circuit layer, a first surface and a second surface opposite to the first surface. The substrate defines at least one cavity through the substrate. The stacked structure includes a first semiconductor die disposed on the first surface and electrically connected on the circuit layer, and at least one second semiconductor die stacked on the first semiconductor die and electrically connected to the first semiconductor die. The second semiconductor die is at least partially inserted into the cavity. The encapsulation layer is disposed in the cavity and at least entirely encapsulating the second semiconductor die.
    Type: Grant
    Filed: October 12, 2021
    Date of Patent: June 20, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: You-Lung Yen, Bernd Karl Appelt, Kay Stefan Essig
  • Manufacturing process steps of a semiconductor device package
    Patent number: 11682631
    Abstract: The present disclosure provides a semiconductor device package including a substrate having a first surface and a second surface opposite to the first surface, a first package body disposed on the first surface, and a conductive layer covering the first package body and the substrate. The conductive layer includes a first portion on the top surface of the first package body and a second portion on the lateral surface of the first package body and a sidewall of the substrate. The second portion of the conductive layer has a tapered shape. A method for manufacturing a semiconductor device package is also provided.
    Type: Grant
    Filed: June 11, 2021
    Date of Patent: June 20, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ming-Hung Chen, Zheng Wei Wu
  • Optical package structure
    Patent number: 11682684
    Abstract: An optical package structure and a method for manufacturing an optical package structure are provided. The optical package structure includes a sensor, an optical component and a fixing element. The optical component directly contacts the sensor. An interfacial area is defined by a contacting region of the optical component and the sensor. The fixing element is disposed outside of the interfacial area for bonding the optical component and the sensor.
    Type: Grant
    Filed: October 8, 2020
    Date of Patent: June 20, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Ling Huang, Lu-Ming Lai, Ying-Chung Chen
  • ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20230187374
    Abstract: An electronic device is disclosed. The electronic device includes a carrier having a first surface and a first lateral surface, an antenna adjacent to the first surface of the carrier, and a shielding layer covering a portion of the first lateral surface of the carrier. The shielding layer is configured to allow a gain of the antenna to be greater than 20 dB.
    Type: Application
    Filed: December 10, 2021
    Publication date: June 15, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hui-Ping JIAN, Ming-Hung CHEN, Jia-Feng HO
  • SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20230187387
    Abstract: A semiconductor device package includes a substrate and a shielding layer. The substrate has a first surface, a second surface opposite to the first surface and a first lateral surface extending between the first surface and the second surface. The substrate has an antenna pattern disposed closer to the second surface than the first surface. The shielding layer extends from the first surface toward the second surface of the substrate. The shielding layer covers a first portion of the first lateral surface adjacent to the first surface of the substrate. The shielding layer exposes a second portion of the first lateral surface adjacent to the second surface of the substrate.
    Type: Application
    Filed: February 14, 2023
    Publication date: June 15, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jenchun CHEN, An-Ping CHIEN
  • ELECTRONIC PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
    Publication number: 20230187367
    Abstract: An electronic package structure includes a lower circuit pattern structure, an upper circuit pattern structure, a reflowable material and at least one core element. The upper circuit pattern structure is disposed above the lower circuit pattern structure. The reflowable material is disposed between the upper circuit pattern structure and the lower circuit pattern structure. The core element attaches to the reflowable material and is configured to inhibit displacement of the at least one core element during a reflow process.
    Type: Application
    Filed: December 10, 2021
    Publication date: June 15, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wei-Jen WANG, Po-Jen CHENG, Fu-Yuan CHEN, Kao Hsin CHEN
  • Semiconductor device package and method for manufacturing the same
    Patent number: 11676912
    Abstract: A semiconductor device package and a method for manufacturing a semiconductor device package are provided. The semiconductor device package includes a substrate, a clip, and a support structure. The clip is disposed on the substrate. The clip includes a first portion and a second portion separated from each other by a slit. The support structure is above the substrate and supports the clip. The support structure has a first surface and a second surface facing the first surface, and the first surface and the second surface define a gap.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: June 13, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chia Hsiu Huang, Chun Chen Chen, Wei Chih Cho, Shao-Lun Yang
  • Optoelectronic structure
    Patent number: 11675136
    Abstract: An optoelectronic structure includes a substrate, an electronic die and a photonic die. The electronic die is disposed on the substrate and includes a first surface, wherein the first surface is configured to support an optical component. The photonic die is disposed on the first surface of the electronic die and has an active surface toward the first surface of the electronic die and a side surface facing the optical component.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: June 13, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Jr-Wei Lin, Mei-Ju Lu
  • SEMICONDUCTOR PACKAGE STRUCTURE
    Publication number: 20230178444
    Abstract: A semiconductor package structure includes a circuit pattern structure, an encapsulant and an anchoring structure. The encapsulant is disposed on the circuit pattern structure. The anchoring structure is disposed adjacent to an interface between the encapsulant and the circuit pattern structure, and is configured to reduce a difference between a variation of expansion of the encapsulant and a variation of expansion of the circuit pattern structure in an environment of temperature variation.
    Type: Application
    Filed: December 3, 2021
    Publication date: June 8, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yung-Shun CHANG, Teck-Chong LEE
  • Semiconductor device package
    Patent number: 11670836
    Abstract: A semiconductor device package includes a substrate, an air cavity, a radiator, and a director. The substrate has a top surface. The air cavity is disposed within the substrate. The air cavity has a first sidewall and a second sidewall opposite to the first sidewall. The radiator is disposed adjacent to the first sidewall of the air cavity. The director is disposed adjacent to the second sidewall of the air cavity.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: June 6, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ting Ruei Chen, Hung-Hsiang Cheng, Guo-Cheng Liao, Yun-Hsiang Tien
  • Semiconductor device package and method of manufacturing the same
    Patent number: 11670846
    Abstract: A semiconductor device package includes a substrate, a first antenna pattern and a second antenna pattern. The substrate has a first surface and a second surface opposite to the first surface. The first antenna pattern is disposed over the first surface of the substrate. The first antenna pattern has a first bandwidth. The second antenna pattern is disposed over the first antenna pattern. The second antenna pattern has a second bandwidth different from the first bandwidth. The first antenna pattern and the second antenna pattern are at least partially overlapping in a direction perpendicular to the first surface of the substrate.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: June 6, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Shao-En Hsu, Huei-Shyong Cho, Shih-Wen Lu
  • Package structure and method for manufacturing the same
    Patent number: 11664339
    Abstract: A package structure and a manufacturing method are provided. The package structure includes a first circuit layer, a first dielectric layer, an electrical device and a first conductive structure. The first circuit layer includes a first alignment portion. The first dielectric layer covers the first circuit layer. The electrical device is disposed on the first dielectric layer, and includes an electrical contact aligning with the first alignment portion. The first conductive structure extends through the first alignment portion, and electrically connects the electrical contact and the first alignment portion.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: May 30, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: You-Lung Yen, Bernd Karl Appelt
  • Semiconductor device package
    Patent number: 11664301
    Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a substrate having a first surface and a second surface opposite to the first surface of the substrate. The substrate has a through opening extending between the first surface of the substrate and the second surface of the substrate. The semiconductor device package also includes a conductive pad in the through opening and approximal to the second surface of the substrate. The conductive pad has a first surface and a second surface opposite to the first surface of the conductive pad. The semiconductor device package also includes a conductive pillar in contact with the first surface of the conductive pad. The second surface of the conductive pad protrudes from the second surface of the substrate. A method of manufacturing a semiconductor device package is also disclosed.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: May 30, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: You-Lung Yen, Bernd Karl Appelt
  • Semiconductor package including antenna substrate and manufacturing method thereof
    Patent number: 11664580
    Abstract: A semiconductor package includes: (1) a package substrate including an upper surface; (2) a semiconductor device disposed adjacent to the upper surface of the package substrate, the semiconductor device including an inactive surface; and (3) an antenna substrate disposed on the inactive surface of the semiconductor device.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: May 30, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Han-Chee Yen