Patents Assigned to Advanced Semiconductor Engineering
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Publication number: 20230062337Abstract: The present disclosure provides an electronic module includes a light source configured to radiate a first light beam having a first wavelength and a converting device configured to receive the first light beam and to convert the first light beam to a second light beam having a second wavelength different from the first wavelength. The electronic module also includes a connection element configured to transmit the first light beam from the light source to the converting device and adapted to a predetermined geometric relationship between the light source and the converting device to meet a condition of total internal reflection.Type: ApplicationFiled: September 2, 2021Publication date: March 2, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Shih-Chieh TANG, Ying-Chung CHEN
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Publication number: 20230065615Abstract: An electronic device includes a first electronic component, an encapsulant and a second electronic component. The encapsulant encapsulates the first electronic component. The second electronic component is disposed over the first electronic component and separated from the encapsulant. The second electronic component is configured to receive a power from the first electronic component.Type: ApplicationFiled: August 27, 2021Publication date: March 2, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Cheng-Yuan KUNG, Hung-Yi LIN
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Publication number: 20230061843Abstract: An electronic package is provided. The electronic package includes a first circuit structure, a second circuit structure, and an underfill. The second circuit structure is disposed over the first circuit structure. The underfill is disposed between the first circuit structure and the second circuit structure. An inner portion of the underfill has an inner lateral surface adjacent to and is substantially conformal with a lateral surface of the second circuit structure. A first top end of the inner lateral surface is not level with a top surface of the second circuit structure. An outer portion of the underfill has a second top end higher than the first top end.Type: ApplicationFiled: August 27, 2021Publication date: March 2, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Yu-Lin SHIH, Chih-Cheng LEE
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Patent number: 11594506Abstract: A semiconductor package is provided. The semiconductor package includes a first conductive layer, a plurality of first conductive pads, a plurality of second conductive pads, and a first dielectric layer. The first conductive pads are electrically connected to the first conductive layer. The second conductive pads are electrically disconnected from the first conductive layer.Type: GrantFiled: September 23, 2020Date of Patent: February 28, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Pei-Jen Lo, Shun-Tsat Tu, Cheng-En Weng
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Patent number: 11594660Abstract: A semiconductor device package includes a carrier, an emitting element and a first package body. The carrier includes a first surface and a second surface opposite to the first surface. The emitting element is disposed on the first surface of the carrier. The first package body is disposed over the first surface of the carrier and spaced apart from the first surface of the carrier.Type: GrantFiled: March 4, 2020Date of Patent: February 28, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Tang-Yuan Chen, Meng-Wei Hsieh, Cheng-Yuan Kung
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Patent number: 11594518Abstract: A semiconductor package and a method for manufacturing a semiconductor package are provided. The semiconductor package includes a first processing element, a first I/O element, a second processing element, and a second I/O element. The first processing element is on a substrate. The first I/O element is on the substrate and electrically connected to the first processing element. The second processing element is on the substrate. The second I/O element is on the substrate and electrically connected to the second processing element. The first I/O element is electrically connected to and physically separated from the second I/O element.Type: GrantFiled: June 3, 2021Date of Patent: February 28, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chang Chi Lee, Jung Jui Kang, Chiu-Wen Lee, Li Chieh Chen
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Patent number: 11594511Abstract: A bonding device for bonding an electronic element includes an engaging component. The engaging component has a first surface and a second surface opposite to the first surface. The engaging component includes a plurality of recesses at the second surface. The plurality of recesses are configured to cover a plurality of projections of an electronic element. The engaging component is coupled to a heating component.Type: GrantFiled: April 8, 2021Date of Patent: February 28, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chih-Cheng Hung, Wei-Han Lai
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Publication number: 20230055717Abstract: The present disclosure relates to an electronic device that includes a first radiating element configured to radiate a first electromagnetic wave and a second radiating element configured to radiate a second electromagnetic wave. A first radiation pattern of the first electromagnetic wave is configured to be adjusted, and a second radiation pattern of the second electromagnetic wave is configured to be fixed.Type: ApplicationFiled: August 19, 2021Publication date: February 23, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventor: Shih-Wen LU
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Publication number: 20230054600Abstract: An optoelectronic device includes a photonic component. The photonic component includes an active side, a second side different from the active side, and an optical channel extending from the active side to the second side of the photonic component. The optical channel includes a non-gaseous material configured to transmit light.Type: ApplicationFiled: August 19, 2021Publication date: February 23, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Jr-Wei LIN, Sin-Yuan MU, Chia-Sheng CHENG
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Publication number: 20230058358Abstract: An electronic package, a semiconductor package structure and a method for manufacturing the same are provided. The electronic package includes a carrier, a first electronic component, an electrical extension structure, and an encapsulant. The carrier has a first face and a second face opposite to the first face. The first electronic component is adjacent to the first face of the carrier. The electrical extension structure is adjacent to the first face of the carrier and defines a space with the carrier for accommodating the first electronic component, the electrical extension structure is configured to connect the carrier with an external electronic component. The encapsulant encapsulates the first electronic component and at least a portion of the electrical extension structure.Type: ApplicationFiled: August 20, 2021Publication date: February 23, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: You-Lung YEN, Bernd Karl APPELT
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Publication number: 20230057327Abstract: The present disclosure provides an electronic module including a circuit including a transmitting part and a receiving part physically separated from the transmitting part. The electronic module also includes an element isolated from the circuit and configured to block electrical interference between the transmitting part and the receiving part.Type: ApplicationFiled: August 19, 2021Publication date: February 23, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Shih-Wen LU, Chun-Jen CHEN, Po-Hsiang TSENG, Hsin-Han LIN, Ming-Lun YU
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Patent number: 11588081Abstract: A semiconductor device package includes a light-emitting device, a diffuser structure, a first optical sensor, and a second optical sensor. The light-emitting device has a light-emitting surface. The diffuser structure is above the light-emitting surface of the light-emitting device. The first optical sensor is disposed below the diffuser structure, and the first optical sensor is configured to detect a first reflected light reflected by the diffuser structure. The second optical sensor is disposed below the diffuser structure, and the second optical sensor is configured to detect a second reflected light reflected by the diffuser structure.Type: GrantFiled: March 4, 2020Date of Patent: February 21, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Hsin-Ying Ho, Hsun-Wei Chan, Shih-Chieh Tang, Lu-Ming Lai
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Patent number: 11587881Abstract: A substrate structure is disclosed. The substrate structure includes a carrier, a dielectric layer on the carrier, a patterned organic core layer in the dielectric layer, and a conductive via. The patterned organic core layer defines a passage extending in the dielectric layer towards the carrier. The conductive via extends through the passage towards the carrier without contacting the patterned organic core layer.Type: GrantFiled: March 9, 2020Date of Patent: February 21, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chien-Fan Chen, Yu-Ju Liao, Chu-Jie Yang, Sheng-Hung Shih
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Patent number: 11588470Abstract: The present disclosure provides a semiconductor package structure. The semiconductor package structure includes a substrate, a first electronic component and a support component. The first electronic component is disposed on the substrate. The first electronic component has a backside surface facing a first surface of the substrate. The support component is disposed between the backside surface of the first electronic component and the first surface of the substrate. The backside surface of the first electronic component has a first portion connected to the support component and a second portion exposed from the support component.Type: GrantFiled: February 18, 2020Date of Patent: February 21, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chi Sheng Tseng, Lu-Ming Lai, Ching-Han Huang, Kuo-Hua Lai, Hui-Chung Liu
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Patent number: 11587809Abstract: A wafer supporting mechanism and a method for wafer dicing are provided. The wafer supporting mechanism includes a base portion and a support portion. The base portion includes a first gas channel and a first outlet connected to the first gas channel. The support portion is connected to the base portion and including a second gas channel connected to the first gas channel. An accommodation space is defined by the base portion and the support portion.Type: GrantFiled: September 30, 2020Date of Patent: February 21, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Bo Hua Chen, Yan Ting Shen, Fu Tang Chu, Wen-Pin Huang
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Patent number: 11587903Abstract: At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a first substrate with a first surface and a second surface opposite to the first surface, a second substrate adjacent to the first surface of the first substrate, and an encapsulant encapsulating the first substrate and the second substrate. The first substrate defines a space. The second substrate covers the space. The second surface of the first substrate is exposed by the encapsulant. A surface of the encapsulant is coplanar with the second surface of the first substrate or protrudes beyond the second surface of the first substrate.Type: GrantFiled: April 23, 2018Date of Patent: February 21, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Yung-Hsing Chang, Wen-Hsin Lin
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Publication number: 20230048279Abstract: An optical element is provided. The optical device includes a carrier, a first receiver, and a second receiver. The first receiver is disposed on the carrier and configured to receive a first light. The second receiver is disposed on the carrier and configured to receive a second light. The first light and the second light have different frequency bands.Type: ApplicationFiled: August 12, 2021Publication date: February 16, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventor: Yu-Wei CHEN
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Publication number: 20230046889Abstract: An electronic carrier and a method of manufacturing an electronic carrier are provided. The electronic carrier includes a first interconnection structure and a second interconnection structure. The first interconnection structure includes a first patterned conductive layer having a first pattern density. The second interconnection structure is laminated to the first interconnection structure and includes a second patterned conductive layer having a second pattern density higher than the first pattern density. The first interconnection structure is electrically coupled to the second interconnection structure through a first non-soldering joint between and outside of the first interconnection structure and the second interconnection structure.Type: ApplicationFiled: August 13, 2021Publication date: February 16, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: You-Lung YEN, Bernd Karl Appelt
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Patent number: 11581123Abstract: An inductor unit includes a conductive structure, a first magnetic element and an insulating layer. The conductive structure has a bottom conductive layer, a top conductive layer, and a first side conductive layer extending from the bottom conductive layer to the top conductive layer. The first magnetic element is disposed on the bottom conductive layer of the conductive structure. The insulating layer is disposed on the bottom conductive layer of the conductive structure, wherein the insulating layer covers and surrounds the first magnetic element. The circuit structure including the inductor unit and the methods for manufacturing the same are also provided.Type: GrantFiled: July 23, 2020Date of Patent: February 14, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Syu-Tang Liu, Huang-Hsien Chang, Yunghsun Chen
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Patent number: 11581273Abstract: A semiconductor device package includes a first circuit layer and an emitting device. The first circuit layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The emitting device is disposed on the second surface of the first circuit layer. The emitting device has a first surface facing the second surface of the first circuit layer, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The emitting device has a conductive pattern disposed on the second surface of the emitting device. The lateral surface of the emitting device and the lateral surface of the first circuit layer are discontinuous.Type: GrantFiled: December 26, 2019Date of Patent: February 14, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventor: Meng-Wei Hsieh