Patents Assigned to Advanced Semiconductor Engineering
  • Publication number: 20230223352
    Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a first passivation layer, a first metal layer and a first semiconductor die. The first metal layer is embedded in the first passivation layer. The first metal layer defines a first through-hole. The first semiconductor die is disposed on the first passivation layer.
    Type: Application
    Filed: March 14, 2023
    Publication date: July 13, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsu-Nan FANG, Chun-Jun ZHUANG
  • Publication number: 20230223354
    Abstract: A semiconductor device package includes a substrate having a surface, a conductive element disposed on the surface of the substrate, and an encapsulant disposed on the surface of the substrate and covering the conductive element. The conductive element has an upper surface facing away from the substrate and exposed from the encapsulant. Further, a roughness of the upper surface of the conductive element is greater than a roughness of a side surface of the conductive element.
    Type: Application
    Filed: March 14, 2023
    Publication date: July 13, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wei Da LIN, Meng-Jen WANG, Hung Chen KUO, Wen Jin HUANG
  • Publication number: 20230223676
    Abstract: A semiconductor device package includes a substrate and an antenna module. The substrate has a first surface and a second surface opposite to the first surface. The antenna module is disposed on the first surface of the substrate with a gap. The antenna module has a support and an antenna layer. The support has a first surface facing away from the substrate and a second surface facing the substrate. The antenna layer is disposed on the first surface of the support. The antenna layer has a first antenna pattern and a first dielectric layer.
    Type: Application
    Filed: March 7, 2023
    Publication date: July 13, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Lin HO, Chih-Cheng LEE, Chun Chen CHEN, Yuanhao YU
  • Patent number: 11699682
    Abstract: A semiconductor device package and a method of manufacturing the same are provided. The semiconductor device package includes a first module, a second module, a first intermediate circuit layer, a first conductive transmission path and a second conductive transmission path. The second module is stacked on the first module. The first intermediate circuit layer is arranged between the first module and the second module. The first conductive transmission is configured to electrically connect the first semiconductor module with the first intermediate circuit layer. The second conductive transmission path is configured to electrically connect the first intermediate circuit layer with the second semiconductor module.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: July 11, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen-Long Lu
  • Patent number: 11699654
    Abstract: An electronic device package includes an encapsulated electronic component, a redistribution layer (RDL) and a conductive via. The RDL is disposed above the encapsulated electronic component. The RDL includes a circuit layer comprising a conductive pad including a pad portion having a curved edge and a center of curvature, and an extension portion protruding from the pad portion and having a curved edge and a center of curvature. The circuit layer further includes a dielectric layer above the RDL. The conductive via is disposed in the dielectric layer and connected to the conductive pad of the RDL. A center of the conductive via is closer to the center of curvature of the edge of the extension portion than to the center of curvature of the edge of the pad portion.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: July 11, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Shao-An Chen, Chih-Yi Huang, Ping Cing Shen
  • Publication number: 20230215810
    Abstract: A semiconductor package structure is provided. The semiconductor package structure includes an electronic component, and an inductance component. The protection layer encapsulates the electronic component and has a top surface and a bottom surface. The top surface and the bottom surface collectively define a space to accommodate the electronic component. The inductance component outflanks the space from the top surface and the bottom surface of the protection layer.
    Type: Application
    Filed: December 30, 2021
    Publication date: July 6, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Pao-Nan LEE, Chen-Chao WANG, Chang Chi LEE
  • Publication number: 20230215816
    Abstract: A package structure includes an encapsulant, a patterned circuit structure, at least one electronic component and a shrinkage modifier. The patterned circuit structure is disposed on the encapsulant and includes a pad. The electronic component is disposed on the patterned circuit structure, and includes a bump electrically connected to the pad. The shrinkage modifier is encapsulated in the encapsulant and configured to reduce a relative displacement between the bump and the pad along a horizontal direction in an environment of temperature variation.
    Type: Application
    Filed: December 30, 2021
    Publication date: July 6, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Yuan KUNG, Hsu-Chiang SHIH, Hung-Yi LIN, Chien-Mei HUANG
  • Publication number: 20230215775
    Abstract: An electronic package is provided in the present disclosure. The electronic package comprises: an electronic component; a thermal conductive element above the electronic component, wherein thermal conductive element includes a first metal; an adhesive layer between the electronic component and the thermal conductive element, wherein the first adhesive layer includes a second metal; and an intermetallic compound (IMC) between the first metal and the second metal.
    Type: Application
    Filed: January 5, 2022
    Publication date: July 6, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Chang-Lin YEH
  • Publication number: 20230215790
    Abstract: An electronic package structure is provided. The electronic package structure includes a first carrier, a first electronic component, a first optical channel, and a second electronic component. The first electronic component is disposed on or within the first carrier. The first optical channel is disposed within the first carrier. The first optical channel is configured to provide optical communication between the first electronic component and the second electronic component. The first carrier is configured to electrically connect the first electronic component.
    Type: Application
    Filed: January 5, 2022
    Publication date: July 6, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chiung-Ying KUO, Hung-Chun KUO
  • Publication number: 20230216174
    Abstract: An electronic package and a method of manufacturing an electronic package are provided. The electronic package includes a carrier, an antenna substrate, and an electronic component. The carrier has a first surface and a second surface. The antenna substrate includes a resonant cavity and is disposed over the first surface. The antenna substrate is closer to the first surface than the second surface of the carrier. The electronic component is disposed between the antenna substrate and the second surface of the carrier.
    Type: Application
    Filed: December 30, 2021
    Publication date: July 6, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chung Ju YU, Shao-Lun YANG, Chun-Hung YEH, Hong Jie CHEN, Tsung-Wei LU, Wei Shuen KAO
  • Publication number: 20230215822
    Abstract: An electronic package is provided. The electronic package includes an amplifier component, a control component, and a first circuit layer. The control component is disposed above the amplifier component. The first circuit layer is disposed between the amplifier component and the control component. The control component is configured to transmit a first signal to the amplifier component and to output a second signal amplified by the amplifier component.
    Type: Application
    Filed: December 30, 2021
    Publication date: July 6, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Meng-Wei HSIEH, Hung-Yi LIN, Hsu-Chiang SHIH, Cheng-Yuan KUNG
  • Patent number: 11694984
    Abstract: A package structure includes a base material, at least one electronic device, at least one encapsulant and a plurality of dummy pillars. The electronic device is electrically connected to the base material. The encapsulant covers the electronic device. The dummy pillars are embedded in the encapsulant. At least two of the dummy pillars have different heights.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: July 4, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen-Long Lu
  • Publication number: 20230208394
    Abstract: The present disclosure provides a semiconductor package structure. The semiconductor package structure includes a substrate, a first electronic component and a support component. The first electronic component is disposed on the substrate. The first electronic component has a backside surface facing a first surface of the substrate. The support component is disposed between the backside surface of the first electronic component and the first surface of the substrate. The backside surface of the first electronic component has a first portion connected to the support component and a second portion exposed from the support component.
    Type: Application
    Filed: February 21, 2023
    Publication date: June 29, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi Sheng TSENG, Lu-Ming LAI, Ching-Han HUANG, Kuo-Hua LAI, Hui-Chung LIU
  • Publication number: 20230207524
    Abstract: A semiconductor package and a method for manufacturing a semiconductor package are provided. The semiconductor package includes a first processing element, a first I/O element, a second processing element, and a second I/O element. The first processing element is on a substrate. The first I/O element is on the substrate and electrically connected to the first processing element. The second processing element is on the substrate. The second I/O element is on the substrate and electrically connected to the second processing element. The first I/O element is electrically connected to and physically separated from the second I/O element.
    Type: Application
    Filed: February 28, 2023
    Publication date: June 29, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chang Chi LEE, Jung Jui KANG, Chiu-Wen LEE, Li Chieh CHEN
  • Publication number: 20230207729
    Abstract: A semiconductor device package includes a carrier, an emitting element and a first package body. The carrier includes a first surface and a second surface opposite to the first surface. The emitting element is disposed on the first surface of the carrier. The first package body is disposed over the first surface of the carrier and spaced apart from the first surface of the carrier.
    Type: Application
    Filed: February 28, 2023
    Publication date: June 29, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Tang-Yuan CHEN, Meng-Wei HSIEH, Cheng-Yuan KUNG
  • Publication number: 20230207521
    Abstract: At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a first substrate with a first surface and a second surface opposite to the first surface, a second substrate adjacent to the first surface of the first substrate, and an encapsulant encapsulating the first substrate and the second substrate. The first substrate defines a space. The second substrate covers the space. The second surface of the first substrate is exposed by the encapsulant. A surface of the encapsulant is coplanar with the second surface of the first substrate or protrudes beyond the second surface of the first substrate.
    Type: Application
    Filed: February 21, 2023
    Publication date: June 29, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yung-Hsing CHANG, Wen-Hsin LIN
  • Publication number: 20230208175
    Abstract: An electronic device package and a method for manufacturing the electronic device are provided. The electronic device includes a charging element, a housing covering the charging element and a sensing element electrically connected to the housing. The sensing element is configured to detect an external device and to drive the charging element.
    Type: Application
    Filed: December 23, 2021
    Publication date: June 29, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wei-Hao Chang
  • Patent number: 11689839
    Abstract: A wireless earphone comprises a battery, a speaker and a chamber/space. The battery has a first surface, a second surface opposite the first surface, and a third surface extended between the first surface and the second surface. The battery is disconnected from any protecting circuits. The speaker is disposed adjacent to the first surface of the battery. The chamber/space is defined by the battery and the speaker. The chamber/space is devoid of any electronic component.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: June 27, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Ming-Tau Huang
  • Publication number: 20230197600
    Abstract: A package structure is provided. The package structure includes an encapsulant and an interposer. The encapsulant has a top surface and a bottom surface opposite to the top surface. The interposer is encapsulated by the encapsulant. The interposer includes a main body, an interconnector, and a stop layer. The main body has a first surface and a second surface opposite to the first surface. The interconnector is disposed on the first surface and exposed from the top surface of the encapsulant. The stop layer is on the second surface, wherein a bottom surface of the stop layer is lower than the second surface.
    Type: Application
    Filed: December 17, 2021
    Publication date: June 22, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yung-Shun CHANG, Sheng-Wen YANG, Teck-Chong LEE, Yen-Liang HUANG
  • Publication number: 20230194807
    Abstract: An electronic module is provided. The electronic module includes a carrier, a movable component and an optical component. The movable component is on the carrier and configured to be movable with respect to the carrier. The optical component is configured to detect a movement of the movable component by an optical coupling between the optical component and the movable component.
    Type: Application
    Filed: December 22, 2021
    Publication date: June 22, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Shih-Chieh TANG