Patents Assigned to Advanced Semiconductor Engineering
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Publication number: 20200111774Abstract: An electronic device includes: a first insulation layer and a first conductive pillar. The first insulation layer has a first surface and a second surface opposite to the first surface, and the first conductive pillar comprises a first portion and a second portion. The first portion of the first conductive pillar is surrounded by the first insulation layer. The second portion of the first conductive pillar is disposed on the first surface of the first insulation layer. A height of the second portion of the first conductive pillar is equal to or greater than 10% of a height of the first portion of the conductive pillar.Type: ApplicationFiled: October 3, 2018Publication date: April 9, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Pei-Jen LO, Chien-Han CHIU, Wen Hung HUANG
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Publication number: 20200098700Abstract: A semiconductor package device includes a substrate, a sealant, a trench, a spacer and a conductive material. The substrate includes a first surface, a second surface opposite the first surface, and a lateral surface extending from the first surface to the second surface. The sealant is disposed on the first surface of the substrate and includes a first surface and a second surface opposite the first surface. The trench passes through the sealant and includes a first portion adjacent to the first surface of the sealant and a second portion between the first portion and the substrate. A width of the first portion is greater than a width of the second portion. The spacer is disposed in the trench and in contact with the sealant. The conductive material is disposed in the trench and encapsulates the spacer.Type: ApplicationFiled: September 21, 2018Publication date: March 26, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Jr-Wei LIN, Chien-Feng CHAN
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Publication number: 20200098605Abstract: An apparatus includes: a first image capture module, a second image capture module, and a first projector. The first image capture module has a first optical axis forming an angle from approximately 70° to approximately 87° with respect to the surface of a carrier. The second image capture module has a first optical axis forming an angle of approximately 90° with respect to the surface of the carrier. The first projector has a first optical axis forming an angle from approximately 40° to approximately 85° with respect to the surface of the carrier.Type: ApplicationFiled: September 21, 2018Publication date: March 26, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chun Hung TSAI, Hsuan Yu CHEN, Ian HU, Meng-Kai SHIH, Shin-Luh TARNG
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Publication number: 20200098709Abstract: An electronic device package includes a first substrate, a second substrate and a conductive layer. The first substrate includes a first bonding pad, and a cavity exposing the first bonding pad. The second substrate is laminated on the first substrate. The second substrate includes a second bonding pad at least partially inserting into the cavity of the first substrate. The conductive layer is disposed in the cavity and at least between the first bonding pad and the second bonding pad to connect the first bonding pad and the second bonding pad.Type: ApplicationFiled: June 26, 2019Publication date: March 26, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Cheng-Nan LIN, Wei-Tung CHANG, Jen-Chieh KAO, Huei-Shyong CHO
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Publication number: 20200091036Abstract: A semiconductor package structure includes a package substrate, a semiconductor die, a vapor chamber and a heat dissipating device. The package substrate has a first surface and a second surface opposite to the first surface. The semiconductor die is electrically connected to the first surface of the package substrate. The vapor chamber is thermally connected to a first surface of the semiconductor die. The vapor chamber defines an enclosed chamber for accommodating a first working liquid. The heat dissipating device is thermally connected to the vapor chamber. The heat dissipating device defines a substantially enclosed space for accommodating a second working liquid.Type: ApplicationFiled: September 10, 2019Publication date: March 19, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Hsin-En CHEN, Ian HU, Jin-Feng YANG
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Publication number: 20200083143Abstract: An electronic device includes a main substrate, a semiconductor package structure and at least one heat pipe. The semiconductor package structure is electrically connected to the main substrate, and includes a die mounting portion, a semiconductor die and a cover structure. The semiconductor die is disposed on the die mounting portion. The cover structure covers the semiconductor die. The heat pipe contacts the cover structure for dissipating a heat generated by the semiconductor die.Type: ApplicationFiled: September 10, 2019Publication date: March 12, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Jung-Che TSAI, Ian HU, Chih-Pin HUNG
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Publication number: 20200083591Abstract: A semiconductor device package includes a glass carrier, a package body, a first circuit layer and a first antenna layer. The glass carrier has a first surface and a second surface opposite to the first surface. The package body is disposed on the first surface of the glass carrier. The package body has an interconnection structure penetrating the package body. The first circuit layer is disposed on the package body. The first circuit layer has a redistribution layer (RDL) electrically connected to the interconnection structure of the package body. The first antenna layer is disposed on the second surface of the glass carrier.Type: ApplicationFiled: August 19, 2019Publication date: March 12, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Sheng-Chi HSIEH, Chen-Chao WANG, Teck-Chong LEE, Chien-Hua CHEN
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Publication number: 20200083132Abstract: A semiconductor device package includes a carrier and an encapsulant disposed on the carrier. At least one portion of the encapsulant is spaced from the carrier by a space.Type: ApplicationFiled: May 10, 2019Publication date: March 12, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Yen-Chi HUANG, Hao-Chih HSIEH, Jin Han SHIH, Yung I. YEH, Tun-Ching PI
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Publication number: 20200083172Abstract: A semiconductor device package includes a number of interposers mounted to the carrier, wherein the number of interposers may be arranged in an irregular pattern.Type: ApplicationFiled: September 4, 2019Publication date: March 12, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Hao-Chih HSIEH, Tun-Ching PI, Sung-Hung CHIANG, Yu-Chang CHEN
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Publication number: 20200080841Abstract: An optical module includes: a carrier; an optical element disposed on the upper side of the carrier; and a housing disposed on the upper side of the carrier, the housing defining an aperture exposing at least a portion of the optical element, an outer sidewall of the housing including at least one singulation portion disposed on the upper side of the carrier, wherein the singulation portion of the housing is a first portion of the housing, and wherein the housing further includes a second portion and a surface of the singulation portion of the housing is rougher than a surface of the second portion of the housing.Type: ApplicationFiled: November 13, 2019Publication date: March 12, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Ying-Chung CHEN, Hsun-Wei CHAN, Lu-Ming LAI, Kuang-Hsiung CHEN
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Publication number: 20200075571Abstract: A semiconductor device package includes a carrier, an electronic component, a protection layer, a conductive layer and an integrated passive device (IPD). The electronic component is disposed on the carrier. The protection layer covers the carrier and the electronic component. The conductive layer is disposed on the protection layer and penetrates the protection layer to be electrically connected to the electronic component. The IPD is disposed on the conductive layer and electrically connected to the electronic component through the conductive layer.Type: ApplicationFiled: September 4, 2019Publication date: March 5, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chien-Hua CHEN, Teck-Chong LEE
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Publication number: 20200075467Abstract: A semiconductor device package includes a substrate, a first insulation layer and an electrical contact. The first insulation layer is disposed on the first surface of the substrate. The electrical contact is disposed on the substrate and has a first portion surrounded by the first insulation layer and a second portion exposed from the first insulation layer, and a neck portion between the first portion and the second portion of the electrical contact. Further, the second portion tapers from the neck portion.Type: ApplicationFiled: August 30, 2018Publication date: March 5, 2020Applicant: Advanced Semiconductor Engineering Korea, Inc.Inventors: Soonheung BAE, Hyunjoung KIM
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Publication number: 20200075540Abstract: A substrate panel structure includes a plurality of sub-panels and a dielectric portion. Each of the sub-panels includes a plurality of substrate units. The dielectric portion is disposed between the sub-panels.Type: ApplicationFiled: August 30, 2018Publication date: March 5, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Wen-Long LU, Jen-Kuang FANG
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Publication number: 20200066612Abstract: A semiconductor device package includes a substrate, a first electronic component, a second electronic component, a heat dissipation lid and a thermal isolation. The substrate has a surface. The first electronic component and the second electronic component are over the surface of the substrate and arranged along a direction substantially parallel to the surface. The first electronic component and the second electronic component are separated by a space therebetween. The heat dissipation lid is over the first electronic component and the second electronic component. The heat dissipation lid defines one or more apertures at least over the space between the first electronic component and the second electronic component. The thermal isolation is in the one or more apertures of the heat dissipation lid.Type: ApplicationFiled: August 24, 2018Publication date: February 27, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chih-Pin HUNG, Tang-Yuan CHEN, Jin-Feng YANG, Meng-Kai SHIH
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Publication number: 20200057201Abstract: An optical device package includes a semiconductor substrate, and an optical device. The semiconductor substrate has a first surface, a second surface different in elevation from the first surface, and a profile connecting the first surface to the second surface. A surface roughness of the profile is greater than a surface roughness of the second surface. The optical device is disposed on the second surface and surrounded by the profile.Type: ApplicationFiled: August 15, 2018Publication date: February 20, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Huang-Hsien Chang, Po Ju Wu, Yu Cheng Chen, Wen-Long Lu
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Publication number: 20200035851Abstract: An optical device includes a substrate, an electronic component and a lid. The electronic component is disposed on the substrate. The lid is disposed on the substrate. The lid has a first cavity over the electronic component and a second cavity over the first cavity. The sidewall of the second cavity is inclined.Type: ApplicationFiled: July 22, 2019Publication date: January 30, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chang Chin TSAI, Yu-Che HUANG, Hsun-Wei CHAN
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Publication number: 20200035654Abstract: A semiconductor package structure includes a plurality of transducer devices, a cap structure, at least one redistribution layer (RDL) and a protection material. The transducer devices are disposed side by side. Each of the transducer devices has at least one transducing region, and includes a die body and at least one transducing element. The die body has a first surface and a second surface opposite to the first surface. The transducing region is disposed adjacent to the first surface of the die body. The transducing element is disposed adjacent to the first surface of the die body and within the transducing region. The cap structure covers the transducing region of the transducer device to form an enclosed space. The redistribution layer (RDL) electrically connects the transducer devices. The protection material covers the transducer devices.Type: ApplicationFiled: July 22, 2019Publication date: January 30, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chien-Hua CHEN, Cheng-Yuan KUNG
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Publication number: 20200027804Abstract: An electronic device includes an insulating layer, a metal layer and at least one electrical connecting element. The insulating layer has a top surface and a bottom surface opposite to the top surface, and defines an opening extending between the top surface and the bottom surface. The metal layer is disposed in the opening of the insulating layer and has a top surface and a bottom surface opposite to the top surface. The bottom surface of the metal layer is substantially coplanar with the bottom surface of the insulating layer. The electrical connecting element is attached to the bottom surface of the metal layer through a seed layer.Type: ApplicationFiled: July 19, 2018Publication date: January 23, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Hsu-Nan FANG, Chien-Ching CHEN
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Publication number: 20200027834Abstract: A sensor package includes a carrier, a sensor, an interconnection structure, a conductor and a housing. The sensor is disposed on the carrier. The interconnection structure is disposed on the carrier and surrounds the sensor. The interconnection structure has a first surface facing away from the carrier. The conductor is disposed on the first carrier. The conductor having a first portion covered by the interconnection structure and a second portion exposed from the first surface of the interconnection structure. The housing is disposed on the carrier and surrounds the interconnection structure.Type: ApplicationFiled: July 17, 2019Publication date: January 23, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Hsun-Wei CHAN, Shih-Chieh TANG
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Publication number: 20200027810Abstract: The present disclosure provides a semiconductor substrate, including a first patterned conductive layer, a dielectric structure on the first patterned conductive layer, wherein the dielectric structure having a side surface, a second patterned conductive layer on the dielectric structure and extending on the side surface, and a third patterned conductive layer on the second patterned conductive layer and extending on the side surface. The present disclosure provides a semiconductor package including the semiconductor substrate. A method for manufacturing the semiconductor substrate and the semiconductor package is also provided.Type: ApplicationFiled: July 17, 2018Publication date: January 23, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Cheng-Lin HO, Chih-Cheng LEE