Patents Assigned to Advanced Semiconductor Engineering
  • Publication number: 20190206684
    Abstract: A method of forming a semiconductor device package includes: (1) providing an electronic device including an active surface and a contact pad adjacent to the active surface; (2) forming a package body encapsulating portions of the electronic device; and (3) forming a redistribution stack, including: forming a dielectric layer over a front surface of the package body, the dielectric layer defining a first opening exposing at least a portion of the contact pad; and forming a redistribution layer (RDL) over the dielectric layer, the RDL including a first trace, wherein the first trace includes a first portion extending over the dielectric layer along a first longitudinal direction adjacent to the first opening, and a second portion disposed in the first opening and extending between the first portion of the first trace and the exposed portion of the contact pad, wherein the second portion of the first trace has a maximum width along a first transverse direction orthogonal to the first longitudinal direction, and
    Type: Application
    Filed: March 8, 2019
    Publication date: July 4, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: John Richard HUNT, William T. Chen, Chih-Pin HUNG, Chen-Chao WANG
  • Publication number: 20190206824
    Abstract: A semiconductor package structure includes a first semiconductor die, a second semiconductor die, a plurality of conductive elements, a first encapsulant and a second encapsulant. The second semiconductor die is disposed on the first semiconductor die. The conductive elements each comprises a first portion and a second portion and are disposed around the first semiconductor die and the second semiconductor die. The first encapsulant surrounds the first semiconductor die and the respective first portions of the conductive elements. The second encapsulant covers a portion of a top portion of the first semiconductor die and surrounds the respective second portions of the conductive elements.
    Type: Application
    Filed: December 29, 2017
    Publication date: July 4, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen-Long LU
  • Publication number: 20190198469
    Abstract: A micro-electromechanical systems (MEMS) package structure includes: (1) a circuit layer; (2) a MEMS die with an active surface, wherein the active surface faces the circuit layer; (3) a conductive pillar adjacent to the MEMS die; and (4) a package body encapsulating the MEMS die and the conductive pillar, and exposing a top surface of the conductive pillar.
    Type: Application
    Filed: March 5, 2019
    Publication date: June 27, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Kuang-Hsiung CHEN, Yu-Hsuan TSAI, Yu-Ying LEE, Sheng-Ming WANG, Wun-Jheng SYU
  • Publication number: 20190189565
    Abstract: A semiconductor device package includes a substrate, a first electronic component, a first package body, an electrical contact and a first conductive layer. The substrate has a first surface, a second surface and a lateral surface extending between the first surface and the second surface. The first electronic component is disposed on the first surface of the substrate. The first package body encapsulates the first electronic component. The electrical contact is disposed on the second surface of the substrate. The first conductive layer includes a first portion and a second portion. The first portion is disposed on the first package body and the lateral surface of the substrate. The second portion contacts the electrical contact.
    Type: Application
    Filed: December 15, 2017
    Publication date: June 20, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Yi CHEN
  • Publication number: 20190187371
    Abstract: A semiconductor device package includes: (1) a substrate having a first surface; (2) a waveguide disposed in the substrate; and (3) an optical device including: (a) a first portion extending into the substrate and not extending beyond the first surface of the substrate, and (b) a second portion extending along the first surface of the substrate, wherein the second portion of the optical device comprises a protrusion and the substrate defines a groove extending from the first surface of the substrate, and wherein the protrusion of the second portion of the optical device engages with the groove of the substrate.
    Type: Application
    Filed: February 26, 2019
    Publication date: June 20, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yi-Min CHIN, Yung-Shun CHANG, Mei-Ju LU, Jia-Hao ZHANG, Wen-Chi HUNG
  • Publication number: 20190181082
    Abstract: A semiconductor device package includes: (1) a substrate having a first surface and a second surface opposite to the first surface; (2) a first patterned conductive layer on the first surface of the substrate and having a first surface and a second surface, wherein the second surface of the first patterned conductive layer is adjacent to the substrate and opposite to the first surface of the first patterned conductive layer; (3) a first insulation layer on the first surface of the substrate and having a first surface and a second surface, wherein the second surface of the first insulation layer is adjacent to the substrate and opposite to the first surface of the first insulation layer; and (4) a second patterned conductive layer extending from the first surface of the first insulation layer to the second surface of the substrate, the second patterned conductive layer electrically connected to the first patterned conductive layer.
    Type: Application
    Filed: February 15, 2019
    Publication date: June 13, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chien-Hua CHEN, Sheng-Chi HSIEH, Cheng-Yuan KUNG
  • Publication number: 20190181311
    Abstract: A semiconductor device package is provided, which includes a carrier, an emitter and a first transparent encapsulant. The carrier has a first surface. The emitter is disposed on the first surface. The first transparent encapsulant encapsulates the emitter. The first transparent encapsulant includes a body and a lens portion. The body has a first planar surface. The lens portion is disposed on the body and has a first planar surface. The first planar surface of the lens portion is substantially coplanar with the first planar surface of the body.
    Type: Application
    Filed: November 21, 2018
    Publication date: June 13, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsin-Ying HO, Hsun-Wei CHAN
  • Publication number: 20190164871
    Abstract: A semiconductor substrate includes a dielectric layer, a heat dissipation structure and a first patterned conductive layer. The dielectric layer has a surface. The heat dissipation structure is surrounded by the dielectric layer. The heat dissipation structure defines a space and includes a liquid in the space. The first patterned conductive layer is disposed adjacent to the surface of the dielectric layer and thermally connected with the heat dissipation structure.
    Type: Application
    Filed: November 28, 2017
    Publication date: May 30, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chih Cheng LEE, Yu-Lin Shih
  • Publication number: 20190164782
    Abstract: A semiconductor substrate includes a dielectric layer, a first patterned conductive layer and a first connection element. The dielectric layer has a first surface. The first patterned conductive layer has a first surface and is disposed adjacent to the first surface of the dielectric layer. The first connection element is disposed on the first surface of the first patterned conductive layer. The first connection element includes a first portion, a second portion and a seed layer disposed between the first portion and the second portion. The first portion of the first connection element and the first patterned conductive layer are formed to be a monolithic structure.
    Type: Application
    Filed: November 28, 2017
    Publication date: May 30, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yu-Lin SHIH, Chih Cheng LEE
  • Publication number: 20190164859
    Abstract: A semiconductor package device includes a substrate, an electronic component, a bonding wire, a heat spreader, a thermal conductive structure and an encapsulant. The electronic component is disposed on the substrate. The bonding wire connects the electronic component to the substrate. The heat spreader is disposed over the electronic component. The thermal conductive structure is disposed between the heat spreader and the electronic component. The thermal conductive structure includes two polymeric layers and a thermal conductive layer. The conductive layer is disposed between the two polymeric layers. The thermal conductive layer has a first end in contact with the electronic component and a second end in contact with the heat spreader. The encapsulant covers the bonding wire.
    Type: Application
    Filed: November 27, 2017
    Publication date: May 30, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Tsan-Hsien CHEN, Ian HU, Jin-Feng YANG, Shih-Wei CHEN, Hui-Chen HSU
  • Publication number: 20190162774
    Abstract: A testing device includes a testing socket and a reflector. The testing socket defines an accommodating space. The reflector is disposed in the accommodating space and has a plurality of reflection surfaces non-parallel with each other. The reflection surfaces define a transmission space.
    Type: Application
    Filed: April 3, 2018
    Publication date: May 30, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hung-Jen HUANG, Yen-Chun WANG, Chen-Kuo CHU, I-Chun LIU
  • Publication number: 20190164916
    Abstract: An antenna semiconductor package device includes: (1) a waveguide cavity having a radiation opening; and (2) a first directing element outside of the waveguide cavity and separated from the waveguide cavity by a first gap.
    Type: Application
    Filed: January 30, 2019
    Publication date: May 30, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Shao-En HSU, Huei-Shyong CHO, Shih-Wen LU
  • Publication number: 20190157197
    Abstract: A semiconductor device package includes an electronic component, a first substrate, a first bonding wire and a second substrate. The electronic component has a first surface. The first substrate is disposed on the first surface of the electronic component. The first bonding wire electrically connects the first substrate to the electronic component. The second substrate is disposed on the first surface of the electronic component. The second substrate defines an opening accommodating the first substrate and the first bonding wire.
    Type: Application
    Filed: November 22, 2017
    Publication date: May 23, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jen-Kuang FANG, Wen-Long LU
  • Publication number: 20190157492
    Abstract: An optical device includes a substrate, a plurality of light emitting devices, a photo detector and a circuit layer. The substrate has a first surface and a second surface opposite to the first surface. The substrate includes a first region and a second region. The light emitting devices are disposed on the first surface in the first region of the substrate. The photo detector is disposed in the second region of the substrate. The photo detector includes an electrical contact exposed from the second surface of the substrate. The circuit layer is disposed on the second surface of the substrate and electrically connected to the electrical contact of the photo detector.
    Type: Application
    Filed: November 22, 2017
    Publication date: May 23, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Lu-Ming LAI, Shih-Chieh TANG
  • Publication number: 20190148297
    Abstract: At least some embodiments of the present disclosure relate to a substrate for packaging a semiconductor device package. The substrate comprises a dielectric layer, a first conductive element adjacent to the dielectric layer, a second conductive element adjacent to the dielectric layer, and a third conductive element adjacent to the dielectric layer. The first conductive element has a first central axis in a first direction and a second central axis in a second direction. The first conductive element comprises a first chamfer and a second chamfer adjacent to the first chamfer. The second conductive element has a first central axis in the first direction and a second central axis in the second direction. The third conductive element has a first central axis in the first direction and a second central axis in the second direction. The first central axes of the first, second, and third conductive elements are substantially parallel to one another in the first direction and are misaligned from one another.
    Type: Application
    Filed: November 16, 2017
    Publication date: May 16, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Lin HO, Chung Chieh CHANG, Ya Fang CHAN, Chih-Cheng LEE
  • Publication number: 20190148325
    Abstract: An electronic device includes a dielectric layer, a redistribution layer, a conductive structure, an insulating layer and a solder bump. The dielectric layer has a first surface and a second surface opposite to the first surface, and defines a through hole extending between the first surface and the second surface. The redistribution layer is disposed on the first surface of the dielectric layer and in the through hole. The conductive structure is disposed on the redistribution layer. The conductive structure includes an upper portion and a lower portion. The lower portion is disposed on the redistribution layer, and the upper portion is disposed on the lower portion. The insulating layer covers a portion of the redistribution layer and surrounds a first portion of the lower portion of the conductive structure. The solder bump covers a portion of the conductive structure.
    Type: Application
    Filed: November 10, 2017
    Publication date: May 16, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wen-Long LU, Chi-Chang LEE
  • Publication number: 20190148326
    Abstract: A semiconductor device includes a semiconductor element, a trace disposed adjacent to a surface of the semiconductor element, a bonding pad disposed adjacent to the surface of the semiconductor element and connected to the trace, and a pillar disposed on the bonding pad. The pillar includes a first end wall, a second end wall opposite the first end wall, a first side wall, and a second side wall opposite the first side wall. The first side wall and the second side wall connect the first end wall to the second end wall. One or both of the first side wall and the second side wall incline inwardly from the first end wall to the second end wall. The pillar is disposed on the bonding pad such that the first end wall is closer to the trace than is the second end wall.
    Type: Application
    Filed: January 14, 2019
    Publication date: May 16, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chih-Pin HUNG, Dao-Long CHEN, Ying-Ta CHIU, Ping-Feng YANG
  • Publication number: 20190139846
    Abstract: At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package comprises a carrier, a first patterned conductive layer, an interconnection structure, a first semiconductor device, an encapsulant, a second patterned conductive layer, and a passivation layer. The carrier has a first surface and a second surface opposite to the first surface. The first patterned conductive layer is adjacent to the first surface of the carrier. The interconnection structure is disposed on the first patterned conductive layer and electrically connected to the first patterned conductive layer. The first semiconductor device is disposed on the interconnection structure and electrically connected to the interconnection structure. The encapsulant is disposed on the first patterned conductive layer and encapsulates the semiconductor device and the interconnection structure.
    Type: Application
    Filed: November 3, 2017
    Publication date: May 9, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen-Long LU
  • Publication number: 20190139786
    Abstract: In one or more embodiments, a semiconductor package device includes a substrate, a trace, a structure, a barrier element and an underfill. The substrate has a first surface including a filling region surrounded by the trace. The structure is disposed over the filling region and electrically connected to the substrate. The barrier element is disposed on the trace. The underfill is disposed on the filling region.
    Type: Application
    Filed: November 8, 2017
    Publication date: May 9, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Chang-Lin YEH
  • Publication number: 20190139708
    Abstract: A capacitor structure includes a first conductive layer, a first insulation layer, a first dielectric layer and a second conductive layer. The first conductive layer includes a first conductive material. The first insulation layer is disposed adjacent to the first conductive layer in a same plane as the first conductive layer. The first dielectric layer is on the first conductive layer and the first insulation layer. The second conductive layer is on the first dielectric layer and includes a second conductive material. The first conductive material is different from the second conductive material.
    Type: Application
    Filed: November 6, 2017
    Publication date: May 9, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi-Chang LEE, Wen-Long LU