Abstract: At least some embodiments of the present disclosure relate to a substrate for packaging a semiconductor device. The substrate includes a first dielectric layer having a first surface and a second surface opposite to the first surface, a first patterned conductive layer adjacent to the first surface of the first dielectric layer, a second patterned conductive layer adjacent to the second surface of the first dielectric layer and electrically connected to the first patterned conductive layer, and an external connection pad tapered from a top surface to a bottom surface. The second patterned conductive layer includes a pad and a trace adjacent to the pad. The external connection pad is disposed on the pad of the second patterned conductive layer. A bottom width of the external connection pad is greater than or equal to a width of the pad of the second patterned conductive layer.

Abstract: A polylactic acid resin composition includes about 100 parts by weight of a polylactic acid resin, about 0.001 to about 3 parts by weight of a nucleating agent and about 3 to about 70 parts by weight of a filler. The polylactic acid resin composition can be processed into a biodegradable molded article or other product having a high impact strength and a high heat deflection temperature.

Abstract: A semiconductor package device comprises a substrate, an electronic component and a protection layer. The substrate has a first surface and a second surface opposite to the first surface. The substrate defines a first opening penetrating the substrate. The electronic component is disposed on the first surface of the substrate. The protection layer is disposed on the second surface of the substrate. The protection layer has a first portion adjacent to the first opening and a second portion disposed farther away from the first opening than is the first portion of the protection layer. The first portion of the protection layer has a surface facing away from the second surface of the substrate. The second portion of the protection layer has a surface facing away from the second surface of the substrate.

Abstract: A substrate structure includes a dielectric layer, a first circuit layer, a second circuit layer and at least one conductive pillar. The dielectric layer has a first surface and a second surface opposite to the first surface. The first circuit layer is disposed adjacent to the first surface of the dielectric layer. The second circuit layer is disposed adjacent to the second surface of the dielectric layer and electrically connected to the first circuit layer. The second circuit layer includes a plurality of pads and at least one trace disposed between two adjacent pads of the plurality of pads. The at least one conductive pillar is tapered toward the second circuit layer and disposed on one of the pads. A portion of the second surface of the dielectric layer is exposed from the second surface layer.

Abstract: A semiconductor device package includes a metal carrier, a passive device, a conductive adhesive material, a dielectric layer and a conductive via. The metal carrier has a first conductive pad and a second conductive pad spaced apart from the first conductive pad. The first conductive pad and the second conductive pad define a space therebetween. The passive device is disposed on top surfaces of first conductive pad and the second conductive pad. The conductive adhesive material electrically connects a first conductive contact and a second conductive contact of the passive device to the first conductive pad and the second conductive pad respectively. The dielectric layer covers the metal carrier and the passive device and exposes a bottom surface of the first conductive pad and the second conductive pad. The conductive via extends within the dielectric layer and is electrically connected to the first conductive pad and/or the second conductive pad.

Abstract: A semiconductor device package includes a lead frame, an electronic component, a package body, at least one conductive via and a conductive layer. The lead frame includes a paddle, a connection element and a plurality of leads. The electronic component is disposed on the paddle. The package body encapsulates the electronic component and the lead frame. The at least one conductive via is disposed in the package body, electrically connected to the connection element, and exposed from the package body. The conductive layer is disposed on the package body and the conductive via.

Abstract: A semiconductor package device includes an interconnection structure, an electronic component, a package body and an electrical contact. The dielectric layer has a top surface and a bottom surface. The dielectric layer defines a cavity extending from the bottom surface into the dielectric layer. A patterned conductive layer is disposed on the top surface of the dielectric layer. The conductive pad is at least partially disposed within the cavity and electrically connected to the patterned conductive layer. The conductive pad includes a first metal layer and a second metal layer. The second metal layer is disposed on the first metal layer and extends along a lateral surface of the first metal layer. The electronic component is electrically connected to the patterned conductive layer. The package body covers the electronic component and the patterned conductive layer. The electrical contact is electrically connected to the conductive pad.

Abstract: A semiconductor package includes a first substrate having a first surface, a second substrate on the first surface of the first substrate, the second substrate having a first surface and a second surface adjacent to the first surface, and the first surface of the second substrate being disposed on the first surface of the first substrate, and a light source on the second surface of the second substrate. A method for manufacturing the semiconductor device package is also provided.

Abstract: The present disclosure provides for a semiconductor package device and a method for manufacturing the same. The semiconductor package device includes a substrate, a shielding wall and a package body. The substrate has a top surface. The shielding wall is disposed on the top surface. The shielding wall has a conductive main body and a plurality of protruding portions extending from the conductive main body. The package body encapsulates the shielding wall.

Abstract: A semiconductor device package includes a first redistribution layer (RDL), a first die, a second die, a second RDL and an encapsulant. The first die is disposed on the first RDL and is electrically connected to the first RDL. The first die has a first electrical contact. The second die is disposed on the first RDL and is electrically connected to the first RDL. The second die has a first electrical contact. The second RDL is surrounded by the first RDL. The second RDL has a first electrical contact electrically connected to the first electrical contact of the first die and a second electrical contact electrically connected to the first electrical contact of the second die. A size of the first electrical contact of the second RDL is greater than a size of the second electrical contact of the second RDL.

Abstract: An electronic device includes a piezoelectric module, a sensing module and a buffer element. The piezoelectric module includes a substrate and a piezoelectric element. The substrate defines an opening penetrating the substrate. The piezoelectric element is disposed on the substrate and across the opening of the substrate. The sensing module is disposed over the piezoelectric module. The buffer element is disposed between the piezoelectric module and the sensing module.

Abstract: A capacitor structure is disclosed. The capacitor structure includes a substrate, and a first electrode disposed on the substrate, the first electrode including a conductive layer, a first conductive post electrically connected to the conductive layer and a second conductive post electrically connected to the conductive layer. The capacitor structure further includes a planarization layer disposed on and covering the first electrode, the planarization layer disposed in a space between the first conductive post and the second conductive post, a first dielectric layer disposed on the planarization layer and in the space between the first conductive post and the second conductive post, and a second electrode disposed on the first dielectric layer.

Abstract: A semiconductor device package comprises a bottom electronic device, an interposer module, a top electronic device, and a double sided redistribution layer (RDL) structure. The interposer module includes a plurality of conductive vias. The top electronic device has an active surface and is disposed above the bottom electronic device and above the interposer module. The double sided RDL structure is disposed between the bottom electronic device and the top electronic device. The active surface of the bottom electronic device faces toward the double sided RDL structure. The active surface of the top electronic device faces toward the double sided RDL structure. The double sided RDL structure electrically connects the active surface of the bottom electronic device to the active surface of the top electronic device. The double sided RDL structure electrically connects the active surface of the top electronic device to the interposer module.

Abstract: An optical package structure includes a substrate having a first surface, an interposer bonded to the first surface through a bonding layer, the interposer having a first area from a top view perspective, and an optical device on the interposer, having a second area from the top view perspective, the first area being greater than the second area. A method for manufacturing the optical package structure is also provided.

Abstract: The present disclosure provides a semiconductor substrate, including a first dielectric layer with a first surface and a second surface, a first conductive via extending between the first surface and the second surface, a first patterned conductive layer on the first surface, and a second patterned conductive layer on the second surface. The first conductive via includes a bottom pattern on the first surface and a second patterned conductive layer on the second surface. The bottom pattern has at least two geometric centers corresponding to at least two geometric patterns, respectively, and a distance between one geometric center and an intersection of the two geometrical patterns is a geometric radius. A distance between the at least two geometric centers is greater than 1.4 times the geometric radius. A method for manufacturing the semiconductor substrate described herein and a semiconductor package structure having the semiconductor substrate are also provided.

Abstract: A semiconductor package device comprises an electronic component, a conductive bump and a first conductive layer. The electronic component has a top surface. The conductive bump is disposed on the top surface of the electronic component. The conductive bump includes a main body and a protruding portion. The first conductive layer covers a portion of the protruding portion. The first conductive layer has a first upper surface and a second upper surface. The first upper surface and the second upper surface are not coplanar.

Abstract: A system includes: (1) a sensor module configured to detect an object at a predetermined distance and obtain position information of the object relative to the sensor module; (2) a zooming module configured to move at an angle and capture an image of the object; and (3) a controller connected to the sensor module and the zooming module. The controller is configured to derive the angle in accordance with the predetermined distance and the position information of the object, and the controller is configured to control the zooming module to move in accordance with the angle.

Abstract: A semiconductor device package includes: (1) a first circuit layer including a first surface and a second surface opposite to the first surface; (2) at least one electrical element disposed over the first surface of the first circuit layer and electrically connected to the first circuit layer; (3) a first molding layer disposed over the first surface of the first circuit layer, wherein the first molding layer encapsulates an edge of the at least one electrical element; (4) first electronic components disposed over the second surface of the first circuit layer and electrically connected to the first circuit layer; and (5) a second molding layer disposed over the second surface of the first circuit layer and encapsulating the first electronic components, wherein the first molding layer and the second molding layer include different molding materials.

Abstract: A semiconductor package includes: (1) a first die; (2) conductive pads electrically connected to the first die, and each of the conductive pads having a lower surface; (3) a package body encapsulating the first die and the conductive pads and exposing the lower surface of each of the conductive pads from a lower surface of the package body; and (4) first traces disposed on the lower surface of the package body and connected to the lower surface of each of the conductive pads, wherein a thickness of each of the first traces is less than 100 micrometers.

Abstract: A semiconductor device package includes a semiconductor device, a conductive bump, a first encapsulant and a second encapsulant. The semiconductor device has a first surface, a second surface and a lateral surface. The second surface is opposite to the first surface. The lateral surface extends between the first surface and the second surface. The semiconductor device comprises a conductive pad adjacent to the first surface of the semiconductor device. The conductive bump is electrically connected to the conductive pad. The first encapsulant covers the first surface of the semiconductor device and a first portion of the lateral surface of the semiconductor device, and surrounds the conductive bump. The second encapsulant covers the second surface of the semiconductor device and a second portion of the lateral surface of the semiconductor device.