Abstract: An optical device includes a substrate, an electronic component and a lid. The electronic component is disposed on the substrate. The lid is disposed on the substrate. The lid has a first cavity over the electronic component and a second cavity over the first cavity. The sidewall of the second cavity is inclined.
Type:
Grant
Filed:
August 30, 2022
Date of Patent:
July 16, 2024
Assignee:
ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Abstract: A semiconductor package structure includes a conductive structure, at least one semiconductor element, an encapsulant, a redistribution structure and a plurality of bonding wires. The semiconductor element is disposed on and electrically connected to the conductive structure. The encapsulant is disposed on the conductive structure to cover the semiconductor element. The redistribution structure is disposed on the encapsulant, and includes a redistribution layer. The bonding wires electrically connect the redistribution structure and the conductive structure.
Type:
Grant
Filed:
August 22, 2022
Date of Patent:
July 16, 2024
Assignee:
ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Inventors:
Chien-Wei Chang, Shang-Wei Yeh, Chung-Hsi Wu, Min Lung Huang
Abstract: A measurement device and a method of measuring a radiation pattern by using the same are provided. The measurement device includes at least one positioner configured to move a first antenna for measuring a main lobe and a back lobe of an electromagnetic wave radiated from the first antenna.
Type:
Application
Filed:
January 6, 2023
Publication date:
July 11, 2024
Applicants:
Advanced Semiconductor Engineering, Inc., National Chung Cheng University
Abstract: A semiconductor substrate structure and a method of manufacturing a semiconductor substrate structure are provided. The semiconductor substrate structure includes a substrate, an electronic device, and a filling material. The substrate defines a cavity. The electronic device is disposed in the cavity and spaced apart from the substrate by a gap. The filling material is disposed in the gap and covers a first region of an upper surface of the electronic device.
Type:
Application
Filed:
March 22, 2024
Publication date:
July 11, 2024
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: A testing device is disclosed. The testing device includes a socket configured to support a DUT and a first detection module disposed at a first side of the socket and configured to detect a location relationship between the DUT and the socket.
Type:
Grant
Filed:
April 15, 2022
Date of Patent:
July 9, 2024
Assignees:
ADVANCED SEMICONDUCTOR ENGINEERING, INC., ASE TEST, INC.
Inventors:
Jia Jin Lin, Chia Hsiang Wang, Shih Pin Chung, Wei Shuo Chu, You Lin Lee, Pin Heng Kuo, Cheng Chia Tu
Abstract: A package structure includes a first die, a second die, an encapsulant and at least one electrical contact. The first die has an active surface. The second die is disposed on the first die, and has an active surface and a backside surface opposite to the active surface. The active surface of the second die is closer to the active surface of the first die than the backside surface of the second die is. The encapsulant encapsulates the first die and the second die, and has a top surface far away from the active surface of the first die. The electrical contact is exposed from the top surface of the encapsulant and is configured for connecting at least one conductive wire.
Type:
Grant
Filed:
March 31, 2022
Date of Patent:
July 9, 2024
Assignee:
ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a lead frame and passive component. The lead frame includes a paddle and a plurality of leads. The lead frame includes a first surface and a second surface opposite to the first surface. The passive component includes an external connector. A pattern of the external connector is corresponding to a pattern of the plurality of leads of the lead frame.
Type:
Grant
Filed:
September 16, 2020
Date of Patent:
July 9, 2024
Assignee:
ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Inventors:
Chi-Tsung Chiu, Hui-Ying Hsieh, Chun Hao Chiu, Chiuan-You Ding
Abstract: An optical device includes an emitter, a receiver, a transparent element, and a block layer. The transparent element is disposed over the emitter and the receiver. The transparent element defines a recess between the emitter and the receiver. The block layer is conformally disposed over the transparent element and the recess.
Type:
Application
Filed:
December 30, 2022
Publication date:
July 4, 2024
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: An optical module is disclosed. The optical module includes a carrier and a lid disposed over the carrier. The carrier and the lid are collaboratively define a first cavity for accommodating a photonic component. The optical module also includes a first electrical contact disposed over a first side of the lid and configured to provide an electronic connection for the optical module. A first aperture penetrating the lid is formed at the first side of the lid and corresponds to a light transmission/reception area of the photonic component.
Type:
Application
Filed:
December 30, 2022
Publication date:
July 4, 2024
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: An optical module is disclosed. The optical module includes an emitter, a receiver, and a pre-formed transparent element disposed over the emitter and the receiver. The pre-formed transparent element is configured to provide an optical guiding path within the optical module.
Type:
Application
Filed:
December 30, 2022
Publication date:
July 4, 2024
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: An electronic package structure and a method for manufacturing the same are provided. The electronic package structure includes a first electronic component, a second electronic component, an interconnection element, an insulation layer, and an encapsulant. The second electronic component is disposed adjacent to the first electronic component. The interconnection element is disposed between the first electronic component and the second electronic component. The insulation layer is disposed between the first electronic component and the second electronic component and has a side surface and a top surface connecting to the side surface. The encapsulant surrounds the interconnection element and at least partially covers the top surface of the insulation layer and has an extended portion in contact with the side surface of the insulation layer.
Type:
Application
Filed:
March 19, 2024
Publication date:
July 4, 2024
Applicant:
Advanced Semiconductor Engineering, Inc.
Inventors:
Wei-Jen WANG, Yi Dao WANG, Tung Yao LIN
Abstract: An electronic device includes a coil element configured to provide an electromagnetic field, a housing with an EMI shielding layer covering the coil element and a barrier configured to block an electromagnetic induction effect caused by the electromagnetic field and the EMI shielding layer.
Type:
Application
Filed:
December 28, 2022
Publication date:
July 4, 2024
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: An optical device is provided. The optical device includes a first photonic component; a first electronic component at least partially over the first photonic component; and an optical connection element at least partially over the first photonic component, the optical connection element being separated from the first electronic component.
Type:
Application
Filed:
December 30, 2022
Publication date:
July 4, 2024
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: The present disclosure provides a semiconductor device package and a method of manufacturing the same. The semiconductor device package includes a substrate, an interconnection structure, a package body, and a first electronic component. The interconnection structure is disposed on the substrate. The package body is disposed on the substrate and partially covers the interconnection structure. The package body has a position limiting structure around the interconnection structure. The first electronic component is disposed on the interconnection structure and electrically connected to the interconnection structure.
Type:
Grant
Filed:
January 29, 2021
Date of Patent:
July 2, 2024
Assignee:
ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Inventors:
Wei-Chih Cho, Shao-Lun Yang, Chun-Hung Yeh, Tsung-Wei Lu
Abstract: An electronic device package and manufacturing method thereof are provided. The electronic device package includes an electronic component including an active surface, a patterned conductive layer disposed on the active surface, an encapsulation layer disposed over the patterned conductive layer, and a buffer layer disposed between the patterned conductive layer and the encapsulation layer. The buffer layer is shaped and sized to alleviate a stress generated due to an interaction between the patterned conductive layer and the encapsulation layer.
Type:
Grant
Filed:
October 13, 2021
Date of Patent:
July 2, 2024
Assignee:
ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Inventors:
En Hao Hsu, Kuo Hwa Tzeng, Chia-Pin Chen, Chi Long Tsai
Abstract: A package is provided. The package includes a carrier, a component, and a first protective element. The component is disposed over the carrier and having a side surface configured for optically coupling. The first protective element is disposed between the carrier and the component. The side surface of the component is free from being in contact with the first protective element.
Type:
Application
Filed:
December 23, 2022
Publication date:
June 27, 2024
Applicant:
Advanced Semiconductor Engineering, Inc.
Inventors:
Jung Jui KANG, Shih-Yuan SUN, Chieh-Chen FU
Abstract: The present disclosure provides a semiconductor substrate, including a first dielectric layer with a first surface and a second surface, a first conductive via extending between the first surface and the second surface, a first patterned conductive layer on the first surface, and a second patterned conductive layer on the second surface. The first conductive via includes a bottom pattern on the first surface and a second patterned conductive layer on the second surface. The bottom pattern has at least two geometric centers corresponding to at least two geometric patterns, respectively, and a distance between one geometric center and an intersection of the two geometrical patterns is a geometric radius. A distance between the at least two geometric centers is greater than 1.4 times the geometric radius. A method for manufacturing the semiconductor substrate described herein and a semiconductor package structure having the semiconductor substrate are also provided.
Type:
Application
Filed:
February 6, 2024
Publication date:
June 27, 2024
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: A semiconductor device package includes a substrate, a connection structure, a first package body and a first electronic component. The substrate has a first surface and a second surface opposite to the first surface. The connection structure is disposed on the firs surface of the substrate. The first package body is disposed on the first surface of the substrate. The first package body covers the connection structure and exposes a portion of the connection structure. The first electronic component is disposed on the first package body and in contact with the portion of the connection structure exposed by the first package body.
Type:
Application
Filed:
January 29, 2024
Publication date:
June 27, 2024
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: The present disclosure provides an electronic device and a method of manufacturing the same. The electronic device includes a first redistribution structure and a first encapsulant. The first encapsulant supports the first redistribution structure and is configured to function as a first reinforcement to provide a second redistribution structure. The redistribution structure has a plurality of conductive layers disposed over the first redistribution structure.
Type:
Application
Filed:
December 21, 2022
Publication date:
June 27, 2024
Applicant:
Advanced Semiconductor Engineering, Inc.
Abstract: An optoelectronic device package includes a first redistribution layer (RDL), a first electronic die disposed over the first RDL, wherein an active surface of the first electronic die faces the first RDL. The optoelectronic device package further includes a second electronic die disposed over the first RDL, and a photonic die disposed over and electrically connected to the second electronic die. An active surface of the second electronic die is opposite to the first RDL.
Type:
Application
Filed:
February 6, 2024
Publication date:
June 27, 2024
Applicant:
Advanced Semiconductor Engineering, Inc.